CN102881566B - A kind of forming method of via hole image - Google Patents
A kind of forming method of via hole image Download PDFInfo
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- CN102881566B CN102881566B CN201210369951.7A CN201210369951A CN102881566B CN 102881566 B CN102881566 B CN 102881566B CN 201210369951 A CN201210369951 A CN 201210369951A CN 102881566 B CN102881566 B CN 102881566B
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Abstract
The present invention provides a kind of forming method of via hole image.The inventive method includes, and dielectric layer, the first and second hard mask layers are sequentially depositing on substrate；The first photoresistance film is coated with, by exposure and etching technics, the second hard mask layer is patterned with latticed first through hole spirte；Remove the first photoresistance film；The second photoresistance film is coated with again, and after photoetching, the second photoresistance film is patterned with latticed second through hole spirte；By etching technics, it is superimposed figure to pattern the first hard mask layer and dielectric layer with first through hole spirte and the second through hole spirte；Finally remove the second photoresistance film and the second hard mask layer.Therefore, by the inventive method, single exposure has not been only reached and has patterned unobtainable photolithography limitation, the difficulty of photoetching process has been reduced, effectively increases resolution ratio, additionally it is possible to has simplified technique, improve production efficiency, it is cost-effective.
Description
Technical field
The invention belongs to semiconductor integrated circuit manufacturing process technology field, it is related to a kind of photoetching technique, more particularly to one
Plant the forming method of via hole image.
Background technology
Photoetching, as one of key technology of semiconductor and its related industry development and progress, is the promotion of semiconductor development
Person, supports the development of semiconductor industry, is also the bottleneck of semiconductor manufacturing industry development.
Resolution ratio is interpreted as the minimum spacing for two figures that can be clearly parsed.In photoetching, lens are received during imaging
The diffracted ray of different stage is collected, resolution ratio is defined as clearly telling the energy of pattern image pair closely spaced on silicon chip
Power, resolution ratio R formula is as follows：
Wherein, λ is the wavelength of light source, and NA is the numerical aperture of lens, and K1 is the process factor of optical system, including is exposed
Light device, mask plate, photoresist and RET etc., K1 reflect the complexity of photoetching.From above formula,
Bigger NA values allow lens to collect more diffracted rays, so as to be conducive to the reduction of resolution ratio R values, however this effect with
Depth of focus DOF's (depth of focus) is reduced to cost.When depth of focus refers to ensure image clearly, focus is moved along optical axis
Distance, depth of focus（DOF）Formula it is as follows：
Wherein, K2 is the constant related to photoresist, and λ is the wavelength of light source, and NA is the numerical aperture of lens.
In order to improve resolution ratio, the wavelength of optical exposure machine constantly reduces, from 436nm, 365nm near ultraviolet（NUV）Hair
248 nm, 193nm deep ultraviolet is opened up（DUV）, characteristic size also experienced the process from micron, sub-micron to nanometer.
During exploring smaller characteristic size, it has been found that still have very big space that existing ripe photoetching technique can be enable to prolong
Stretch.Liquid immersion lithography, polarized light source, RET (RET) is gradually ripe to turn into current available scheme, these schemes
Make it possible printing that the even more small figure in λ/4 is realized using 193nm wavelength light sources with technological break-through, the above method is one
Determine to solve technical bottleneck of the semiconductor industry in field of lithography in degree, and promote the development of Moore's Law.
Method using single exposure technology patterned media layer is usually：The deposits dielectric materials formation medium on substrate
Layer, forms hard mask layer on dielectric layer, photoresistance film is coated with hard mask layer, through hole is formed in photoresistance film after a photoetching
Figure, by etching technics, with via hole image patterned hard mask layer and dielectric layer, finally removes hard mask layer.However, with
Semiconductor device miniature, the figure spacing of medium layer pattern is gradually reduced, and the requirement to resolution ratio is gradually stepped up accordingly.By
In the limitation of exposure device and photoresist, developed skill using existing application resolution（RET）To improve resolution ratio, formed
Via hole image with small spacing there has been certain difficulty in the realization of its technique, therefore, and industry is badly in need of not changing existing
On the premise of photoetching infrastructure, the solution of photoetching resolution is effectively improved.
In Application No. 200710129438.X patent, proposition is formed in the semiconductor device using double-exposure technique
The method of pattern, first, in semiconductor substrate（Its top layer is dielectric layer）On be sequentially depositing multi-functional hard mask layer, first cover firmly
Film layer and the second hard mask layer, by double exposing and etching, form the superposition pattern of the first and second hard mask layers, utilize this
It is superimposed pattern to pattern multi-functional hard mask layer, resist flow process, shape is then performed on multi-functional hard mask layer pattern
Into through-hole pattern, finally using the through-hole pattern come patterned semiconductor substrate.Although proposing double exposure technique in this patent,
But, the hard mask layer number of plies is more, and after through-hole pattern is formed, it is circular logical to be formed that resist flow process is also performed again
Hole, not only processing step is more, extends the process time, also add unnecessary production cost.In order to overcome above mentioned problem,
Need to utilize double-exposure technique, develop simple and direct technique to complete high resolution design.Because waffle-like pattern photoetching,
After etching, the through-hole pattern with certain fillet structure is can be formed directly in, so this pattern is applied into double-exposure technique
In, it will simplify processing step, bring bigger productivity effect.
The content of the invention
In view of the above-mentioned problems, the main object of the present invention is provides a kind of forming method of via hole image, can not only profit
Exposure resolution ratio is improved with existing exposure technique, additionally it is possible to simplify production stage, improve production efficiency, cost-effective, increase warp
Ji benefit.
To achieve the above objectives, the present invention provides a kind of forming method of via hole image, comprises the following steps：
Step S01:Deposits dielectric materials formation dielectric layer on a semiconductor substrate, and sequentially form on dielectric layer the
One hard mask layer and the second hard mask layer；Wherein, the material of the first hard mask layer is different from the material of the second hard mask layer；
Step S02：It is coated with the first photoresistance film layer on the second hard mask layer, photoetching the first photoresistance film layer has the to be formed
First photoresistance film layer of one through hole spirte；
Step S03：By etching technics, the second hard mask layer is patterned with first through hole spirte；
Step S04：Remove the first described photoresistance film layer；
Step S05：The second photoresistance film layer is coated with the body structure surface formed through above-mentioned steps, the photoresistance film of photoetching second is with shape
Into the second photoresistance film layer with the second through hole spirte；
It should be noted that the first and second through hole spirtes here are lattice-like pattern.
Step S06:By etching technics, with first through hole spirte and the superposition pictorial pattern of the second through hole spirte
Change described the first hard mask layer and dielectric layer, through-hole pattern is formed in the dielectric layer；
Step S07:Remove the second photoresistance film layer and the second hard mask layer.
Preferably, the first and second through hole spirtes are square net shape figure.
Preferably, the through hole line width in first through hole spirte be 2 times of through hole line width of via hole image in dielectric layer with
On.
Preferably, the through hole line width in first through hole spirte is 3 times of through hole line width of via hole image in dielectric layer.
Preferably, the figure spacing in first through hole spirte is 1.5 times of figure spacing of via hole image in dielectric layer
More than.
Preferably, the figure spacing in first through hole spirte is 2 times of figure spacing of via hole image in dielectric layer.
Preferably, the superposition figure of first through hole spirte and the second through hole spirte is etching through hole patterns figure
Shape.
Preferably, dielectric layer is silicon dioxide layer.
Preferably, dielectric layer is low K dielectric layer.
Preferably, dielectric layer is super low-K dielectric material.
Preferably, the material of low K dielectric layer is Fluorin doped silicate glass.
Preferably, also include in step S05：Between the second hard mask layer and the first photoresistance film, one layer of bottom is also coated with
Anti-reflective film layer.
Preferably, also include in step S02：Between the first hard mask layer and the second photoresistance film, one layer of bottom is also coated with
Anti-reflective film layer.
It can be seen from the above technical proposal that compared with conventional photoetching through hole, a kind of making of via hole image of the invention
Method, the minimum spacing of the figure of double exposure Graphics overlay formation reduces.Moreover, the first and second spirtes are latticed
Figure, the through hole with fillet is can be formed directly in by etching technics, it is not necessary to carry out resist flow process again.It can not only drop
Low exposure technology difficulty, improves exposure resolution ratio, additionally it is possible to simplify technique, improves production efficiency, cost-effective.
Brief description of the drawings
Fig. 1 is the schematic diagram of the medium layer pattern in the embodiment of the present invention
Fig. 2 is the schematic diagram of the first through hole spirte formed in the embodiment of the present invention
Fig. 3 is the schematic diagram of the second through hole spirte formed in the embodiment of the present invention
Fig. 4 is that the first through hole spirte in the embodiment of the present invention is superimposed showing for the figure to be formed with the second through hole spirte
It is intended to
Fig. 5 is a kind of schematic flow sheet of a preferred embodiment of the forming method of via hole image of the invention
Fig. 6-Figure 12 is a kind of section signal of main technological steps of the forming method of via hole image of the embodiment of the present invention
Figure
Fig. 6 is to sequentially form dielectric layer, the section of the first and second hard mask layers on substrate in the embodiment of the present invention to show
It is intended to
Fig. 7 is the diagrammatic cross-section of the upper first photoresistance film layer of coating in the embodiment of the present invention
Fig. 8 is the diagrammatic cross-section after first time exposure imaging in the embodiment of the present invention
Fig. 9 is the diagrammatic cross-section after etching is removed photoresist for the first time in the embodiment of the present invention
Figure 10 is the diagrammatic cross-section after upper second photoresistance film of coating in the embodiment of the present invention
Figure 11 is the diagrammatic cross-section after second of exposure imaging in the embodiment of the present invention
Figure 12 is the diagrammatic cross-section after second of etching is removed photoresist in the embodiment of the present invention
Embodiment
Embodying some exemplary embodiments of feature of present invention and advantage will in detail describe in the explanation of back segment.It should be understood that
It is that the present invention can have various changes in different examples, it is neither departed from the scope of the present invention, and explanation therein
And diagram is illustrated as being used in itself, and it is not used to the limitation present invention.
Above and other technical characteristic and beneficial effect, by conjunction with the embodiments and accompanying drawing 1-12 to the present invention a kind of through hole
The forming method of figure is described in detail.
In the present invention, the shape of the through hole in medium layer pattern can be arbitrary.In the present embodiment, with identical just
The present invention is explained exemplified by the medium layer pattern of square through hole composition, is not other through hole shapes in the limitation present invention
The medium layer pattern of shape composition.Referring to Fig. 1, being the schematic diagram of the medium layer pattern in the embodiment of the present invention.101 shown in figure
For 1 through hole in medium layer pattern, illustrate below by taking this through hole 101 as an example.Through hole 101 is square.Through hole 101
The minimum spacing repeated with the spacing of adjacent through-holes plus both the line width of through hole 101 sums for this figure of through hole 101,
It is the minimum spacing of medium layer pattern.The requirement of the minimum resolution of photoetching process is generally determined by the minimum spacing of figure, most
Small spacing is smaller, and the requirement to photoetching resolution is higher.
In the present invention, the shape of through holes in first through hole spirte can be arbitrary.In the present embodiment, first through hole
Through hole in figure is identical square through-hole, be not limitation the present invention in other shape of through holes composition first
Through hole spirte.Referring to Fig. 2, Fig. 2 is the schematic diagram of the first through hole spirte formed in the embodiment of the present invention.Shown in figure
201 be 1 through hole in first through hole spirte.Illustrate below by taking this through hole 101 as an example.In first through hole spirte
The line width of through hole 201 is 3 times of the line width of through hole 101 in medium layer pattern as shown in Figure 1.Through hole 201 and the spacing of adjacent through-holes
Both line width plus through hole 201 sums are the minimum spacing that this figure of through hole 201 repeats, and are also first through hole spirte
Minimum spacing.The minimum spacing of first through hole spirte is 2 times of the minimum spacing of medium layer pattern as shown in Figure 1, drop
The low resolution requirement to photoetching process.
In the present invention, the shape of through holes in the second through hole spirte can be arbitrary.In the present embodiment, in Fig. 3
Two-way Confucius figure for the present invention an example, be not limitation the present invention in other shape of through holes composition second lead to
Confucius's figure.Referring to Fig. 3, Fig. 3 is the schematic diagram of the second through hole spirte formed in the embodiment of the present invention.Second through hole
Adjacent through-holes spacing in figure adds the minimum spacing that both through hole line width sums are the second through hole spirtes, the second through hole subgraph
The minimum spacing of shape is 2 times of the minimum spacing of medium layer pattern as shown in Figure 1, and reducing will to the resolution ratio of photoetching process
Ask.
Fig. 4 is that the first through hole spirte in the embodiment of the present invention is superimposed showing for the figure to be formed with the second through hole spirte
It is intended to.Figure figure used in the first hard mask layer of patterning and dielectric layer.
In conjunction with accompanying drawing 5 ~ 12, the medium layer pattern described in Fig. 1 is formed to the present invention by a specific embodiment
The method of double-exposure technique is progressively described in detail.
Fig. 5 is a kind of schematic flow sheet of a preferred embodiment of the forming method of via hole image of the invention.In this reality
Apply in example, a kind of forming method of via hole image includes step S01-S07, step S01-S07 is respectively edge by accompanying drawing 6 ~ 12
AA ' directions cut-away illustration in Fig. 4, to illustrate the section knot formed during the preparation method specific steps described in Fig. 5 of the present invention
Structure.
Referring to Fig. 5, as illustrated, in this embodiment of the invention, a kind of sharp forming method of via hole image includes
Following steps：
Step S01:Referring to Fig. 6, deposits dielectric materials form dielectric layer 502 in Semiconductor substrate 501, and it is being situated between
The first hard mask layer 503 and the second hard mask layer 504 are sequentially formed on matter layer 502.The material of first hard mask layer 503 is different from
The material of second hard mask layer 504.
Preferably, dielectric layer 502 is silicon dioxide layer, low K dielectric layer or super low-K dielectric material.
Further, the low K dielectric layer material of dielectric layer 502 is advanced low-k materials, such as Fluorin doped silicate glass.
Step S02：Referring to Fig. 7, the first photoresistance film layer 505 is coated with the second hard mask layer 504, referring to Fig. 8, light
The first photoresistance film layer 505 is carved, to form the first photoresistance film layer 505 with first through hole spirte.
Further, referring again to Fig. 8, bottom anti-reflective is coated between the second hard mask layer 504 and the first photoresistance film 1
Penetrate film 2.
Specifically, by a series of photoetching processes such as front baking, alignment, exposure, rear baking, developments, with the shown in Fig. 2
One through hole spirte patterns the first photoresistance film layer 505.
Further, first through hole spirte is referring again to Fig. 2, and the figure of dielectric layer 502 is referring again to Fig. 1.Normal conditions
Under, the through hole line width in first through hole spirte can be more than 2 times of the through hole line width of the figure in dielectric layer 502, first
Figure spacing in through hole spirte can be more than 1.5 times of the figure in dielectric layer 502.In embodiments of the present invention, it is excellent
Through hole line width in selection of land, first through hole spirte is 3 times of the through hole line width of the figure in dielectric layer 502, first through hole
Figure spacing in figure is 2 times of the figure in dielectric layer 502.
Step S03：By etching technics, the second hard mask layer 504 is patterned with first through hole spirte.
Step S04：Remove the first photoresistance film layer 505.
Further, referring to Fig. 9, by etching technics, remove photoresist after, complete first through hole spirte to the second hard mask
The patterning of layer 504.
Step S05：Referring to Fig. 10, being coated with the second photoresistance film layer 506 on the first hard mask layer 503, Figure 11 is referred to,
The second photoresistance of photoetching film layer 506, to form the second photoresistance film layer 506 with the second through hole spirte.
Further, referring again to Figure 10, bottom is coated between the first hard mask layer 503 and the second photoresistance film 3 and is resisted
Reflectance coating 4.
Specifically, by a series of photoetching processes such as front baking, alignment, exposure, rear baking, developments, with the shown in Fig. 3
The patterned second photoresistance film layer 506 of two-way Confucius.
Further, the second through hole spirte is referring again to Fig. 3, and the figure of dielectric layer 502 is referring again to Fig. 1.In the present invention
In embodiment, the second through hole spirte is the even partition to the through hole in described first through hole spirte so that first leads to
The through hole line width of the superposition figure of Confucius's figure and the second through hole spirte is 1/3 of the through hole line width in the first spirte.
In the embodiment of the present invention, because first through hole spirte and the second through hole spirte are square net shape figure, therefore
Each through hole of first through hole spirte is correspondingly divided into 4 small square through-holes of identical by two-way Confucius figure, wherein
Figure spacing in second through hole spirte is the through hole in 2 times of the via hole image in dielectric layer 502, the second through hole spirte
Line width is 2 times of the via hole image in dielectric layer 502.The embodiment does not limit this to explain the preferred embodiments of the present invention
Invention scope.
Step S06:By etching technics, with first through hole spirte and the superposition pictorial pattern of the second through hole spirte
Change first hard mask layer 503 and dielectric layer 502；
It is noted that the superposition figure of first through hole spirte and the second through hole spirte is etching through hole pattern institute
Use figure.
Step S07:Remove the second photoresistance film layer 506 and the second hard mask layer 504.
Specifically, Figure 12 is referred to, by etching technics and after removing photoresist, by first through hole spirte and the second through hole subgraph
Shape is superimposed patterned first hard mask layer 503 and dielectric layer 502 to be formed.507 be the through hole of dielectric layer 502.
Further, it is that first through hole spirte is superimposed the figure to be formed with the second through hole spirte referring again to Fig. 4
Schematic diagram.Figure figure used in the first hard mask layer 503 of patterning and dielectric layer 502.
Further, it is the figure of the formation of dielectric layer 502 referring again to Fig. 1.101 be one in the figure of dielectric layer 502
Through hole.
In summary, by means of the invention it is also possible to make the line width and minimum spacing of double exposure figure be all higher than being situated between
Matter layer pattern, reduces the difficulty of photoetching process, and the minimum spacing of the figure of double exposure Graphics overlay formation reduces, and carries
High resolution ratio.
Above-described is only embodiments of the invention, the embodiment and the patent protection model for being not used to the limitation present invention
Enclose, therefore the equivalent structure change that every specification and accompanying drawing content with the present invention is made, it similarly should be included in this hair
In bright protection domain.
Claims (10)
1. a kind of forming method of via hole image, it is characterised in that methods described comprises the following steps：
Step S01:Deposits dielectric materials formation dielectric layer, and first is sequentially formed on the dielectric layer on a semiconductor substrate
Hard mask layer and the second hard mask layer；Wherein, the material of first hard mask layer is different from the material of second hard mask layer
Material；
Step S02：The first photoresistance film layer is coated with second hard mask layer, the first photoresistance film layer described in photoetching is to form tool
There is the first photoresistance film layer of first through hole spirte；Wherein, the first through hole spirte is lattice-like pattern；
Step S03：By etching technics, second hard mask layer is patterned with the first through hole spirte；
Step S04：Remove the first described photoresistance film layer；
Step S05：Be coated with the second photoresistance film layer in the body structure surface that is formed through above-mentioned steps, the second photoresistance film layer described in photoetching with
Form the second photoresistance film layer with the second through hole spirte；Wherein, the second through hole spirte is lattice-like pattern；
Step S06:By etching technics, the superposition with the first through hole spirte and the second through hole spirte is patterned
First hard mask layer and dielectric layer, via hole image is formed in described dielectric layer；Wherein, the second through hole spirte
By each mesh segmentation of the first through hole spirte into several grids, several described grid protocols and via hole image phase
Same figure；
Step S07:Remove the second photoresistance film layer and the second hard mask layer.
2. forming method according to claim 1, it is characterised in that described first through hole spirte and the second through hole
Figure is square net shape figure.
3. forming method according to claim 1, it is characterised in that the through hole line width in the first through hole spirte is
More than 2 times of the through hole line width of via hole image in the dielectric layer.
4. forming method according to claim 3, it is characterised in that the through hole line width in the first through hole spirte is
3 times of the through hole line width of via hole image in the dielectric layer.
5. forming method according to claim 1, it is characterised in that the figure spacing in the first through hole spirte is
More than 1.5 times of the figure spacing of via hole image in the dielectric layer.
6. forming method according to claim 5, it is characterised in that the figure spacing in the first through hole spirte is
2 times of the figure spacing of via hole image in the dielectric layer.
7. forming method according to claim 1, it is characterised in that described first through hole spirte leads to described second
Confucius's Graphics overlay figure is etching through hole patterns figure.
8. forming method according to claim 1, it is characterised in that the dielectric layer is without low-K dielectric property
Silicon dioxide layer, low K dielectric layer.
9. forming method according to claim 8, it is characterised in that the material of the low K dielectric layer is Fluorin doped silicic acid
Salt glass.
10. forming method according to claim 1, it is characterised in that in second hard mask layer in the step S02
And first between photoresistance film, one layer of bottom anti-reflective film layer is also coated with；In the step S05, in first hard mask layer and
One layer of bottom anti-reflective film layer is also coated between second photoresistance film.
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| CN104752319B (en) * | 2013-12-27 | 2017-12-01 | 中芯国际集成电路制造(上海)有限公司 | The forming method of conductive hole array pattern |
| CN104460244A (en) * | 2013-12-30 | 2015-03-25 | 苏州矩阵光电有限公司 | Process for assisting integrated optical production by utilizing double exposure technology |
| CN106129042B (en) * | 2016-06-30 | 2019-02-19 | 上海华力微电子有限公司 | Adjust the structure and method, photolithography method of substrate surface reflectivity |
| CN110707005B (en) | 2018-08-03 | 2022-02-18 | 联华电子股份有限公司 | Semiconductor device and method of forming the same |
| CN112086363B (en) * | 2020-09-16 | 2021-04-13 | 北京智创芯源科技有限公司 | Ion implantation method, preparation method of mercury cadmium telluride chip and mercury cadmium telluride chip |
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| CN101207037A (en) * | 2006-12-22 | 2008-06-25 | 海力士半导体有限公司 | Method for forming a pattern in the same with double exposure technology |
| CN101393846A (en) * | 2007-09-18 | 2009-03-25 | 海力士半导体有限公司 | Method for forming pattern of semiconductor device |
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| US20040038537A1 (en) * | 2002-08-20 | 2004-02-26 | Wei Liu | Method of preventing or suppressing sidewall buckling of mask structures used to etch feature sizes smaller than 50nm |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101207037A (en) * | 2006-12-22 | 2008-06-25 | 海力士半导体有限公司 | Method for forming a pattern in the same with double exposure technology |
| CN101393846A (en) * | 2007-09-18 | 2009-03-25 | 海力士半导体有限公司 | Method for forming pattern of semiconductor device |
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