CN102880592A - High-precision processing device and high-precision processing method for 3780-point FFT (fast Fourier transform) by sequential output - Google Patents

High-precision processing device and high-precision processing method for 3780-point FFT (fast Fourier transform) by sequential output Download PDF

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CN102880592A
CN102880592A CN2012103797505A CN201210379750A CN102880592A CN 102880592 A CN102880592 A CN 102880592A CN 2012103797505 A CN2012103797505 A CN 2012103797505A CN 201210379750 A CN201210379750 A CN 201210379750A CN 102880592 A CN102880592 A CN 102880592A
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points
fft
output
cache1
computing
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蒋蓝祥
刘昌银
万欣
张鹏
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SUZHOU WEISHIDA INFORMATION TECHNOLOGY Co Ltd
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Abstract

The invention provides a high-precision processing device for 3780-point FFT (fast Fourier transform) by sequential output. The high-precision processing device for 3780-point FFT by sequential output is characterized in that the device decomposes 3780-point FFT to 4X5X7X27 by prime factors according to a prime factor algorithm, achieves high-precision FFT operation according to the small point operation sequence of 4 points, 3 points, 9 points, 7 points and 5 points and achieves conventional FFT operation of 4 points, 5 points, 7 points and 27 points by comprehensively using a WFTA (winograd Fourier transform algorithm) algorithm and a mixed-radix algorithm; and extra sequencing operation is not needed for an intermediate processing process and a final output process of the device by the aid of a memory of a 'ping-pong' structure and an address control module of a modulus accumulator structure, and accordingly time for processing required storage resources is greatly saved.

Description

3780 FFT treating apparatus of a kind of high precision of Sequential output and method
Technical field
The present invention relates to the Fast Fourier Transform (FFT) treatment technology, particularly a kind of implementation method for leaf transformation processor in China Digital TV broadcasting ground transmission standard 3780 point discrete Fouriers.
Background technology
DTTB is the important component part in the radio and television system, and DTMB is the Digital TV broadcasting standard for terrestrial that China has independent intellectual property right.The development that is asserted China's sized enterprises in chinese DTV industry of this standard has brought new opportunity.Time-domain synchronization OFDM technology (TDS-OFDM) as its core technology, by time domain and frequency domain hybrid processing, realized that simply and easily quick code word catches and sane synchronous tracking, 3780 sub-carrier numbers that wherein design by comprehensive considering various effects, have in actual applications certain originality and novelty, formed and Europe, autonomous core technology that day multi-transceiver technology is different.
For 3780 FFT two kinds of methods are arranged generally: the one, by being 4096 points with 3780 interpolations, utilize base-2 or base-4 algorithms to realize 4096 FFT, then obtain 3780 FFT by subtracting sampling; The 2nd, be decomposed into 3 * 4 * 5 * 7 * 9 with 3780, obtain 3780 DFT by the DFT that calculates point.And the prime factor algorithm multiplying of twiddle factor of having compared the cancellation of mixed base algorithm is more simple and can realize with the location sequential operation with Winograd algorithm structure compared, is a kind of the most frequently used method that realizes Fei Ji-2 FFT.
But prime factor algorithm must face the problem of a rearrangement, and rearrangement just means the necessary first-level buffer district that increases, and needs to consume a large amount of memory resources, has not only improved hardware cost and has also reduced processing speed, has increased the complexity of control.The way that also has is avoided rearrangement by the project organization of revising point DFT, but need to carry out the redesign of small point DFT for different designs, and method can not the general and same complexity that increased.
Aspect small point computing ordering, ascending order of operation is all adopted in most design, but such order might not reach the highest operational precision.
Summary of the invention
Fundamental purpose of the present invention is, 3780 FFT treating apparatus of high precision of a kind of Sequential output are provided.Prime factor algorithm of the present invention does not need rearrangement, do not need the design of making amendment to small point FFT yet, each small point computing is with the location order, thereby simplified algorithm design, adopt " table tennis " storage organization to improve arithmetic speed and data throughput, reduce memory resource, reduced hardware cost.And the present invention carries out emulation by the Modulation Error Rate to design, draws optimum point FFT order of operation, has greatly improved the precision for the treatment of apparatus.
Based on above-mentioned purpose, the present invention adopts the prime factor algorithm of Sequential output to realize 3780 DFT.Particularly, 3780 are decomposed into 3780=4 * 27 * 7 * 5, four coprime factors.When carrying out 3780 DFT, carry out first at 4 of 945 routines with location WFTA, then carry out at 27 of 140 routines with location hybrid base FFT computing, carry out again at 7 of 540 routines with location WFTA, carry out at last at 5 of 756 routines with location WFTA.27 are carried out first at 3 of 9 routines with location WFTA during with location hybrid base FFT computing, then 27 data of gained and conventional 27 twiddle factors are multiplied each other, and carry out 9 WFTA of 3 routines again.In the whole calculating process, the DFT computing of each point is with the location order, and each point DFT computing module does not need the design of making amendment.
The storer that the present invention forms a ping-pong structure with storer Cache1 and the Cache2 of two 3780 plural numbers, as Cache1 during as output storage, Cache2 is then as input and calculation process storer; After the once-through operation cycle finished, two storeies exchanged states, and Cache2 is as output storage, and Cache1 is as input and calculation process storer.Writing data into the ping-pong structure storer from the outside is according to natural ordered; In each small point DFT calculating process from the address of memory read data and the complete rear write store of computing be order and also with the location; After computing is complete, output to outside address from storer and obtained by the Sequential output control module, guarantee that the output data are sequentially with inputting the same.The Sequential output control module is made of a register, a totalizer, a selector switch, has similar structure and resource consumption identical with the direct Sequential output of source address, finishes a modulus accumulating operation and obtains the reading address that Sequential output needs.Can be further understood by following detailed description and accompanying drawings about advantage of the present invention and method.
Description of drawings
Fig. 1 adopts ping-pong structure based on 3780 FFT functional block diagrams of Sequential output prime factor algorithm;
Fig. 2 is the Sequential output functions of modules block diagram that adopts modulus totalizer structure;
Fig. 3 is the natural order address generate functional block diagram that adopts common totalizer structure;
Fig. 4 is the MER simulation result chart under the various small point permutation and combination;
Fig. 5 is that optimum small point is arranged operational flowchart;
Fig. 6 is ping-pong structure storer and input and output sequential block diagram;
Fig. 7 adopts ping-pong structure based on 3780 FFT process flow diagrams of Sequential output prime factor algorithm;
Fig. 8 is based on 27 DFT design flow diagram of conventional mixed base algorithm.
Embodiment
The below is to elaborating preferred embodiment of the present invention by reference to the accompanying drawings, thereby so that advantages and features of the invention can be easier to be it will be appreciated by those skilled in the art that protection scope of the present invention made more explicit defining.
According to the prime factor decomposition algorithm, the N decomposition is obtained each factor N 1, N 2..., N MAs shown in the formula:
N=N 1×N 2×…×N M (1)
For i, j=1,2 ..., M and as i ≠ j has GCD (N i, N j)=1.
The DFT of N point sequence x (n) is defined as:
X ( k ) = DFT [ x ( n ) ] = Σ n = 0 N - 1 x ( n ) W N nk - - - ( 2 )
W wherein N=e -j2 π/N
Such as (1) formula, N is resolved into M the coprime factor multiply each other, then one dimension N point FFT is transformed to M dimension FFT.Be realization order identical address operation, n and k adopt same subscript mapping mode, as shown in the formula:
n = < &Sigma; i = 1 M ( N N i ) n i > N - - - ( 3 )
k = < &Sigma; i = 1 M ( N N i ) k i > N - - - ( 4 )
N in the formula i, k i=0,1 ..., N i-1;< NExpression delivery N.
With (3) (4) formula substitutions (2) formula, can get
X ( k ) = X ~ ( k 1 , k 2 , &CenterDot; &CenterDot; &CenterDot; , k M ) = &Sigma; n 1 = 0 N 1 - 1 &CenterDot; &CenterDot; &CenterDot; &Sigma; n M = 0 N M - 1 x ~ ( n 1 , n 2 , &CenterDot; &CenterDot; &CenterDot; , n M ) &times; W N 1 ( N N 1 ) n 1 k 1 &CenterDot; &CenterDot; &CenterDot; W N M ( N N M ) n M k M - - - ( 5 )
Wherein
x ~ ( n 1 , n 2 , &CenterDot; &CenterDot; &CenterDot; , n M ) = x ( < &Sigma; i = 1 M ( N N i ) n i > N ) - - - ( 6 )
X ~ ( k 1 , k 2 , &CenterDot; &CenterDot; &CenterDot; , k M ) = X ( < &Sigma; i = 1 M ( N N i ) k i > N ) - - - ( 7 )
For getting the DFT canonical form, select following mapping relations:
k i &prime; = &Delta; < ( N N i ) k i > N i - - - ( 8 )
Then have
X ~ ( k 1 &prime; , k 2 &prime; , &CenterDot; &CenterDot; &CenterDot; , k M &prime; )
= &Sigma; n M = 0 N M - 1 &CenterDot; &CenterDot; &CenterDot; &Sigma; n 1 = 0 N 1 - 1 x ~ ( n 1 , n 2 , &CenterDot; &CenterDot; &CenterDot; , n M ) W N 1 n 1 k 1 &prime; &CenterDot; &CenterDot; &CenterDot; W N M n M k M &prime; - - - ( 9 )
= DFT N M { &CenterDot; &CenterDot; &CenterDot; DFT N 2 [ DFT N 1 ( x ( n ) ) ] &CenterDot; &CenterDot; &CenterDot; }
The N point DFT of former one dimension has been transformed into the DFT of M dimension.Every one dimension then is N iThe DFT of point calculates:
X ( k i &prime; ) = &Sigma; n i = 0 N i - 1 x ( n i ) W N i n i k i &prime; - - - ( 10 )
Such as following formula, can realize N iThe order identical address operation of point DFT.Output data for each computing in the identical address operation deposit memory address corresponding to input data in the storer in, therefore, also only need N plural number of storage for whole N point FFT computing, no matter be original input data, intermediate operations result or final output data, can use same storer.
DFT for the M dimension calculates, and so long be used as M two-dimentional DFT to it and calculate to process.At first, calculate (N/N 1) group N 1Point DFT; Then calculate (N/N 1) group N 2Point DFT; By that analogy, calculate at last (N/N 1) group N MPoint DFT.According to this algorithm, at each N iThe DFT computing time can obtain according to formula (3) the allocation index formula of a two dimension:
n = < ( N N i ) &times; n i + a i > N - - - ( 11 )
A wherein i=0,1,2 ..., (N/N i), represent a iThe N of group iPoint DFT computing, n iRepresent every group of N iThe input order of point DFT.So can realize N iThe same location sequential operation of point, and pilot process need not carry out whole order.
For obtaining the Sequential output of final data, select:
< ( N N i ) B i > N i = 1 - - - ( 12 )
Then have:
< < ( N N i ) k i > N i B i > N i = < k i > N i - - - ( 13 )
Got by formula (8): < k i &prime; B i > N i = < k i > N i
Then have:
k i=k i′B i+N it i (14)
T wherein iBe integer, with formula (14) substitution formula (4):
k = < &Sigma; i = 1 M ( N N i ) k i &prime; B i > N
According to Chinese remainder theorem, can be got by following formula:
k i &prime; = < k > N i - - - ( 15 )
Because each N iPoint DFT computing has: k with the location i'=n i, formula (15) substitution formula (3) can be got:
n = < &Sigma; i = 1 M ( N N i ) k > N
That is:
n=<C×k> N (16)
Wherein
Figure BDA00002233602400067
Be constant.Because k is the order value, formula (16) can be realized by a modulus totalizer.
For 3780 DFT, N=3780 can be broken down into M=4 coprime factor 3780=4 * 5 * 7 * 27, N 1=4, N 2=27, N 3=7, N 4=5, then former 3780 FFT have converted the DFT calculating of one 4 dimension, operational flowchart such as Fig. 7 to.Utilize above-mentioned prime factor algorithm, carry out computing according to following steps: calculate first 945 4 DFT; Calculate again 140 27 DFT; Then calculate 540 7 DFT; Calculate at last 756 5 DFT.The Input Address index that each small point DFT calculates also can be obtained by formula (11):
The allocation index of 4 DFT is:
n=<945×n 1+a 1> 3780
Wherein, n 1=0,1,2,3; a 1=0,1 ..., 944.When the 0th group of 4 DFT calculates, a 1=0, n 1It is the input sequence of 4 DFT; In like manner, 4 DFT of i group calculate and are a 1=i, n 1Value is carried out DFT calculating successively;
The allocation index of 27 DFT is:
n=<140×n 2+a 2> 3780
Wherein, n 2=0,1 ..., 26; a 2=0,1 ..., 139.When the 0th group of 27 DFT calculates, a 2=0, n 2It is the input sequence of 27 DFT; In like manner, 27 DFT of i group calculate and are a 2=i, n 2Value is carried out DFT calculating successively;
The allocation index of 7 DFT is:
n=<540×n 3+a 3> 3780
Wherein, n 3=0,1 ..., 6; a 3=0,1 ..., 539.When the 0th group of 7 DFT calculates, a 3=0, n 3It is the input sequence of 7 DFT; In like manner, 7 DFT of i group calculate and are a 3=i, n 3Value is carried out DFT calculating successively;
The allocation index of 5 DFT is:
n=<756×n 4+a 4> 3780
Wherein, n 4=0,1 ..., 4; a 4=0,1 ..., 755.When the 0th group of 5 DFT calculates, a 4=0, n 4It is the input sequence of 5 DFT; In like manner, 5 DFT of i group calculate and are a 4=i, n 4Value is carried out DFT calculating successively.
According to the mixed base algorithm design, decomposing 27 is 3 * 9, design flow diagram such as Fig. 8 for 27 DFT.The mixed base algorithm is converted to two-dimentional DFT with 27 DFT computings of one dimension, allocation index mapping as shown in the formula:
n = n 1 + N 1 n 2 k = N 2 k 1 + k 2
Can get the DFT conversion:
X ( k 1 , k 2 ) = &Sigma; n 1 = 0 N 1 - 1 &Sigma; n 2 = 0 N 2 - 1 x ( n 1 , n 2 ) W N ( n 1 + N 1 n 2 ) ( N 2 k 1 + k 2 )
= &Sigma; n 1 = 0 N 1 - 1 [ [ &Sigma; n 2 = 0 N 2 - 1 x ( n 1 , n 2 ) W N 2 n 2 k 2 ] W N n 1 k 2 ] W N 1 n 1 k 1
Such as following formula, 27 mixed base calculation step: carry out first 9 groups of 3 DFT computings; Multiply by 27 twiddle factors; Carry out again 3 groups of 9 DFT computings and obtain the result.
4 points in the whole design, 7 points, 5 points, 3 and 9 DFT computings all adopt the WFTA algorithm to realize.3780 last Sequential output allocation indexs can get according to formula (15):
C=945+756+540+140=2381
n=<2381×k> 3780
For obtaining the k Sequential output, structure such as Fig. 2 can be finished by simple modulus accumulating operation and logical operation.Source address direct Sequential output address generation structure such as Fig. 3, contrast can find, and both have similar structure, and its resource consumption is minimum.
Because the how basic FFT of the integer power of 3780 FFT right and wrong 2, the regularity of its structure of integer power FFT compared to 2 certainly will be relatively poor, so complexity also exceeds much than 4096 FFT of close 2 integer power of counting.Therefore, after the good is olation of 3780 point selection, the order of discharging small point equally also is that research is crucial.
For 27,7,5,4 have the i.e. 24 kinds of modes of 4 factorial, and the calculating of 27 inside has dual mode, and a kind of is to be first 3 groups of 9 FFT, and then is 9 groups of 3 FFT; Another kind can be first 9 groups of 3 FFT, and then is 3 groups of 9 FFT, so for the is olation of this paper, one has 24 * 2=48 kind puts in order.Emulation of the present invention every kind of MER that puts in order, i.e. Modulation Error Rate, formula is as follows:
MER = 10 &times; log 10 &Sigma; N ( Matlab _ data ) 2 &Sigma; N ( Matlab _ data - fixed _ data ) 2
MER can be considered to a kind of form of snr measurement, and it will accurately show receiving end to the demodulation ability of signal, and simulation result as shown in Figure 4.The MER that draws 4,3,9,7,5 arrangement mode is the highest, constitutional diagram as shown in Figure 5.
Fig. 1 adopts the ping-pong structure realization based on 3780 FFT functional block diagrams of Sequential output prime factor algorithm.
3780 fft processors of described system mainly comprise: storer Cache1, the Cache2 of two 3780 plural numbers, 3780 3780 input data exporting data and input and calculation process that are used for the complete wait output of storage computing, two storeies form ping-pong structure, the order that enters data into the ping-pong structure storer from the outside is natural order, and adopting the Sequential output control module to obtain from the address that ping-pong structure outputs to external data, the data after the output also are natural order.And middle conventional small point DFT computing read-write memory all is order with the location, processes without any need for whole order.
Concrete treatment step such as process flow diagram 7:
The first step, the duty of selector switch selection memory Cache1 and Cache2, output state or input compute mode, and will input 3780 plural numbers and write input store by natural order, with the address Output rusults data that provide of output control module in order of data in the output storage, data time sequence figure such as Fig. 6 of input and output and table tennis storer Cache1 and Cache2;
Second step enters 4 WFTA unit from the input store read data, carries out 945 4 FFT computings, and the result writes source memory by source address, and 4 WFTA unitary operations are with the location;
The 3rd step entered 27 mixed base computing modules from the input store read data, carried out 140 27 FFT computings, and the result writes source memory by source address, reached the mixed base computing with the location, and its calculating process such as flow process are shown in Figure 8;
The 4th step entered 7 WFTA unit from the input store read data, carried out 540 7 FFT computings, and the result writes source memory by source address, and 7 WFTA unitary operations are with the location;
The 5th step entered 5 WFTA unit from the input store read data, carried out 756 5 FFT computings, and the result writes source memory by source address, and 5 WFTA unitary operations are with the location;
The 6th step, wait for that the arrival of next frame data repeats said process, and selector switch control " table tennis " process, two storeies change duty.
The above; it only is one of the specific embodiment of the present invention; but protection scope of the present invention is not limited to this; any those of ordinary skill in the art are in the disclosed technical scope of the present invention; variation or the replacement that can expect without creative work all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain that claims were limited.

Claims (4)

1. 3780 FFT treating apparatus of high precision of a Sequential output is characterized in that, described treating apparatus comprises:
Conventional 4 points, 5 points, 7 WFTA modules and 27 mixed base modules are used for carrying out the FFT computing of each small point, and read-write memory Cache1(or Cache2 during each small point computing) address and sequentially identical;
Storer Cache1 and the Cache2 of two " table tennis " structures make that the FFT computing is uninterrupted must carry out and constantly export operation result, can satisfy streaming output, have improved data throughout;
State and address control module, by read/write address and the duty of memory control state machine Cache1 and Cache2, control point FFT computing is carried out according to 4 points, 3 points, 9 points, 7 points, 5 order;
The OPADD control module is by the address of the last storer output of modulus totalizer structural generation data, to obtain 3780 outputs of final order.
2. 3780 FFT treating apparatus of high precision of a kind of Sequential output according to claim 1, it is characterized in that, described " table tennis " structure memory comprises storer Cache1 and storer Cache2, its workflow: when the first frame data arrive, write Cache1 according to natural order, carry out subsequently each small point FFT computing and each intermediate operations structure all is written to Cache1 by source address, i.e. identical address operation, this moment, Cache2 was idle and do not export data; When the second frame data arrived, the first frame data computing were complete and from Cache1 output, meanwhile the second frame data write Cache2 by natural order, and carry out each small point with location FFT computing; When the 3rd frame data arrived, Cache2 exported the second frame data, and the 3rd frame data write Cache1 and carry out the FFT computing, by that analogy.Device alternately is in output or input compute mode by selector switch control Cache1 and Cache2, guarantees that data export incessantly with stream mode.
3. 3780 FFT treating apparatus of high precision of a kind of Sequential output according to claim 1, it is characterized in that, described each point WFTA computing is carried out according to 4 points, 3 points, 9 points, 7 points, 5 order of operation, and the precision that reaches 3780 FFT treating apparatus is the highest.
4. 3780 FFT treating apparatus of high precision of a kind of Sequential output according to claim 1, it is characterized in that, described Sequential output control module is made of a register, a totalizer, a selector switch, has similar structure and resource consumption identical with the direct Sequential output of source address; The gained address is used for reading the output storage of " table tennis " structure, and then obtains 3780 Output rusults of order.
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Application publication date: 20130116