CN102857856B - Field programmable gate array-based (FPGA-based) multilevel sound mixing system - Google Patents
Field programmable gate array-based (FPGA-based) multilevel sound mixing system Download PDFInfo
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Abstract
The invention discloses a field programmable gate array-based (FPGA-based) multilevel sound mixing system, and aims at providing a novel sound mixing system with a simple structure. The FPGA-based multilevel sound mixing system comprises time division multiplexing (TDM) synthesis modules, a multilevel sound mixing control module and TDM decomposition modules. The multilevel sound mixing control module comprises first level processing modules, a second level processing module and a third level processing module. Two of the first level processing modules are connected with the third level processing module through the second processing module, and the rest first level processing module is directly connected with the third level processing module. An FPGA chip is used for realizing the mixing of ultra-large-volume digital audio to be inputted into a digital signal processor (DSP) after being subjected to system pre-stage processing, not only is the sound mixing of the ultra-large-volume audio realized, but also the system redundancy caused by the cascade connection of multiple devices can be avoided, and the cost is saved. The FPGA-based multilevel sound mixing system is applicable to an audio processing system with multiple input channels.
Description
Technical field
The present invention relates to acoustic processing field, especially relate to a kind of multistage mixer system based on FPGA that possesses a large amount of input channels.
Background technology
Along with the high speed development of digital technology, the raising of software and hardware level, constantly has high performance DSP and bus to be at a high speed applied, and the audio mixing matrix solution based on digital technology can be achieved.The developing direction of audio mixing matrix system is multi-functional, large capacity, can networks and can carry out long-range switching.Generally speaking the capacity that is limited by DSP bandwidth and disposal ability matrix system reaches 16 × 16 and is mass matrix.If need more jumbo matrix system, just must realize by many matrix system cascades.Matrix capacity is larger, and needed cascade is more, higher to hardware resource, and it is also larger that design realizes difficulty.Traditional 8*8 matrix device to realize 192 input voice-grade channels must 24 equipment cascading just can to realize system huge and complicated.
Specialty digitized audio samples frequency is 48KHZ, and maximum 32 bits of each sampled point, therefore the shift clock frequency of a passage equals 1.536MHZ.Adopt the time-division to utilize TDM technology, 192 input voice-grade channels of maximum system are synthesized together, shift clock frequency is up to 294.912MHZ, and the bandwidth of existing DSP process chip cannot meet this requirement.Meanwhile, DSP also cannot provide 192 audio input end confession digital audio and video signals inputs.
FPGA is English Field Programmable Gate Array(field programmable gate array) abbreviation, it is the product further developing on the basis of the programming devices such as PAL, GAL, PLD, is the highest one of integrated level in application-specific integrated circuit (ASIC) (ASIC).FPGA has adopted logical cell array LCA(Logic Cell Array) such new ideas, inside comprises configurable logic blocks CLB(Configurable Logic Block), output input module IOB(Input Output Block) and three parts of interconnector (Interconnect).User can reconfigure the logic module of FPGA inside and I/O module, to realize user's logic.It also has static state can overprogram and dynamically in the characteristic of system reconfiguration, and the function of hardware can be as software be revised by programming.As a kind of semi-custom circuit in application-specific integrated circuit (ASIC) (ASIC) field, FPGA had both solved the deficiency of custom circuit, had overcome again the limited shortcoming of original programming device gate circuit number.
DSP(digital singnal processor) be a kind of microprocessor of uniqueness, there is the complete instruction system of oneself, be the device of processing bulk information with digital signal.A digital signal processor includes memory cell of control unit, arithmetic element, various register and some etc. in a little chip, can also connect some memories in its periphery, and can communicate by letter mutually with the external equipment of some, having the full functionality of soft and hardware, itself is exactly a microcomputer.
FPGA is hardware completely, and all signal parallels are carried out, design be hardware configuration in fact.DSP hardware is fixed, design be use logic.FPGA processes faster.
State Intellectual Property Office of the People's Republic of China discloses Granted publication number on 03 14th, 2012 be the patent documentation of CN202168213U, title is Multi-channel audio sound mixing control system, it is mainly by multichannel voice frequency input system, Multi-channel audio sound mixing system and multichannel voice frequency output system composition, Multi-channel audio sound mixing system is matrix form mixer system, multichannel voice frequency input system is by microphone, audio amplifier circuit device and digital potentiometer composition, digital potentiometer is connected with the CPU of computer by Ethernet interface, multichannel voice frequency output system is earphone, sound equipment or loud speaker.This scheme still, for using matrix form mixer system, in the time having more input channel, need to have the equipment cascading of large amount of complex, realizes difficulty and cost is higher.
Summary of the invention
The present invention solves that prior art is existing realizes the technical problem high compared with mixer system complex structure, the cost of multiple input path by matrix, provide a kind of structure comparatively simple, cascade is few, and cost is low, can support the multistage mixer system based on FPGA of a large amount of input channels.
The present invention is directed to above-mentioned technical problem is mainly solved by following technical proposals: a kind of multistage mixer system based on FPGA, comprise TDM synthesis module, multistage audio mixing control module and TDM decomposing module, described TDM synthesis module is connected with described multistage audio mixing control module, described multistage audio mixing control module is connected with described TDM decomposing module, and described TDM decomposing module is connected with follow-up audio processing modules.TDM synthesis module is as input prime, and TDM decomposing module is as output rear class, and multistage audio mixing control module is as intermediate conveyor controlled stage.
TDM(Time-Division Multiplexing) be exactly time division multiplexing.Time division multiplexing refers to a kind of by the intersection digit pulse in different channels or time slot, transmits the technology of multiple digitalized datas, voice and video signal etc. simultaneously on same communication medium.
As preferably, described multistage audio mixing control module comprises third level processing module and several first order processing modules, first order processing module comprises the string modular converter, routing selecting module and the audio mixing adder Module that connect successively, and third level processing module comprises audio mixing adder Module and parallel serial conversion module.
As preferably, described multistage audio mixing control module also comprises second level processing module, described first order processing module has three, described second level processing module is connected with third level processing module and two first order processing modules respectively, and described second level processing module comprises an audio mixing adder Module.The first order processing module not being connected with the second collection processing module directly connects third level processing module.
Also modular converter is as input prime by going here and there for the first order processing module of audio mixing control module, and audio mixing adder Module is as output rear class, and routing selecting module is as intermediate conveyor controlled stage.The serial 16 railway digital signals of prime TDM synthesis module input are converted to 16 road parallel digital signals input routing selecting modules by string modular converter, and routing selecting module is made and parallel digital signal inputted after Route Selection to the audio mixing adder Module that outputs to rear class after audio mixing adder Module audio mixing.
The third level processing module of audio mixing control module is by audio mixing adder Module as input prime, and parallel serial conversion module is as output rear class.The parallel 16 railway digital signals of audio mixing adder Module input are converted to 16 road serial digital signal input rear classes by parallel serial conversion module, and audio mixing control module third level processing module is supported at most 2 groups of parallel serial conversion modules.
As preferably, shown in multistage mixer system based on FPGA also comprise a frequency multiplier, described TDM synthesis module comprises being incorporated to goes here and there out shift register, described being incorporated to gone here and there out shift register and is connected with described frequency multiplier, described being incorporated to gone here and there out shift register and comprised 8 inputs and 1 output, and described frequency multiplier is the frequency multiplier of 8 frequencys multiplication.The input prime of TDM synthesis module composition whole system, each TDM synthesis module can be supported at most 16 railway digital inputs.
As preferably, described TDM decomposing module comprises SI PO shift register, and described SI PO shift register comprises 1 input and 8 outputs, and described SI PO shift register is connected with described frequency multiplier.FPGA can support at most 2 groups of TDM decomposing module.
This programme, as the input prime of audio frequency processing system, carries out audio mixing to the audio frequency of input and passes to follow-up audio processing modules later.
It is compound that the digital audio that each audio frequency inputs or outputs module adopts TDM technology to carry out prime, takies an audio-frequency bus.When digital audio processing system input channel scale reaches 192, when output channel reaches 32, need altogether 12 of input modules (16 passage), 2 of output modules (16 passage), total serial digital audio data line has (12+2) * 8=112 bar, adopt after digital audio bus technology, only need 14 audio-frequency bus, between audio-frequency module, can enjoy mutually voice data, if it is all exposed on pcb board to adopt resolution element to take all data wires of circuit, be easy to be interfered, present all computings all complete in FPGA inside, so reliability is improved.
The substantial effect that the present invention brings is to reduce the complexity of pcb board wiring, and solved the reliability of signal transmission between audio-frequency module.The audio input end confession digital audio and video signals input of a greater number can be provided.Adopt the higher fpga chip of clock frequency ratio dsp processor to realize the mixing of vast capacity digital audio, the system redundancy that after processing as system prime, input DSP has not only realized extensive jumbo audio mixing but also avoided multiple devices cascade to cause, cost-saving.
Brief description of the drawings
Fig. 1 is a kind of system block diagram of the present invention;
Fig. 2 is a kind of first order processing module structured flowchart of the present invention;
Fig. 3 is a kind of third level processing module structured flowchart of the present invention;
Fig. 4 is a kind of TDM synthesis module schematic diagram of the present invention;
Fig. 5 a kind of TDM decomposing module schematic diagram of the present invention;
Fig. 6 a kind of TDM of the present invention synthesizes and decomposition algorithm design sketch;
In figure: 1, TDM synthesis module, 2, first order processing module, 3, second level processing module, 4, third level processing module, 5, TDM decomposing module, 6, frequency multiplier, 11, be incorporated to and go here and there out shift register, 21, string modular converter, 22, routing selecting module, 23, audio mixing adder Module, 41, audio mixing adder Module, 42, string modular converter, 51, SI PO shift register.
Embodiment
Below by embodiment, and by reference to the accompanying drawings, technical scheme of the present invention is described in further detail.
Embodiment: a kind of multistage mixer system based on FPGA of the present embodiment, as shown in Figure 1, comprises TDM synthesis module 1, multistage audio mixing control module and TDM decomposing module 5.Multistage audio mixing control module 2 comprises first order processing module 2, second level processing module 3 and third level processing module 4.
The present embodiment is designed to support maximum 16*12=192 railway digital inputs, 32 railway digital outputs.First order processing module 2 has three, and second level processing module 3 and third level processing module 4 respectively have one.Two first order processing modules 2 connect third level processing module 4 by second level processing module 3, and a remaining first order processing module 2 directly connects third level processing module 4.TDM synthesis module 1 has 12, and TDM decomposing module 5 has 2.
The multistage mixer system based on FPGA of the present embodiment also comprises a frequency multiplier 6, as shown in Figure 4, TDM synthesis module 1 comprises being incorporated to goes here and there out shift register 11, be incorporated to and go here and there out shift register 11 and be connected with frequency multiplier 6, be incorporated to and go here and there out shift register 11 and comprise 8 inputs and 1 output, frequency multiplier 6 is the frequency multiplier of 8 frequencys multiplication.As shown in Figure 5, TDM decomposing module 5 comprises SI PO shift register 51, and SI PO shift register 51 comprises 1 input and 8 outputs, and SI PO shift register 51 is also connected with frequency multiplier 6.All TDM synthesis modules 1 and all TDM decomposing module 5 all share same frequency multiplier 6.
TDM synthesis module 1 is realized and is incorporated to the conversion of going here and there out by the mode of shift LD, shift clock, by the serial clock SCLK of single channel digital signal is carried out to 8 process of frequency multiplication realizations in frequency multiplier 6, is namely mixed in 1 data lines with the speed Jiang16 road voice data (8 data lines) of 8 times of SCLK.
TDM decomposing module 5 is realized and is incorporated to the conversion of going here and there out by the mode of shift LD, namely the composite signal in 1 data lines is reduced to 16 road voice datas (8 data lines).
As shown in Figure 2, each first order processing module 2 comprises routing selecting module 22, audio mixing adder Module 23 and also modular converter 21 of four strings, and string modular converter 21 connect audio mixing adder Module 23 by routing selecting module 22.Each string modular converter 21 are connected with a TDM synthesis module 1, and each first order processing module 2 is connected with 4 TDM synthesis modules 1.Audio mixing adder Module 23 is exported 32 parallel-by-bit deal with data to second level processing module 3 or third level processing module 4.
Second level processing module 3 is audio mixing adder Module, by two-way 32 parallel-by-bit data mixing Wei Yi road 32 parallel-by-bit data and output to third level processing module 4.
Complex digital signal input first order processing module 2 is rear first resolves into 16 channel parallel data buses by going here and there and changing.A first order processing module can be processed the input of 4 groups of TDM synthesis modules 1 simultaneously, processes 16*4=64 channel parallel data simultaneously.In order to reduce system operand, the Route Selection of matrix all completes in the first order, and rear class is only as audio mixing adder; After Route Selection, each first order processing module 2 is exported 32 channel parallel datas and is entered subordinate's audio mixing module
As shown in Figure 3, third level processing module 4 comprises an audio mixing adder Module 41 and two parallel serial conversion modules 42.Audio mixing adder Module 41 is exported two 16 channel parallel datas to each parallel serial conversion module 42, and each parallel serial conversion module 42 is connected with a TDM decomposing module 5.
All audio mixing adder Module in the present embodiment have identical structure.
String modular converter 21 are also to realize by the mode of shift LD the conversion that seals in and go out, the clock of its shift clock used and TDM synthesis module 1 shares, also with regard to synchronous, original complex digital signal is reduced to 16 channel parallel datas, routing selecting module 22 is made up of one group of controlled switch, by the selection of switch, input and output is mapped.Audio mixing adder Module is completed by the adder unit of standard.
Parallel serial conversion module 42 is also to be realized and be incorporated to the conversion of going here and there out by the mode of shift LD, and its shift clock used also shares with the clock of TDM synthesis module 1, namely synchronously 16 channel parallel datas is integrated into complex digital signal.
16 railway digital inputs take 8 with data wire as shown in Figure 6, and every data lines is transmitted 2 railway digital signals simultaneously, switches 2 circuit-switched data by frame clock LRCK (also claiming WS).What LRCK represented to transmit for " 1 " is the 1st data, and what represent to transmit for " 0 " is the data on the 2nd tunnel.The frequency of LRCK equals sample frequency; Serial clock SCLK, is also bit clock (BCLK), i.e. each data of corresponding digital audio, and SCLK has 1 pulse.Frequency=2 × sample frequency × sampling resolution of SCLK; Serial data SDATA, the voice data representing by the complement of two's two's complement exactly.For making can be synchronous better between system, also need to transmit a signal MCLK in addition, be called master clock, be also system clock (Sys Clock), be 256 times or 384 times of sample frequency; After TDM composition algorithm resume module, 16 railway digital inputs synthesize 1 road complex digital signal, and now the constant data of only switching of LRCK frequency become 8 tunnels.
Specific embodiment described herein is only to the explanation for example of the present invention's spirit.Those skilled in the art can make various amendments or supplement or adopt similar mode to substitute described specific embodiment, but can't depart from spirit of the present invention or surmount the defined scope of appended claims.
Although more used the terms such as TDM decomposition algorithm module, audio mixing control module, audio mixing adder herein, do not got rid of the possibility that uses other term.Use these terms to be only used to describe more easily and explain essence of the present invention; They are construed to any additional restriction is all contrary with spirit of the present invention.
Claims (3)
1. the multistage mixer system based on FPGA, it is characterized in that, comprise TDM synthesis module, multistage audio mixing control module and TDM decomposing module, described TDM synthesis module is connected with described multistage audio mixing control module, described multistage audio mixing control module is connected with described TDM decomposing module, and described TDM decomposing module is connected with follow-up audio processing modules; Described multistage audio mixing control module comprises third level processing module and several first order processing modules, first order processing module comprises the string modular converter, routing selecting module and the audio mixing adder Module that connect successively, and third level processing module comprises audio mixing adder Module and parallel serial conversion module; Described multistage audio mixing control module also comprises second level processing module, described first order processing module has three, described second level processing module is connected with third level processing module and two first order processing modules respectively, and described second level processing module comprises an audio mixing adder Module.
2. the multistage mixer system based on FPGA according to claim 1, it is characterized in that, also comprise a frequency multiplier, described TDM synthesis module comprises being incorporated to goes here and there out shift register, described being incorporated to gone here and there out shift register and is connected with described frequency multiplier, described being incorporated to gone here and there out shift register and comprised 8 inputs and 1 output, and described frequency multiplier is the frequency multiplier of 8 frequencys multiplication.
3. the multistage mixer system based on FPGA according to claim 2, it is characterized in that, described TDM decomposing module comprises SI PO shift register, described SI PO shift register comprises 1 input and 8 outputs, and described SI PO shift register is connected with described frequency multiplier.
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CN108900952A (en) * | 2018-07-03 | 2018-11-27 | 无锡吉兴汽车声学部件科技有限公司 | Multi-channel digital based on DSP/simulation mixer system |
Families Citing this family (4)
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CN107993668A (en) * | 2017-11-27 | 2018-05-04 | 上海航天测控通信研究所 | A kind of method of the multi-path digital sound mixing based on McASP interfaces |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101055515A (en) * | 2007-05-19 | 2007-10-17 | 佛山市公信数字会议设备有限公司 | Interface device of 8 bit single chip microcomputer and 16 serial audio coder decoder connection |
CN101546558A (en) * | 2009-05-05 | 2009-09-30 | 南京莱斯信息技术股份有限公司 | Multipath input audio mixing and exchanging method |
CN101695023A (en) * | 2009-10-19 | 2010-04-14 | 南京莱斯信息技术股份有限公司 | Parallel expanded type multi-path audio exchange mixing system |
-
2012
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101055515A (en) * | 2007-05-19 | 2007-10-17 | 佛山市公信数字会议设备有限公司 | Interface device of 8 bit single chip microcomputer and 16 serial audio coder decoder connection |
CN101546558A (en) * | 2009-05-05 | 2009-09-30 | 南京莱斯信息技术股份有限公司 | Multipath input audio mixing and exchanging method |
CN101695023A (en) * | 2009-10-19 | 2010-04-14 | 南京莱斯信息技术股份有限公司 | Parallel expanded type multi-path audio exchange mixing system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108900952A (en) * | 2018-07-03 | 2018-11-27 | 无锡吉兴汽车声学部件科技有限公司 | Multi-channel digital based on DSP/simulation mixer system |
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