CN102855210A

CN102855210A - Method for realizing intercommunication and data sharing between two single-chip microcomputers

Info

Publication number: CN102855210A
Application number: CN2012103074421A
Authority: CN
Inventors: 汪晓强; 郭忠慧; 刘晓文
Original assignee: FUJIAN LIDE AUTOMATION EQUIPMENT CO LTD
Current assignee: FUJIAN LIDE AUTOMATION EQUIPMENT CO LTD
Priority date: 2012-08-27
Filing date: 2012-08-27
Publication date: 2013-01-02
Anticipated expiration: 2032-08-27
Also published as: CN102855210B

Abstract

The invention relates to a method for realizing intercommunication and data sharing between two single-chip microcomputers, which is characterized in that the method comprises the following steps of: using an SRAM (static random access memory) for data communication and data sharing buffer memory between the two single-chip microcomputer, and controlling the peripheral memory interfaces of the single-chip microcomputers to be switched between a high-impedance state and a reading-writing state according to states of handshaking signal communication ports of the single-chip microcomputers, so as to ensure that only one single-chip microcomputer accesses to the SRAM at a time. The method is simple to realize; and compared with the prior art, the device cost is saved and the data communication speed is improved.

Description

A kind of method that realizes two single-chip microcomputer intercommunications and data sharing

Technical field

The present invention relates to single-chip data communication, technology of sharing field, particularly a kind of method that realizes two single-chip microcomputer intercommunications and data sharing.

Background technology

Data communication and data sharing mainly contain two kinds of methods between two single-chip microcomputers that exist at present: one. and universal serial bus is realized data communication between single-chip microcomputer, such as UART, spi bus and iic bus etc.; Two. utilize dual port RAM to realize data communication and data sharing between single-chip microcomputer.Utilize above two kinds of methods to realize that mainly there is following problem and shortage in data communication:

1. utilize universal serial bus to realize data communication between single-chip microcomputer, because the unit that universal serial bus transmits is BIT, the speed of communication is received restriction.

2. utilize universal serial bus to realize data communication between single-chip microcomputer, need to adopt and improve and integrality and reliability that complicated communications protocol and transmitting-receiving flow process guarantee data, software is realized comparatively complicated and is comparatively taken the calculation resources of single-chip microcomputer.

3. utilize dual port RAM to realize that the method for data communication and data sharing need to adopt extra dual port RAM hardware resource between single-chip microcomputer, dual port RAM hardware belongs to special IC device, and the device price is more expensive, certainly will cause hardware cost to increase.

4. utilize dual port RAM to realize that the method for data communication and data sharing can't satisfy the demand that big data quantity is shared because the dual port RAM capacity is less between single-chip microcomputer.

Summary of the invention

For overcoming the problems referred to above, the purpose of this invention is to provide a kind of method that realizes two single-chip microcomputer intercommunications and data sharing.

The present invention adopts following scheme to realize: a kind of method that realizes two single-chip microcomputer intercommunications and data sharing, it is characterized in that: adopt a slice SRAM as data communication and data sharing buffer memory between described two single-chip microcomputers, and switch between high-impedance state and read-write state according to the external memory interface of the state control single chip computer of the handshake communication port of single-chip microcomputer, only have a single-chip microcomputer at this SRAM of access to guarantee a moment.

In an embodiment of the present invention, described handshake communication port is two IO mouths of described single-chip microcomputer.

In an embodiment of the present invention, described two IO mouths are defined as state input port and State-output mouth, during operation, whether what one single-chip microcomputer was judged the state input port is ' 1 ', SRAM is not read and write if ' 1 ' then identifies another single-chip microcomputer, at this moment this single-chip microcomputer identifies this single-chip microcomputer with State-output mouth set ' 0 ' first and SRAM is read and write, and then this single-chip microcomputer carries out the operation that needs to SRAM; Just State-output mouth set ' 1 ' after this single-chip microcomputer is to the SRAM EO.

In an embodiment of the present invention, the external memory interface of described two single-chip microcomputers adopts mode in parallel to be connected to the external interface of described SRAM.

Implementation method of the present invention is simple, relatively existing techniques save device cost, improved the speed of data communication.

Description of drawings

Fig. 1 is circuit connection diagram of the present invention.

Fig. 2 is embodiment of the invention single-chip microcomputer read-write schematic flow sheet.

Embodiment

The present invention will be further described below in conjunction with drawings and Examples.

As shown in Figure 1, present embodiment provides a kind of method that realizes two single-chip microcomputer intercommunications and data sharing, it is characterized in that: adopt a slice SRAM as data communication and data sharing buffer memory between described two single-chip microcomputers, and switch between high-impedance state and read-write state according to the external memory interface of the state control single chip computer of the handshake communication port of single-chip microcomputer, only have a single-chip microcomputer at this SRAM of access to guarantee a moment.In the present embodiment, described handshake communication port is two IO mouths of described single-chip microcomputer.

Please refer to Fig. 1 and Fig. 2, during operation, when single-chip microcomputer 1 will carry out read-write operation to SRAM, whether what judge first the state input port is ' 1 ', if ' 1 ' sign single-chip microcomputer 2 is not is not read and write SRAM, at this moment single-chip microcomputer 1 is is read and write (single-chip microcomputer can not operate SRAM for 2 this moments) to SRAM with State-output mouth set ' 0 ' sign single-chip microcomputer 1 first, and then 1 couple of SRAM of single-chip microcomputer carries out the operation of needs.Just State-output mouth set ' 1 ' behind 1 pair of SRAM EO of single-chip microcomputer (single-chip microcomputer can operate SRAM for 2 this moments).2 couples of SRAM(C of single-chip microcomputer) read-write operation is identical with flow process single-chip microcomputer 1.

The above only is preferred embodiment of the present invention, and all equalizations of doing according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.

Claims

1. method that realizes two single-chip microcomputer intercommunications and data sharing, it is characterized in that: adopt a slice SRAM as data communication and data sharing buffer memory between described two single-chip microcomputers, and switch between high-impedance state and read-write state according to the external memory interface of the state control single chip computer of the handshake communication port of single-chip microcomputer, only have a single-chip microcomputer at this SRAM of access to guarantee a moment.

2. the method for two single-chip microcomputer intercommunications of realization according to claim 1 and data sharing, it is characterized in that: described handshake communication port is two IO mouths of described single-chip microcomputer.

3. the method for two single-chip microcomputer intercommunications of realization according to claim 2 and data sharing, it is characterized in that: described two IO mouths are defined as state input port and State-output mouth, during operation, whether what one single-chip microcomputer was judged the state input port is ' 1 ', SRAM is not read and write if ' 1 ' then identifies another single-chip microcomputer, at this moment this single-chip microcomputer identifies this single-chip microcomputer with State-output mouth set ' 0 ' first and SRAM is read and write, and then this single-chip microcomputer carries out the operation that needs to SRAM; Just State-output mouth set ' 1 ' after this single-chip microcomputer is to the SRAM EO.

4. the method for two single-chip microcomputer intercommunications of realization according to claim 1 and data sharing is characterized in that: the external memory interface of described two single-chip microcomputers adopts mode in parallel to be connected to the external interface of described SRAM.