CN102854375A - High-speed voltage and current analog quantity acquisition system based on FPGA (field programmable gate array) - Google Patents

High-speed voltage and current analog quantity acquisition system based on FPGA (field programmable gate array) Download PDF

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Publication number
CN102854375A
CN102854375A CN2012103296817A CN201210329681A CN102854375A CN 102854375 A CN102854375 A CN 102854375A CN 2012103296817 A CN2012103296817 A CN 2012103296817A CN 201210329681 A CN201210329681 A CN 201210329681A CN 102854375 A CN102854375 A CN 102854375A
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resistance
analog
signal
output terminal
voltage
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杨贵杰
黄滨
黄昊骎
单长城
刘宝贵
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Harbin Institute of Technology
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Harbin Institute of Technology
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Abstract

The invention provides a high-speed voltage and current analog quantity acquisition system based on an FPGA (field programmable gate array) and relates to the technical field of data acquisition. The high-speed voltage and current analog quantity acquisition system is designed for an ultrasonic oil production enhancing system of an oilfield system. A data acquiring and processing portion is communicated with a data storing and analyzing portion by a CAN (controller area network) serial communication bus; a voltage signal processing circuit in the data acquiring and processing portion is used for acquiring analog voltage signals, and analog voltage information is filtered and amplified, is subjected to AD (analog to digital) conversion and then is transmitted to an FPGA diameter calibrating circuit; a current signal processing circuit is used for acquiring analog current signals, and analog current information is filtered and amplified, is subjected to AD conversion, and then is transmitted to the FPGA parameter calibrating circuit; the FPGA parameter calibrating circuit is used for performing operation processing for inputted data and then transmitting the inputted data to the data storing and analyzing portion through a CAN communication circuit; and the data storing and analyzing portion is used for storing the data transmitted by the data acquiring and processing portion, and analyzing the data.

Description

High-speed Electric current voltage analog collection system based on FPGA
Technical field
The present invention relates to the data acquisition technology field, be specifically related to high voltage and current signal and process and acquisition technique.
Background technology
The common equipment ultrasound wave increases oil system in use in the oil field system, need to the voltage and current of its work be detected, but, in the voltage/current detection equipment on the existing market, some picking rate is inadequate, some can't realize the high voltage collection, and some does not have data transmission interface at a high speed, does not have can be applicable to the ultrasound wave of oil field system is increased the equipment of the voltage and current detection of oil system.
Summary of the invention
The ultrasound wave that the present invention is directed to oil field system increases the High-speed Electric current voltage analog collection system based on FPGA that oil system has designed a kind of operating voltage for detection of this system and electric current.
High-speed Electric current voltage analog collection system based on FPGA of the present invention is comprised of data acquisition and handling part and data storage and analysis portion, adopts the CAN serial communication bus to realize communication between described data acquisition and handling part and data storage and the analysis portion; Described data acquisition and handling part comprise voltage signal processing circuit, current signal treatment circuit, FPGA parametric calibration circuit and CAN telecommunication circuit, described voltage signal processing circuit is used for gathering analog voltage signal, and described aanalogvoltage information is carried out sending to FPGA parametric calibration circuit after filtering, amplification and the AD conversion process; Described current signal treatment circuit is used for gathering analog current signal, and described analog current information is carried out sending to FPGA parametric calibration circuit after filtering, amplification and the AD conversion process; Described FPGA parametric calibration circuit is used for the data of input are carried out sending to data storage and analysis portion by the CAN telecommunication circuit after the calculation process; Data storage and analysis portion are used for the data of storage data acquisition and handling part transmission, and to described data analysis.
The present invention adopts the CAN communication interface can realize the high-speed transfer of data.In addition, of the present invention based on the FPGA parametric calibration circuit in the High-speed Electric current voltage analog collection system of FPGA, can adopt program and logical design among the VerilogHDL language realization FPGA, that is: at the corresponding IP kernel of FPGA indoor design as basic calculating unit such as multiplication, division and additions, by these computing units the data of input are carried out mathematics and logical operation, processing speed and precision that can the Effective Raise data operation.The present invention is applicable to the detection that ultrasound wave increases the voltage and current of oil system.
Description of drawings
Fig. 1 is the theory diagram of the High-speed Electric current voltage analog collection system based on FPGA of the present invention.
Fig. 2 is a kind of circuit theory diagrams of the Shaping Module described in the embodiment three.
Fig. 3 is a kind of circuit theory diagrams of the aanalogvoltage modular converter described in the embodiment four.
Fig. 4 is a kind of circuit theory diagrams of embodiment seven described aanalogvoltage modular converters.
Embodiment
Embodiment one, referring to Fig. 1 present embodiment is described.The described High-speed Electric current voltage analog collection system based on FPGA of present embodiment is comprised of data acquisition and handling part 1 and data storage and analysis portion 2, adopts the CAN serial communication bus to realize communication between described data acquisition and handling part 1 and data storage and the analysis portion 2; Described data acquisition and handling part 1 comprise voltage signal processing circuit, current signal treatment circuit, FPGA parametric calibration circuit and CAN telecommunication circuit, described voltage signal processing circuit is used for gathering analog voltage signal, and described aanalogvoltage information is carried out sending to FPGA parametric calibration circuit after filtering, amplification and the AD conversion process; Described current signal treatment circuit is used for gathering analog current signal, and described analog current information is carried out sending to FPGA parametric calibration circuit after filtering, amplification and the AD conversion process; Described FPGA parametric calibration circuit is used for the data of input are carried out sending to data storage and analysis portion 2 by the CAN telecommunication circuit after the calculation process; Data storage and analysis portion 2 are used for the data of storage data acquisition and handling part 1 transmission, and to described data analysis.
The CAN telecommunication circuit is used for realizing FPGA parametric calibration circuit and stores communicating by letter between data acquisition and the handling part 1, is used for realizing the setting of data acquisition and the upload function of image data.CAN communication has guaranteed the transmitting of signal on the basis that guarantees higher communication frequency.
In the present embodiment, adopt the parallel data transmission mode to carry out the data transmission between described voltage signal processing circuit and the FPGA parametric calibration circuit.Adopt the parallel data transmission mode to carry out the data transmission between described current signal treatment circuit and the FPGA parametric calibration circuit.Adopt the mode of parallel data transmission can effectively improve the speed of data transmission, and then adapt with the speed of data acquisition, realize data acquisition at a high speed.
Embodiment two, present embodiment is the further restriction to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment one, in the present embodiment, voltage signal processing circuit comprises the aanalogvoltage modular converter, Shaping Module and analog-to-digital conversion module, Shaping Module carries out exporting to the aanalogvoltage modular converter after the shaping to the voltage signal of input, described aanalogvoltage modular converter converts 0 to 2V light current to for the voltage signal that with peak-to-peak value is-2500 to 2500V and presses signal, and press signal to send to analog-to-digital conversion module this light current, analog-to-digital conversion module converts the voltage signal of input to digital signal and output.Voltage signal is to be proportional to the signal that is gathered.
Present embodiment is described can be to exchange or direct current signal by collection signal, comprises pulse signal, sine wave signal etc.
Embodiment three, present embodiment are the further restrictions to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment two, Shaping Module described in the present embodiment is comprised of two resistance-capacitance circuits, described resistance-capacitance circuit is comprised of resistance and Capacitance parallel connection, and the two ends of voltage signal are respectively by exporting to the aanalogvoltage modular converter after the resistance-capacitance circuit coupling.
Resistance in described each resistance-capacitance circuit of present embodiment can adopt a plurality of resistance to be composed in series.
Electric capacity in described each resistance-capacitance circuit of present embodiment can adopt a plurality of capacitances in series to form.
Electric capacity in described each resistance-capacitance circuit of present embodiment can adopt a plurality of electric capacity strings and series-parallel connection to form.
Shown in Figure 2 is a kind of circuit theory diagrams of realizing the described Shaping Module of present embodiment, and resistance adopts a plurality of resistance series connection to realize in this kind structure, and electric capacity adopts electric capacity string and series-parallel connection to form.
Voltage signal processing circuit in the present embodiment has adopted the voltage dividing potential drop mode of optimizing to gather voltage signal, has guaranteed the tracking of high voltage signal frequency after being transformed into weak pressure signal.Guaranteed Signal integrity.
Embodiment four, referring to explanation present embodiment shown in Figure 3.Present embodiment is the further restriction to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment two, in the present embodiment, the aanalogvoltage modular converter is comprised of bi-directional voltage stabilizing pipe Z402, two operational amplifiers, a differential amplifier IC1 and a plurality of resistance, a plurality of electric capacity, bi-directional voltage stabilizing pipe Z402 is connected in parallel on the two ends of tested voltage, and the end of bi-directional voltage stabilizing pipe Z402 is connected with resistance R by resistance R 421 and is connected power supply ground; The other end of bi-directional voltage stabilizing pipe Z402 is connected with resistance R by resistance R 422 and is connected power supply ground; The tie point that resistance R 421 is connected with resistance R connects the positive input of the first operational amplifier U300A by resistance R 400; Resistance in series R401 between the reverse input end of this first operational amplifier U300A and the output terminal, resistance R 402 is connected in parallel with resistance R 401 after connecting with capacitor C 400; The tie point of resistance R 422 and resistance R 420 is connected to the positive input of the second operational amplifier U300B by resistance R 405, resistance in series R406 between the reverse input end of this second operational amplifier U300B and the output terminal is connected in parallel with resistance R 406 after resistance R 407 and capacitor C 406 series connection;
The output terminal of the first operational amplifier U300A is connected with power supply ground by resistance R 412, and the output terminal of described the first operational amplifier U300A also is connected to the forward signal input end of differential amplifier IC11 by resistance R 410; The output terminal of the second operational amplifier U300B connects power supply ground by resistance R 413, and the output terminal of this second operational amplifier U300B is connected to the reverse signal input end of differential amplifier IC11 by resistance R 411; Be parallel with resistance R 414 and capacitor C 410 between the forward signal input end of differential amplifier IC11 and the reverse signal output terminal; Be parallel with resistance R 415 and capacitor C 411 between the reverse signal input end of differential amplifier IC11 and the forward signal output terminal; Be parallel with resistance R 418 between the reverse signal output terminal of differential amplifier IC11 and the forward signal output terminal, the reverse signal output terminal of differential amplifier IC11 is the end of contact resistance R416 also, and the other end of this resistance R 416 is connected with power supply ground by capacitor C 414 as the voltage signal inverse output terminal that gathers; The forward signal output terminal of differential amplifier IC11 is the end of contact resistance R417 also, and the other end of this resistance R 417 is connected with power supply ground by capacitor C 413 as the voltage signal forward output terminal that gathers; In parallel by capacitor C 412 between the voltage signal forward output terminal that gathers and the inverse output terminal.
Embodiment five, present embodiment are the further restrictions to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment one, in the present embodiment, the current signal treatment circuit comprises current sample module, analog current modular converter and analog-to-digital conversion module, current sample module output analog current signal is to the analog current modular converter, the analog current modular converter converts the current signal of input voltage signal to and exports to analog-to-digital conversion module, and analog-to-digital conversion module converts the analog voltage signal of input to digital signal and output.
The analog current modular converter is used for peak-to-peak value is converted to 0 to 2V light current and presses signal to the+current signal of 100A for-100A, and this signal is identical with the current signal waveform that is sampled, and amplitude is directly proportional.
The described current signal that is gathered of present embodiment is AC signal or direct current signal, comprises pulse signal or sinusoidal ac signal etc.
Described current sample module adopts the integrated sampling module of high-precision Hall.Thereby can guarantee when the electric current high frequency changes the complete tracking of current signal amplitude and phase place.
Embodiment six, present embodiment are the further restrictions to embodiment two or five described High-speed Electric current voltage analog collection systems based on FPGA, and the analog-to-digital conversion module described in the present embodiment adopts the parallel AD sampling A/D chip of the high frequency of TI company.This chip can be sampled with the frequency of 25MHz simultaneously to voltage and current signal, with the phase equalization of the signal behind assurance voltage and the current acquisition.
Embodiment seven, referring to Fig. 4 present embodiment is described.Present embodiment is the further restriction to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment five, analog current modular converter described in the present embodiment comprises differential amplifier IC12, a plurality of resistance and a plurality of electric capacity, be parallel with capacitor C 450 between the current signal of analog input and the power supply ground, resistance R 452 and resistance R 442, the current signal of this analog input also is connected to the forward signal input end of differential amplifier IC12 by resistance R 440, be parallel with resistance R 444 and capacitor C 440 between the forward signal input end of this differential amplifier IC12 and the reverse signal output terminal; The end of the reverse input end contact resistance R441 of this differential amplifier IC12 is parallel with resistance R 443 and resistance R 453 between the other end of this resistance R 441 and the power supply ground; In parallel by resistance R 445 and capacitor C 441 between the reverse input end of this differential amplifier IC12 and the forward output terminal; In parallel by resistance R 448 between the forward output terminal of this differential amplifier IC12 and the inverse output terminal, the forward output terminal of this differential amplifier IC12 also is connected with an end of resistance R 447, the other end of this resistance R 447 is connected with power supply ground by capacitor C 443 as the forward signal output terminal of analog current modular converter, the inverse output terminal of this differential amplifier IC12 also is connected with an end of resistance R 446, the other end of this resistance R 446 is connected with power supply ground by capacitor C 444 as the inverse output terminal of analog current modular converter, and is in parallel by capacitor C 442 between the forward signal output terminal of described analog power modular converter and the inverse output terminal.
The AD8318 high frequency differential amplifier that can adopt that the described differential amplifier IC12 of present embodiment and embodiment four described differential amplifier IC11 are equal is realized, this AD8318 high frequency differential amplifier namely can also divide amplifier as the difference slip as the single-ended transfer difference amplifier, and the common mode electrical level translation function can also be provided.The positive-negative output end of AD8138 high frequency differential amplifier links to each other with the input end of analog signal of analog-to-digital conversion module respectively by pair of series resistance, thereby will be down to minimum to the load effect that the switching capacity of analog-to-digital conversion module is inputted, so that output can keep the height balance in very wide frequency range, and do not need the outer member of strict coupling.
Embodiment eight, present embodiment are the further restrictions to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment one, in the present embodiment, become design by the VerilogHDL language, at FPGA parametric calibration inside circuit multiplication IP kernel, division IP kernel and addition IP kernel are set, and then realize the calculation process to the input data; Also become design by the VerilogHDL language, arrange at FPGA parametric calibration inside circuit and revise and calibration module zero point, this module is used for the data of input are calibrated.
Revise at described zero point and calibration module is used for revising the zero point of collection signal and the linear ratio relation of signal by revisable parameter, thereby the signal that reaches collection is better followed the tracks of high pressure, high frequency, greatly amplitude and the phase place of current signal.
Described correction at zero point and calibration module realize that the method for calibration is to adopt the two point form calibration: about the zero point of the first point selection signal, second point select signal near near the full scale, calculate the corrected parameter of circuit according to 2 modulus sampled values of locating and the actual analog signal values that is sampled by the two point form equation, then by the CAN bus with in the CAM spare on the parameter read-in circuit board.Can guarantee precision in the whole measure scope by this calibrating mode.
These parameters can be configured by 232 interfaces of standard, and automatically preserve, and do not lose after the power down.
The AD image data reads, and data are processed and the data storage is main realizes that the digital quantity after high pressure, high frequency, the large current signal conversion reads in real time, and carries out zero compensation and linear revise.And store according to the sample frequency and the signals collecting pattern that arrange in the Can communication.
Embodiment nine, present embodiment are the further restrictions to the described High-speed Electric current voltage analog collection system based on FPGA of embodiment one, in the present embodiment, data storage and analysis portion 2 adopt panel computer, notebook computer or industrial computer to realize.
Data storage and analysis portion 2 in the present embodiment adopt panel computer, notebook computer or industrial computer to realize, can carry out easily the demonstration of data processing and image data.
The PPC of panel computer employing Beijing ancient cooking vessel lift wound-104X panel computer, this is the high-performance embedded computer of a low-power consumption, and man-machine interface has adopted 10.4 inches TFT TFT True Color LCD, and display resolution reaches 800X600; Use Celeron's 400 processors of extra low voltage, can effectively reduce energy consumption, do not use fan, can steady in a long-term move.Attractive in appearance firm, shock resistance is good, and electromagnetic wave shielding is good.Use WINXPE operating system, good stability is supported directly shutdown.Panel computer operates on it by touch-screen, and is simple and convenient.

Claims (10)

1. based on the High-speed Electric current voltage analog collection system of FPGA, it is characterized in that, described acquisition system is by data acquisition and handling part (1) and data are stored and analysis portion (2) forms, and adopts the CAN serial communication bus to realize communication between described data acquisition and handling part (1) and data storage and the analysis portion (2); Described data acquisition and handling part (1) comprise voltage signal processing circuit, current signal treatment circuit, FPGA parametric calibration circuit and CAN telecommunication circuit, described voltage signal processing circuit is used for gathering analog voltage signal, and described aanalogvoltage information is carried out sending to FPGA parametric calibration circuit after filtering, amplification and the AD conversion process; Described current signal treatment circuit is used for gathering analog current signal, and described analog current information is carried out sending to FPGA parametric calibration circuit after filtering, amplification and the AD conversion process; Described FPGA parametric calibration circuit is used for the data of input are carried out sending to data storage and analysis portion (2) by the CAN telecommunication circuit after the calculation process; Data storage and analysis portion (2) are used for the data of storage data acquisition and handling part (1) transmission, and to described data analysis.
2. the High-speed Electric current voltage analog collection system based on FPGA according to claim 1, it is characterized in that, voltage signal processing circuit comprises the aanalogvoltage modular converter, Shaping Module and analog-to-digital conversion module, Shaping Module carries out exporting to the aanalogvoltage modular converter after the shaping to the voltage signal of input, described aanalogvoltage modular converter converts 0 to 2V light current to for the voltage signal that with peak-to-peak value is-2500 to 2500V and presses signal, and press signal to send to analog-to-digital conversion module this light current, analog-to-digital conversion module converts the voltage signal of input to digital signal and output.Voltage signal is to be proportional to the signal that is gathered.
3. the High-speed Electric current voltage analog collection system based on FPGA according to claim 2, it is characterized in that, Shaping Module is comprised of two resistance-capacitance circuits, described resistance-capacitance circuit is comprised of resistance and Capacitance parallel connection, and the two ends of voltage signal are respectively by exporting to the aanalogvoltage modular converter after the resistance-capacitance circuit coupling.
4. the High-speed Electric current voltage analog collection system based on FPGA according to claim 3 is characterized in that the resistance in described each resistance-capacitance circuit can adopt a plurality of resistance to be composed in series.
5. the High-speed Electric current voltage analog collection system based on FPGA according to claim 3 is characterized in that, the electric capacity in each resistance-capacitance circuit can adopt a plurality of capacitances in series to form.
6. the High-speed Electric current voltage analog collection system based on FPGA according to claim 3 is characterized in that, the electric capacity in described each resistance-capacitance circuit can adopt a plurality of electric capacity strings and series-parallel connection to form.
7. the High-speed Electric current voltage analog collection system based on FPGA according to claim 2, it is characterized in that, the aanalogvoltage modular converter is comprised of bi-directional voltage stabilizing pipe (Z402), two operational amplifiers, a differential amplifier (IC11) and a plurality of resistance, a plurality of electric capacity, bi-directional voltage stabilizing pipe (Z402) is connected in parallel on the two ends of tested voltage, and an end of bi-directional voltage stabilizing pipe (Z402) is connected with resistance R by resistance R 421 and is connected power supply ground; The other end of bi-directional voltage stabilizing pipe (Z402) is connected with resistance R by resistance R 422 and is connected power supply ground; The tie point that resistance R 421 is connected with resistance R connects the positive input of the first operational amplifier (U300A) by resistance R 400; Resistance in series R401 between the reverse input end of this first operational amplifier (U300A) and the output terminal, resistance R 402 is connected in parallel with resistance R 401 after connecting with capacitor C 400; The tie point of resistance R 422 and resistance R 420 is connected to the positive input of the second operational amplifier (U300B) by resistance R 405, resistance in series R406 between the reverse input end of this second operational amplifier (U300B) and the output terminal is connected in parallel with resistance R 406 after resistance R 407 and capacitor C 406 series connection;
The output terminal of the first operational amplifier (U300A) is connected with power supply ground by resistance R 412, and the output terminal of described the first operational amplifier (U300A) also is connected to the forward signal input end of differential amplifier (IC11) by resistance R 410; The output terminal of the second operational amplifier (U300B) connects power supply ground by resistance R 413, and the output terminal of this second operational amplifier (U300B) is connected to the reverse signal input end of differential amplifier (IC11) by resistance R 411; Be parallel with resistance R 414 and capacitor C 410 between the forward signal input end of differential amplifier (IC11) and the reverse signal output terminal; Be parallel with resistance R 415 and capacitor C 411 between the reverse signal input end of differential amplifier (IC11) and the forward signal output terminal; Be parallel with resistance R 418 between the reverse signal output terminal of differential amplifier (IC11) and the forward signal output terminal, the reverse signal output terminal of differential amplifier (IC11) is the end of contact resistance R416 also, and the other end of this resistance R 416 is connected with power supply ground by capacitor C 414 as the voltage signal inverse output terminal that gathers; The forward signal output terminal of differential amplifier (IC11) is the end of contact resistance R417 also, and the other end of this resistance R 417 is connected with power supply ground by capacitor C 413 as the voltage signal forward output terminal that gathers; In parallel by capacitor C 412 between the voltage signal forward output terminal that gathers and the inverse output terminal.
8. the High-speed Electric current voltage analog collection system based on FPGA according to claim 1, it is characterized in that, the current signal treatment circuit comprises current sample module, analog current modular converter and analog-to-digital conversion module, current sample module output analog current signal is to the analog current modular converter, the analog current modular converter converts the current signal of input voltage signal to and exports to analog-to-digital conversion module, and analog-to-digital conversion module converts the analog voltage signal of input to digital signal and output.
9. the High-speed Electric current voltage analog collection system based on FPGA according to claim 8, it is characterized in that, described analog current modular converter comprises differential amplifier (IC12), a plurality of resistance and a plurality of electric capacity, be parallel with capacitor C 450 between the current signal of analog input and the power supply ground, resistance R 452 and resistance R 442, the current signal of this analog input also is connected to the forward signal input end of differential amplifier (IC12) by resistance R 440, be parallel with resistance R 444 and capacitor C 440 between the forward signal input end of this differential amplifier (IC12) and the reverse signal output terminal; The end of the reverse input end contact resistance R441 of this differential amplifier (IC12) is parallel with resistance R 443 and resistance R 453 between the other end of this resistance R 441 and the power supply ground; In parallel by resistance R 445 and capacitor C 441 between the reverse input end of this differential amplifier (IC12) and the forward output terminal; In parallel by resistance R 448 between the forward output terminal of this differential amplifier (IC12) and the inverse output terminal, the forward output terminal of this differential amplifier (IC12) also is connected with an end of resistance R 447, the other end of this resistance R 447 is connected with power supply ground by capacitor C 443 as the forward signal output terminal of analog current modular converter, the inverse output terminal of this differential amplifier (IC12) also is connected with an end of resistance R 446, the other end of this resistance R 446 is connected with power supply ground by capacitor C 444 as the inverse output terminal of analog current modular converter, and is in parallel by capacitor C 442 between the forward signal output terminal of described analog power modular converter and the inverse output terminal.
10. the High-speed Electric current voltage analog collection system based on FPGA according to claim 1 is characterized in that, data storage and analysis portion (2) adopt panel computer, notebook computer or industrial computer to realize.
CN2012103296817A 2012-09-07 2012-09-07 High-speed voltage and current analog quantity acquisition system based on FPGA (field programmable gate array) Pending CN102854375A (en)

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Application publication date: 20130102