CN101995511A - Bus zero-sequence current in-situ processing system for power grid fault line selection - Google Patents
Bus zero-sequence current in-situ processing system for power grid fault line selection Download PDFInfo
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- CN101995511A CN101995511A CN2009101159673A CN200910115967A CN101995511A CN 101995511 A CN101995511 A CN 101995511A CN 2009101159673 A CN2009101159673 A CN 2009101159673A CN 200910115967 A CN200910115967 A CN 200910115967A CN 101995511 A CN101995511 A CN 101995511A
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Abstract
The invention provides a bus zero-sequence current in-situ processing system for power grid fault line selection. The in-situ processing system is characterized in that each circuit is provided with a FPGA-based data box in-situ, the signal amplification, filtering, data acquisition and collection are all finished in-situ, and digital signal process and analysis are finished at the same time so as to realize the in-situ digital communication. Through the invention, the problems that the signals are weak, the interference is widely spread and the measurement is inaccurate because the analog signal transmission is easily disturbed when a low current ground system is fault in single phase grounding are solved, the line selection accuracy is increased and the system is fit for 6-35KV power grid fault line selection.
Description
Technical field
The present invention relates to electric network single-phase earth fault route selection technology, particularly relate to the electric network single-phase earth fault route selection technology of the zero-sequence current site disposal of 6kv-35kv.
Background technology
Large enterprise's power distribution network (6kv-35kv) extensively adopts not solidly grounded system of neutral point, i.e. small current neutral grounding system now.The advantage of this earthing mode is: little to power equipment and hazard to person when singlephase earth fault takes place, can allow electrical network continue to move 1 hour in the case～2 hours.But because this moment, non-fault phase-to-ground voltage raise
Doubly (stable state), if be attended by arc phenomenon then may make the highest transient voltage of non-fault line reach about 3 times of phase voltage, increased requirement to the insulating property of circuit, non-fault flashover relatively takes place easily, cause the two phase ground short circuit, its harm is bigger.Therefore, take place to determine faulty line, abort situation rapidly and in time get rid of significant behind the singlephase earth fault to the safe operation of distribution system.
Small current neutral grounding system automatic route selection technology is a difficulty technical problems of high, and during singlephase earth fault, fault current is little, a little less than the signal, and the type complexity of singlephase earth fault, unstable ground connection may be taken place, produce undesired signals such as intermittence arc light, increased the difficulty of Earth Fault Detection.
Though from the eighties in last century, the research of domestic beginning low current neutral grounding system fault route selecting, many selection methods have been proposed, the early 1990s, begin to release the ground fault line selection device that single-chip microcomputer is a controller, up to the present, domestic many companies low-current ground fault line selection device that releases one after another, all adopt centralized configuration, the in-site modeling signal of many circuits of power distribution network (residual voltage, zero-sequence current, line voltage etc.) is delivered to fault line selection device by signal transmssion line and is concentrated collection, focuses on.This method very easily is interfered because on-the-spot to being analog signal transmission between the fault line selection device, and CPU or a link be out of order and can cause the total system paralysis, so drawback is many.Their accuracy of diagnosis is about 50%, and result of use still is not very desirable.
Summary of the invention
Technical matters to be solved by this invention is: the bus-type zero-sequence current site disposal system that a kind of electrical network earthing wire-selecting is provided, this system is when solving single-phase grounded malfunction in grounded system of low current, a little less than the signal, disturb many, analog signal transmission to be subject to disturb and cause the inaccurate problem of measuring, to improve the route selection accuracy.
In order to solve the problems of the technologies described above, the present invention proposes a kind of bus-type zero-sequence current site disposal system of power distribution network earthing wire-selecting, and this system comprises failure line selection unit, data acquisition unit, FPGA unit, extends out data-carrier store and field-bus interface;
Wherein, data acquisition unit comprises and is used to obtain the voltage transformer (VT) of change, distribution substation bus residual voltage and is installed in feeder line, is used for obtaining the zero sequence current mutual inductor of primary side zero sequence current signal;
The FPGA unit comprises:
Storer is respectively applied for access zero-sequence current low speed sampled signal, zero-sequence current high-speed sampling signal, residual voltage sampled signal;
Processor is used for control data collection, data separating, and communicates by bus interface and failure line selection unit;
Frequency selector is used to extract the first-harmonic and the quintuple harmonics of zero-sequence current;
The wavelet packet analysis module is used to calculate the energy of each frequency band correspondence of zero-sequence current transient state component;
The data acquisition and the control module that is shifted in proper order are used for the access of control data sampling and data;
Described voltage transformer (VT) becomes detected residual voltage into suitable voltage signal through isolating transformer, after amplification, low-pass filtering, one the tunnel after low speed sampling, A/D conversion, deposited in the described storer by the FPGA unit controls, logic determines is carried out through being input to the FPGA unit after the shaping in another road;
Described zero sequence current mutual inductor converts detected zero-sequence current to voltage signal through pull-up resistor, again through after amplification and the low-pass filtering, carries out the sampling of high-speed sampling and low speed respectively, after the A/D conversion, is deposited in the described storer by the FPGA unit controls;
Processor extracts the fault residual voltage and deposits described extending out in the data-carrier store in from described storer, extracting the fault zero-sequence steady state current from described storer send frequency selector acquisition first-harmonic and harmonic wave to deposit described extending out in the data-carrier store respectively in, from described storer, extract fault transient state current and send described wavelet analysis module analysis, acquisition deposits the described data-carrier store that extends out in the energy of each band signal, simultaneously, processor will deposit the described data that extend out in the data-carrier store in and issue the failure line selection unit by field-bus interface.
Preferably: described storer is a twoport order shift memory, and it comprises residual voltage low speed sampling twoport order shift memory, zero-sequence current low speed sampling twoport order shift memory and zero-sequence current high-speed sampling twoport order shift memory;
Residual voltage low speed sampled data deposits described residual voltage low speed sampling twoport order shift memory in, the data of zero-sequence current low speed sampling deposit described zero-sequence current low speed sampling twoport order shift memory in, and the data of zero-sequence current high-speed sampling deposit described zero-sequence current high-speed sampling twoport order shift memory in.
Preferably: described frequency selector comprises first-harmonic frequency selector and quintuple harmonics frequency selector.
Preferably: described data acquisition unit, FPGA unit and extend out data-carrier store and field-bus interface is located in the on-the-spot FPGA data capsule.
Beneficial effect of the present invention is as follows:
Compared to existing technology, when the present invention carried out failure line selection at needs, FPGA data capsule of every circuit situ configuration can be finished signal amplification, filtering, data acquisition at the scene, digital signal processing and analysis are finished the field data transmission by industrial field bus.Thereby when effectively solving single-phase grounded malfunction in grounded system of low current, a little less than the signal, disturb many, analog signal transmission to be subject to disturb to cause and measure an inaccurate difficult problem, improve more than the route selection accuracy to 80%.
Description of drawings
Fig. 1 is a circuit block diagram of the present invention.
Fig. 2 is the software flow pattern that the circuit on-site data gathering is handled.
Embodiment
The invention provides a kind of bus-type zero-sequence current site disposal system of electrical network earthing wire-selecting, the embodiment structure as shown in Figure 1.Be field programmable logic array (FPLA) FPGA unit in the frame of broken lines among Fig. 1.What be connected with the FPGA unit is data acquisition unit, and analog signal processing circuit is connecting data acquisition unit.The FPGA unit is also connecting and is extending out data-carrier store and field-bus interface.
Data acquisition unit comprises and is used to obtain the voltage transformer pt of change, distribution substation bus residual voltage and is installed in feeder line, is used for obtaining the zero sequence current mutual inductor CT of primary side zero-sequence current.
The FPGA unit comprises:
Twoport data order shift memory is used for access zero-sequence current low speed sampled signal, zero-sequence current high-speed sampling signal, residual voltage sampled signal; Twoport data order shift memory comprises residual voltage low speed sampled data storer A, zero-sequence current low speed sampled data storer B and zero-sequence current high-speed sampling data-carrier store C.
Processor is used for control data collection, data separating, and communicates by bus interface and failure line selection unit.Processor can be selected the processor of NiosII for use.
Frequency selector is used to extract the first-harmonic and the quintuple harmonics of zero-sequence current.Frequency selector comprises first-harmonic frequency selector and quintuple harmonics frequency selector, and wherein the first-harmonic frequency selector is the FIR50Hz frequency selector, and the quintuple harmonics frequency selector is the FIR250Hz frequency selector.
The wavelet packet analysis module is used to calculate the energy of each frequency band correspondence of zero-sequence current transient state component.
The data acquisition and the control module that is shifted in proper order are used to control the access of sampled data and data.
Wherein, voltage transformer pt with detected residual voltage after isolating transformer becomes suitable voltage signal, again after first differential amplifier, first low-pass filter, low speed channel sample retainer, first A/D converter are handled successively, deposit among the residual voltage low speed sampling twoport order shift memory A by the FPGA unit controls, carry out logic determines through being input to the FPGA unit behind the shaping circuit through another road of the residual voltage signal after the low-pass filtering.
Zero sequence current mutual inductor CT converts detected zero-sequence current to voltage signal through pull-up resistor, again through behind second differential amplifier and second low-pass filter, enter high-speed channel sampling holder and low speed channel sample retainer respectively, wherein, low speed channel sample signal is deposited among the zero-sequence current low speed sampling twoport order shift memory B by the FPGA unit controls after the conversion of first A/D converter; The high-speed sampling signal is deposited among the zero-sequence current high-speed sampling twoport order shift memory C by the FPGA unit controls after the conversion of second A/D converter.
When singlephase earth fault takes place, processor extraction fault residual voltage from residual voltage low speed sampling twoport order shift memory A deposits in and extends out in the data-carrier store, from zero-sequence current low speed sampling twoport order shift memory B, extract the fault zero-sequence steady state current, obtaining harmonic wave that first-harmonic and 250Hz frequency selector obtain through the 50Hz frequency selector deposits in respectively and extends out in the data-carrier store, the fault transient state current that extracts from zero-sequence current high-speed sampling twoport order shift memory C send the wavelet analysis module analysis, acquisition deposits in the energy of each band signal and extends out data-carrier store, simultaneously, processor will deposit the data that extend out in the data-carrier store in and issue the failure line selection unit by bus interface.
Data acquisition process of the present invention unit adopts voltage transformer pt, zero sequence current mutual inductor CT to obtain the zero sequence current signal of change, distribution substation bus residual voltage signal and the outlet of i bar respectively, behind signal conditioning circuit (isolation, amplification, filtering etc.), by the sampling of FPGA unit controls, A/D conversion, data shift storage.The hardware module of integrated NiosII system and related algorithm in the FPGA unit, soft-core processor NiosII can the macro-control data acquisition, data separating and by field-bus interface and failure line selection unit communication.Can extract first-harmonic, the quintuple harmonics of zero-sequence current, calculate the energy of each frequency band correspondence of zero-sequence current transient state component.The NiosII system sends the data of handling to by fieldbus (PROFIBUS) interface and fieldbus the route selection unit of fault line selection device simultaneously.
When any field bus type fault line selection device of exploitation, every circuit is on-the-spot installs the data capsule based on FPGA, and the data acquisition process course of work in the data capsule is as follows:
Secondary side zero sequence current signal from the zero sequence current mutual inductor that is installed in each feeder line converts voltage signal to through pull-up resistor, after amplification and low-pass filtering, delivers to high, low speed channel sample retainer again.Wherein the signal of low speed sampling is deposited among the zero-sequence current low speed sampling twoport order shift memory B by the FPGA unit controls after the A/D conversion, the signal of high-speed sampling is deposited among the zero-sequence current high-speed sampling twoport order shift memory C by the FPGA unit controls after the A/D conversion.Residual voltage is from the voltage transformer secondary open delta, become suitable voltage signal through isolating transformer, again behind low-pass filter, one the tunnel is deposited among the residual voltage low speed sampling twoport order shift memory A by the FPGA unit controls after low speed sampling, A/D conversion, another road of residual voltage is input to the FPGA unit and carries out logic determines, and whether detection line singlephase earth fault has taken place in real time.When singlephase earth fault takes place when, FPGA exports the unit trigger pip, and notice NiosII takes out the fault data of certain-length from twoport order shift memory, analyze, calculate, and correlated results reached the failure line selection unit through the Profibus bus, carry out failure line selection.
The sample frequency of low-frequency sampling is taken as 3.2KHz, thereby the sample frequency that requires the low-frequency sampling retainer is greater than 3.2KHz.Because the signal of 2 road low-frequency samplings is arranged, require the A/D slewing rate greater than 6.4KHz.The sample frequency of high frequency sampling is taken as 51.2KHz.
Circuit on-site data gathering processing unit software flow such as Fig. 2.
Earlier the data collecting unit is carried out initialization; Carry out data acquisition, control data displacement storage then; Judge gathering the data of coming up again, judge whether to take place singlephase earth fault.
If, then read residual voltage low speed sampling twoport order shift memory A, extract the fault residual voltage, and deposit in and extend out data-carrier store; And read zero-sequence current low speed sampling twoport order shift memory B, zero-sequence current high-speed sampling twoport order shift memory C, extract fault zero-sequence steady state current and transient current; Then the fault stable status zero-sequence current is delivered to frequency selector, obtain first-harmonic and quintuple harmonics, they are deposited in extend out data-carrier store, fault transient state current send the wavelet packet analysis module, the energy that obtains each band signal deposits in and extends out data-carrier store, and signal is transmitted data by field-bus interface to the higher level; Again judge gathering the new data that comes up, is stored in the data-carrier store again after finishing.
If not, then judge gathering the new data that comes up, is stored in the data-carrier store again.
Claims (4)
1. the bus-type zero-sequence current site disposal system of an electrical network earthing wire-selecting comprises the failure line selection unit, it is characterized in that comprising data acquisition unit, FPGA unit, extends out data-carrier store and field-bus interface;
Wherein, data acquisition unit comprises and is used to obtain the voltage transformer (VT) of change, distribution substation bus residual voltage and is installed in zero sequence current mutual inductor on the feeder line, that be used for obtaining the primary side zero-sequence current;
The FPGA unit comprises:
Storer is used for access zero-sequence current low speed sampled signal, zero-sequence current high-speed sampling signal, residual voltage sampled signal;
Processor is used for control data collection, data separating, and communicates by described field-bus interface and described failure line selection unit;
Frequency selector is used to extract the first-harmonic and the quintuple harmonics of zero-sequence current;
The wavelet packet analysis module is used to calculate the energy of each frequency band correspondence of zero-sequence current transient state component;
The data acquisition and the control module that is shifted in proper order are used for the access of control data sampling and data;
Described voltage transformer (VT) becomes detected residual voltage into suitable voltage signal through isolating transformer, and after amplification, low-pass filtering, the one tunnel after low speed sampling, A/D conversion, is deposited in the described storer by the FPGA unit controls; Logic determines is carried out through being input to the FPGA unit after the shaping in another road;
Described zero sequence current mutual inductor converts detected zero-sequence current to voltage signal through pull-up resistor, again through after amplification and the low-pass filtering, carries out the sampling of high-speed sampling and low speed respectively, after the A/D conversion, is deposited in the described storer by the FPGA unit controls;
Processor extracts the fault residual voltage and deposits described extending out in the data-carrier store in from described storer, extracting the fault zero-sequence steady state current from described storer send frequency selector acquisition first-harmonic and harmonic wave to deposit described extending out in the data-carrier store respectively in, from described storer, extract fault transient state current and send described wavelet analysis module analysis, the energy that obtains each band signal deposits the described data-carrier store that extends out in, simultaneously, processor will deposit the described data that extend out in the data-carrier store in and issue the failure line selection unit by field-bus interface.
2. the bus-type zero-sequence current site disposal system of electrical network earthing wire-selecting according to claim 1, it is characterized in that: described storer is a twoport order shift memory, and it comprises residual voltage low speed sampling twoport order shift memory, zero-sequence current low speed sampling twoport order shift memory and zero-sequence current high-speed sampling twoport order shift memory;
Residual voltage low speed sampled data deposits described residual voltage low speed sampling twoport order shift memory in, the data of zero-sequence current low speed sampling deposit described zero-sequence current low speed sampling twoport order shift memory in, and the data of zero-sequence current high-speed sampling deposit described zero-sequence current high-speed sampling twoport order shift memory in.
3. the bus-type zero-sequence current site disposal system of electrical network earthing wire-selecting according to claim 1, it is characterized in that: described frequency selector comprises first-harmonic frequency selector and quintuple harmonics frequency selector.
4. the bus-type zero-sequence current site disposal system of electrical network earthing wire-selecting according to claim 1 is characterized in that: described data acquisition unit, FPGA unit and extend out data-carrier store and field-bus interface is located in the on-the-spot FPGA data capsule.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102854375A (en) * | 2012-09-07 | 2013-01-02 | 哈尔滨工业大学 | High-speed voltage and current analog quantity acquisition system based on FPGA (field programmable gate array) |
| CN104101812A (en) * | 2013-04-09 | 2014-10-15 | 北京映翰通网络技术股份有限公司 | Single-phase grounding fault detection and positioning method and system for low-current grounding power distribution network |
| CN107677922A (en) * | 2017-11-13 | 2018-02-09 | 国网四川省电力公司广安供电公司 | Single-phase grounded malfunction in grounded system of low current determination methods |
| CN111308201A (en) * | 2020-03-12 | 2020-06-19 | 国网山东省电力公司潍坊供电公司 | Distributed wave recording system integrating small-current grounding line selection function |
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| CN102692555A (en) * | 2012-06-22 | 2012-09-26 | 李利利 | Analogue quantity inputting circuit for transformer substation |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100341220C (en) * | 2002-04-23 | 2007-10-03 | 泰安开发区鲁兴测控设备研究所 | Wire selecting method and device for single-phase earthing of small current earthing system |
| CN201234124Y (en) * | 2008-07-09 | 2009-05-06 | 江苏省电力公司泗洪县供电公司 | Single-phase grounding failure wire selection automatic processing equipment for low current grounding system |
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2009
- 2009-08-17 CN CN2009101159673A patent/CN101995511B/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102854375A (en) * | 2012-09-07 | 2013-01-02 | 哈尔滨工业大学 | High-speed voltage and current analog quantity acquisition system based on FPGA (field programmable gate array) |
| CN104101812A (en) * | 2013-04-09 | 2014-10-15 | 北京映翰通网络技术股份有限公司 | Single-phase grounding fault detection and positioning method and system for low-current grounding power distribution network |
| CN104101812B (en) * | 2013-04-09 | 2017-02-22 | 北京映翰通网络技术股份有限公司 | Single-phase grounding fault detection and positioning method and system for low-current grounding power distribution network |
| CN107677922A (en) * | 2017-11-13 | 2018-02-09 | 国网四川省电力公司广安供电公司 | Single-phase grounded malfunction in grounded system of low current determination methods |
| CN111308201A (en) * | 2020-03-12 | 2020-06-19 | 国网山东省电力公司潍坊供电公司 | Distributed wave recording system integrating small-current grounding line selection function |
| CN111308201B (en) * | 2020-03-12 | 2022-07-01 | 国网山东省电力公司潍坊供电公司 | Distributed wave recording system integrating small-current grounding line selection function |
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