CN102820964B - Method for aligning multichannel data based on system synchronizing and reference channel - Google Patents
Method for aligning multichannel data based on system synchronizing and reference channel Download PDFInfo
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- CN102820964B CN102820964B CN201210239168.9A CN201210239168A CN102820964B CN 102820964 B CN102820964 B CN 102820964B CN 201210239168 A CN201210239168 A CN 201210239168A CN 102820964 B CN102820964 B CN 102820964B
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Abstract
The invention relates to the fields of optical fiber communication and digital communication. Particularly, the invention relates to a method for aligning multichannel data based on a system synchronizing and reference channel. The method for aligning the multichannel data based on the system synchronizing and reference channel comprises the following steps: the transmitted multichannel data are basically synchronized by arranging a ''system synchronization'' signal; then ''reference channel'' data are arranged additionally, so that a read control module for aligning channels is unrelated with the data of the working channel.
Description
Technical field
The present invention relates to fiber optic communication field and digital communicating field, refer more particularly to a kind of method of aliging with the multi-channel data of reference channel based on system synchronization.
Background technology
In phased array radar, multi-channel A/D data, in transmitting procedure, due to the difference of signal transmission path length, cause the difference of signal delay, cause in design process the problem that usually can run into and be alignd by multichannel data.
The invention still further relates to multi-track division technique: at the transmitting terminal of transmission line, the process that two or more branch road digital signal is merged into single conjunction railway digital signal by time division multiplexing mode is called digital multiplexing; At the receiving terminal of transmission line, the process that one road complex digital signal is separated into two or more branch road digital signal is called digital demulplexing, digital demulplexing is the inverse process of digital demulplexing.Detailed schematic can with reference to the chapter 8 of " Principles of Modern Communication " (list of references 1).
Chinese invention patent " a kind of method of multi-channel data aligning de-bias and device " (application number is CN201110342980.X) discloses the technology that a kind of multichannel goes to offset, its concrete operation step: step one. the tag block of each passage detected, from this tag block, the data of respective channel are write buffer memory successively; Step 2. detect that first tag block starts timing, if in the given time, detect that the tag block of all passages all arrives, then label alignment is effective; Step 3. in the effective situation of label alignment, the sense data while of from the original position of each passage buffer memory; Step 4. detect that first tag block starts timing, if in the given time, detect that the tag block of not all passage all arrives, then label alignment failure, then carries out null clear operation to the buffer memory of each channel data.
This patent also has the following disadvantages: if one of them data channel disconnects, then detect that the tag block of this passage does not arrive in the given time, label alignment failure, carries out null clear operation to the buffer memory of each channel data, therefore causes the data of other passage also cannot align.Until the passage of this disconnection reconnect could realize data go skew.
Summary of the invention
For the deficiency of background technology, the invention provides a kind of method of aliging with the multi-channel data of reference channel based on system synchronization, by setting up " system synchronization " signal, making the multi-channel data of transmission substantially keep synchronous; Thereafter set up " reference channel " data, the read control module that passage is alignd and the data of service aisle have nothing to do.
Technical scheme of the present invention is: a kind of method of aliging with the multi-channel data of reference channel based on system synchronization, comprises the steps:
Step one, transmitting terminal produce " system synchronization " signal;
Step 2, basis " system synchronization ", insert synchronization frame in the N channel data of transmitting terminal;
Step 4, according to " system synchronization ", produces " reference channel " data at transmitting terminal, and carries out Data Synthesis with N channel data;
Step 5, receiving terminal to transmission data solution synthesis;
Step 7, receiving terminal to separate synthesis data carry out alignment of data.
Wherein N is more than or equal to 2.
Its beneficial effect is: the alignment work that all can not affect other channel data when any 1 data channel disconnects, and the passage disconnected on reconnecting after, automatically can align with other channel data, and the transfer of data of other passage can not be affected.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, is characterized in that: " system synchronization " signal of described step one is produced by sequencing control plate, and is distributed to N block AD plate by differential signal interface.Its beneficial effect is: ensure that synchronous and sequencing control plate " system synchronization " that N block AD plate uses is consistent.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, it is characterized in that: described step 2 is: AD data insert frame synchronization, comprise following content: often insert synchronization frame in the data of the positive pulse position of block AD buttress certificate " system synchronization " after AD conversion.Its beneficial effect is: because the positive pulse duty ratio of " system synchronization " is very little, so the bandwidth that synchronization frame takies in serial data frame is also very little; Synchronization frame in data ensures the writing controller of subsequent data alignment step and effective work of deframer.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, is characterized in that: it also comprises step 3, at transmitting terminal, the channel data of the insertion synchronization frame in step 2 is passed through Optical Fiber Transmission.Its beneficial effect is: adopt Optical Fiber Transmission lower than the cable transmission error rate.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, is characterized in that: described step 4 comprises: first produce " reference channel " data with synchronization frame according to " system synchronization "; Secondly by N channel data and 1 tunnel " reference channel " Data Synthesis 1 circuit-switched data, and 1 road light signal is become to give communication board by electro-optic conversion.Its beneficial effect is: " reference channel " data ensure effective work of Read Controller in subsequent data alignment step.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, it is characterized in that: the described step four pests comprise: by N channel data and M road " reference channel " Data Synthesis M circuit-switched data, and become M road light signal to give communication board by electro-optic conversion, wherein M is greater than 1.Its beneficial effect is: N channel data can synthesize M road Signal transmissions, respectively comprises 1 tunnel " reference channel " data in the signal of M road.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, it is characterized in that: described step 5 comprises: in communication board, M road light signal becomes the M road signal of telecommunication through opto-electronic conversion, then recovers N channel data and M road " reference channel " data by separating synthesis.Its beneficial effect is: M road " reference channel " data ensure effective work of main channel selector below.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, is characterized in that: it also comprises step 6, carries out main channel selection in the data of receiving terminal to the solution synthesis in step 5.Its beneficial effect is: to the system having M road " reference channel " data to export in step 5, can carry out main channel selection, as long as there are " reference channel " data correct, just can select main channel, add the reliability of alignment of data.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, it is characterized in that: described step 6 comprises: the synchronization frame searching for M road " reference channel " first respectively, secondly " reference channel " of synchronization frame will first be searched out as main channel, and using the master clock of the recovered clock of the deserializer corresponding with " reference channel " that search synchronization frame as N channel alignment of data.Its beneficial effect is: in the recovered clock of M road, select 1 tunnel as master clock, ensures master clock and system clock homology.
Method of aliging with the multi-channel data of reference channel based on system synchronization as above, is characterized in that: described step 7 comprises: the data of respective channel are write buffer memory successively by the synchronization frame first searching for N channel data from this synchronization frame; Secondly main channel data is postponed a scheduled time, from the main channel data after postponing, searches synchronization frame, then from the synchronization frame of this main channel from the original position of each passage buffer memory sense data.Its beneficial effect is: the data of writing controller only with N channel are relevant, and Read Controller is only relevant with main channel data.
Accompanying drawing explanation
Fig. 1 is the hardware schematic diagram of transmitting terminal of the present invention;
Fig. 2 is the hardware schematic diagram of receiving terminal of the present invention;
Fig. 3 is flow chart of the present invention;
Fig. 4 is a serial data frame assumption diagram after framing of the present invention;
Fig. 5 is " reference channel " data frame structure figure.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described further.
It is the hardware schematic diagram of a kind of multi-channel data alignment transmitting terminal based on system synchronization and reference channel of the embodiment of the present invention as Fig. 1; Fig. 2 is the hardware schematic diagram of a kind of multi-channel data alignment receiving terminal based on system synchronization and reference channel of the embodiment of the present invention.Below for using the explanation of hardware in Fig. 1,2:
AD plate: complete the AD conversion to radar mean frequency data, and by the data after AD conversion and " system synchronization " framing.
Multiple connection plate: complete the multiple connection to N channel data, 8B10B coding, parallel-serial conversion and electro-optic conversion.
Because N is larger, the serial data bandwidth of data after multiple connection, 8B10B coding, parallel-serial conversion of N channel is larger, beyond the bandwidth capacity scope of 1 electrical to optical converter, therefore convert 2 road light signals to by 2 electricals to optical converter: the data multiplexing of 1 ~ X passage, 8B10B coding, parallel-serial conversion are become the 1st road light signal with electro-optic conversion; The channel data multiple connection of (X+1) ~ N, 8B10B coding, parallel-serial conversion are become the 2nd road light signal with electro-optic conversion.Wherein, X is more than or equal to 2.
Sequencing control plate: produce " system synchronization " and " reference channel " data; The 1st road light signal completing in the future runback fishplate bar reverts to 1 ~ X passage data, and by 1 ~ X passage data of recovering and 1 tunnel " reference channel " data multiplexing, 8B10B encode, parallel-serial conversion and electro-optic conversion; In the future the 2nd road light signal of runback fishplate bar reverts to (X+1) ~ N channel data, and by (X+1) ~ N channel data of recovering and 1 tunnel " reference channel " data multiplexing, 8B10B encode, parallel-serial conversion and electro-optic conversion.
Communication board: the two ways of optical signals from sequencing control plate is reverted to respectively 1 ~ X passage data, (X+1) ~ N channel data, and these N channel data carried out align, separate frame, revert to the data after original AD conversion.
As shown in Figure 3, concrete method of aliging with the multi-channel data of reference channel based on system synchronization comprises the following steps:
1. produce " system synchronization " signal at transmitting terminal
In sequencing control plate, synchronous generator is produced one " system synchronization " by system clock: the positive pulse signal of 1 fixed cycle.And " system synchronization " signal is distributed to N block AD plate by differential signal interface.
Wherein, cycle of " system synchronization " can be Millisecond or second level, positive pulse width is delicate level.
Wherein, differential signal interface effectively can suppress common mode disturbances, can be RS422 interface, also can be LVDS interface.
2., according to " system synchronization ", in the N channel data of transmitting terminal, insert synchronization frame
Synchronization frame is inserted according in data after AD conversion of the positive pulse position of " system synchronization ".Comprise synchronization frame inserting controller and framer:
Described synchronization frame inserting controller, for converting a synchronization frame to by " system synchronization ";
Described framer, for becoming serial data frame to send with synchronization frame framing Frame.
The serial data frame formed after framing all as " synchronization frame instruction ", is all transmission channel data in the positive pulse position of " system synchronization " At All Other Times, and the serial data frame structure formed after framing as shown in Figure 4.
Because the positive pulse duty ratio of " system synchronization " is very little, so the bandwidth that synchronization frame takies in serial data frame is also very little.
3. at transmitting terminal, the channel data of the insertion synchronization frame in step 2 is passed through Optical Fiber Transmission
In multiple connection plate, 1 ~ X passage data multiplexing is become 8 channel parallel datas by multiplexer; Serializer is encoded into 10 channel parallel datas this 8 channel parallel data 8B10B, then converts this 10 channel parallel data to serial data; Electrical to optical converter sends to sequencing control plate after converting this road serial data to the 1st road light signal.
In multiple connection plate, (X+1) ~ N channel data multiplexing is become 8 channel parallel datas by multiplexer; Serializer is encoded into 10 channel parallel datas this 8 channel parallel data 8B10B, then converts this 10 channel parallel data to serial data; Electrical to optical converter sends to sequencing control plate after converting this road serial data to the 2nd road light signal.
In multiple connection plate, the work clock of multiplexer and the reference clock of serializer by system clock divide/frequency multiplication obtains.
In sequencing control plate, the 1st road light signal of optical-electrical converter runback fishplate bar in future converts serial electric signal to; Deserializer recovers clock from serial electric signal, serial signal is converted to 10 road parallel signals, and 10 road parallel signal 8B10B are decoded into 8 road parallel signals; This 8 road parallel signal is divided the data being connected into 1 ~ X passage by coupler.
In sequencing control plate, the 2nd road light signal of optical-electrical converter runback fishplate bar in future converts serial electric signal to; Deserializer recovers clock from serial electric signal, serial signal is converted to 10 road parallel signals, and 10 road parallel signal 8B10B are decoded into 8 road parallel signals; This 8 road parallel signal is divided the data being connected into (X+1) ~ N channel by coupler.
In sequencing control plate, the reference clock of deserializer by system clock divide/frequency multiplication obtain or by the crystal oscillator clock of sequencing control plate divide/frequency multiplication obtains; The work clock of coupler is the recovered clock of serializer.
Wherein, there are commercial product in serializer and the current multiple producer of deserializer, and the CYP15G0101DXB as CYPRESS company just can realize the function of serializer and deserializer.Some FPGA, with built-in Transceivers, can realize the function of serializer and deserializer, as the arria GX of ALTERA company, arria II GX, Cyclone IV GX all with built-in Transceivers.
4., according to " system synchronization ", produce " reference channel " data at transmitting terminal, and carry out Data Synthesis with N channel data
In sequencing control plate, synchronous generator produces " reference channel " data with synchronization frame according to " system synchronization "." reference channel " Frame is in the positive pulse position of " system synchronization " all as " synchronization frame instruction ", and are all transmission filler codes At All Other Times, " reference channel " data frame structure as shown in Figure 5.
In sequencing control plate, 1 ~ X passage data are become 8 channel parallel datas with 1 tunnel " reference channel " data multiplexing by multiplexer; Serializer is encoded into 10 channel parallel datas this 8 channel parallel data 8B10B, then converts this 10 channel parallel data to serial data; Electrical to optical converter sends to communication board by light mouth 1 after serial data being converted to 1 road light signal.
In sequencing control plate, (X+1) ~ N channel data are become 8 channel parallel datas with 1 tunnel " reference channel " data multiplexing by multiplexer; Serializer is encoded into 10 channel parallel datas this 8 channel parallel data 8B10B, then converts this 10 channel parallel data to serial data; Electrical to optical converter sends to communication board by light mouth 2 after serial data being converted to another 1 road light signal.
In sequencing control plate, the reference clock of the work clock of synchronous generator, the work clock of multiplexer and serializer by system clock divide/frequency multiplication obtains.
5. in the data solution synthesis of receiving terminal to transmission
In communication board, optical-electrical converter converts the light signal of light mouth 1 to serial electric signal; Deserializer recovers clock from serial electric signal, serial signal is converted to 10 road parallel signals, and 10 road parallel signal 8B10B are decoded into 8 road parallel signals; This 8 road signal is divided the data and 1 tunnel " reference channel 1 " data that are connected into 1 ~ X passage by coupler.
In communication board, optical-electrical converter converts the light signal of light mouth 2 to serial electric signal; Deserializer recovers clock from serial electric signal, serial signal is converted to 10 road parallel signals, and 10 road parallel signal 8B10B are decoded into 8 road parallel signals; This 8 road signal is divided the data and 1 tunnel " reference channel 2 " data that are connected into (X+1) ~ N channel by coupler.
In communication board, the reference clock of deserializer by the crystal oscillator clock of communication board divide/frequency multiplication obtains; The work clock of coupler is the recovered clock of serializer.
6. carry out main channel selection in the data of receiving terminal to the solution synthesis in step 5
First search for " reference channel 1 " data and the synchronization frame of " reference channel 2 " data, secondly will first search out " reference channel " of synchronization frame as main channel; And using the recovered clock of the deserializer corresponding with " reference channel " that search synchronization frame as master clock.The work clock of alignment of data module below by master clock divide/frequency multiplication obtains.
Comprise:
Synchronization frame search unit, reaches the synchronization frame of data for search " reference channel ".
Selected cell, for selecting main channel and master clock.
7. at receiving terminal, alignment of data is carried out to the data of separating synthesis
First search for the synchronization frame of each channel data, from this synchronization frame, the data of respective channel are write buffer memory successively; Secondly main channel data is postponed a scheduled time, from the main channel data after delay, search synchronization frame; Then from the synchronization frame of this main channel from the original position of each passage buffer memory sense data; Finally the data that each buffer memory reads are carried out separate frame, revert to original AD convert after data.
Comprise:
Writing controller, for searching for the synchronization frame of each channel data, starts according to the position of the synchronization frame searched the buffer memory controlling each channel data.
Buffer, for the data of each passage of difference buffer memory.
Delayer, for postponing a scheduled time by main channel data.
Read Controller, for searching for the synchronization frame of main channel data, the sense data while of control simultaneously from the original position of each passage buffer memory.
Deframer, the frame synchronization information for containing according to received serial data finds the border of frame, then the channel data frame received and synchronization frame is distributed to rear class unit and uses.
Wherein, writing controller comprises:
Synchronization frame search unit, reaches the synchronization frame of data for searching for each passage;
Write enable generation unit, enable for generation of writing of buffer.
Wherein, buffer can be realized from increasing RAM by FIFO or pointer.
Wherein, Read Controller comprises:
Synchronization frame search unit, reaches the synchronization frame of data for searching for main channel;
Read enable generation unit, for generation of buffer read enable.
Wherein, deframer comprises:
Synchronization frame search unit, for searching for the synchronization frame of the data read in buffer;
Data solution frame unit, for decomposition channels Frame and synchronization frame;
Alternatively, all or part of step of above-described embodiment also can use one or more integrated circuit to realize.Correspondingly, each module in above-described embodiment can adopt the form of hardware to realize, and the form of functional module also can be adopted to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.
Specialize, the input data of system transmitting terminal can be not only the analog if signal of radar, also can be the interface signal of other types such as RS232 interface data, RS422 interface data, RS485 interface data, LVDS interface data.
" system synchronization " not only can be produced by sequencing control plate, also by wherein 1 road AD plate or can be produced by multiple connection plate.
Certainly; the present invention can also have other various embodiments; when not deviating from the present invention's spirit and essence thereof; those of ordinary skill in the art change and distortion accordingly when making according to the present invention, but these change accordingly and are out of shape the protection range that all should belong to the claim appended by the present invention.
List of references 1: publishing house of " Principles of Modern Communication "-Qinhua Univ., Beijing publishes in August, 1992 author: Cao Zhigang, Qian Yasheng book number ISBN 7-302-01002-1/TN.31
Claims (5)
1., based on the method that system synchronization is alignd with the multi-channel data of reference channel, comprise the steps:
Step one, transmitting terminal produce " system synchronization " signal, " system synchronization " signal is produced by sequencing control plate, and is distributed to N block AD plate by differential signal interface;
Step 2, basis " system synchronization " signal, insert synchronization frame in the N channel data of transmitting terminal, and every block AD buttress inserts synchronization frame according in data after AD conversion of the positive pulse position of " system synchronization " signal;
Step 3, at transmitting terminal, the channel data of the insertion synchronization frame in step 2 is passed through Optical Fiber Transmission;
Step 4, according to " system synchronization " signal, produces " reference channel " data at transmitting terminal, and carries out Data Synthesis with N channel data;
Step 5, receiving terminal to transmission data solution synthesis;
Step 7, receiving terminal to separate synthesis data carry out alignment of data;
It is characterized in that: described step 4 comprises: first produce " reference channel " data with synchronization frame according to " system synchronization " signal; Secondly by N channel data and 1 tunnel " reference channel " Data Synthesis 1 circuit-switched data, and 1 road light signal is become to give communication board by electro-optic conversion;
Wherein N is more than or equal to 2.
2. the method for aliging with the multi-channel data of reference channel based on system synchronization as claimed in claim 1, it is characterized in that: described step 4 also comprises: by N channel data and M road " reference channel " Data Synthesis M circuit-switched data, and become M road light signal to give communication board by electro-optic conversion, wherein M is greater than 1.
3. the method for aliging with the multi-channel data of reference channel based on system synchronization as claimed in claim 2, it is characterized in that: described step 5 comprises: in communication board, M road light signal becomes the M road signal of telecommunication through opto-electronic conversion, then recovers N channel data and M road " reference channel " data by separating synthesis.
4. the method for aliging with the multi-channel data of reference channel based on system synchronization as described in claim 1 or 3, is characterized in that: it also comprises step 6, carries out main channel selection in the data of receiving terminal to the solution synthesis in step 5.
5. the method for aliging with the multi-channel data of reference channel based on system synchronization as claimed in claim 3, it is characterized in that: it also comprises step 6, carries out main channel selection in the data of receiving terminal to the solution synthesis in step 5, first the synchronization frame on M road " reference channel " is searched for respectively, secondly " reference channel " of synchronization frame will first be searched out as main channel, and using the master clock of the recovered clock of the deserializer corresponding with " reference channel " that search synchronization frame as N channel alignment of data.
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| CN103259537B (en) * | 2013-04-12 | 2016-01-06 | 南京邮电大学 | A kind of based on phase selection interpolation type clock data recovery circuit |
| CN103728592B (en) * | 2014-01-22 | 2015-10-21 | 四川九洲空管科技有限责任公司 | A kind of digital array secondary radar system optical fiber communication method of data synchronization |
| CN104991229B (en) * | 2015-06-25 | 2017-11-24 | 中国船舶重工集团公司第七二四研究所 | A kind of digital beam froming multi-channel optical fibre method of data synchronization |
| CN105933244B (en) * | 2016-04-14 | 2018-11-27 | 浪潮电子信息产业股份有限公司 | A kind of device and method that deflection is gone in channel alignment |
| CN108449088B (en) * | 2018-03-26 | 2022-03-01 | 北京润科通用技术有限公司 | Multichannel high-speed sampling synchronization method and device |
| CN111081294A (en) * | 2019-12-25 | 2020-04-28 | 中国船舶重工集团公司七五0试验场 | Sound signal multi-channel synchronous acquisition and centralized storage system and method |
| CN114448560A (en) * | 2020-11-06 | 2022-05-06 | 深圳市中兴微电子技术有限公司 | Communication chip and data processing method |
| CN112600551B (en) * | 2020-12-17 | 2022-11-01 | 深圳市紫光同创电子有限公司 | Serdes interface circuit |
| CN112769536B (en) * | 2020-12-29 | 2022-06-03 | 苏州匾福光电科技有限责任公司 | Multichannel digital signal synchronization method and system based on bit error rate detection |
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