CN102820929B - Phase estimation method in optical coherence receiving device - Google Patents

Abstract

The invention discloses a phase estimation method in an optical coherence receiving device, and the phase estimation method comprises the following steps of utilizing a coordinate rotary numerical calculation method to convert an input signal expressed by complex information to a first signal a(i)=(gamma(i) +phi(i) +epsilon(i))mod 2pi, and utilizing modular operation to eliminate gamma(i) in the first signal to obtain a second signal c(i); dynamically adjusting the phase noise value for the second signal c(i) to obtain a third signal N(i); utilizing a formula d(i)=c(i)+N(i)*pi/2 to obtain a fourth signal d(i); calculating an average value of the fourth signal d(i) to obtain the estimated phase; and utilizing the estimated phase to conduct phase compensation on the first signal a(i) to obtain an output signal. Multiplication needed by the phase estimation calculation is converted to addition, so that the systematic operational quantity is simplified; and meanwhile, the value interval of the phase estimation quantity is dynamically adjusted, so that the phase hopping problem caused by the restriction of the estimation range in a traditional algorithm can be solved, the dynamic and accurate estimation of the phase can be finally realized, and the performance of the entire system and the realizability of the entire system can be improved.

Description

Phase estimation method in light coherent receiver

Technical field

The present invention relates to light coherent receiver, the phase estimation method in concrete light coherent receiver.

Background technology

Along with the development of optical communication technique, coherent optical communication becomes the core technology of New Generation Optical communication gradually, and wherein PM-QPSK is as a kind of main flow modulator approach, has become OIF standard.For PM-QPSK receiving terminal DSP(Digital Signal Processing) for be mainly divided into following module: Timed Recovery, linear compensation (dispersion compensation, polarization compensation), frequency deviation estimate, phase estimation etc., wherein phase estimation is one of its important component part.

Under normal circumstances, phase estimation algorithm is as follows, and phase noise estimation procedure is exactly the impact being eliminated transmission symbol by algorithm for estimating, sets up the process of phase noise estimator, adopts the method for 4 powers to estimate under normal circumstances.

If the signal of input is Z (i):

Wherein c (i) is transmission symbol, for phase noise, n (i) is system additive noise;

Then, the expression simplifying additive noise after input signal Z (i) 4 power being obtained result is:

(QPSK need add the modulation system being QPSK or 4QAM due to transmission symbol c (i) difference after carry out 4 power computings again), be a constant C after its 4 power, therefore can not affect the estimation of phase noise; N'(i) be additive noise after 4 powers, the final result obtained is:

Its plural phase angle is estimated by result after 4 power computings obtain its phase estimation amount θ:

$\mathrm{\θ}=\frac{1}{4}\arg \left(Z^4\right)---\left(4\right)$

Under normal circumstances in order to reduce the impact of additive noise on estimator performance, can adopt the method noise decrease of mean filter, as measured average to L estimation, therefore final estimator θ ＇ is expressed as:

${\mathrm{\θ}}^{\′}=\frac{1}{4}\arg \left({\mathrm{\Σ}}_{k=0}^L{Z}^4\right)---\left(5\right)$

Known by above-mentioned processing procedure, such method will use 4 power computings in the calculation in a large number, for high speed coherent optical communication system, a large amount of multiplier resources will be consumed, if the performance of other processing modules can be retrained when the hardware system using the such multiplier of such as FPGA limited is to realize greatly, reduce the stability of system simultaneously.

Summary of the invention

Technical problem to be solved by this invention solves a large amount of use 4 power computings in the phase estimation method in light coherent receiver, thus consume multiplier resources in a large number, and the performance of other processing modules of constraint, reduces the problem of the stability of a system greatly.

In order to solve the problems of the technologies described above, the technical solution adopted in the present invention is to provide the phase estimation method in a kind of smooth coherent receiver, comprises the following steps:

Utilize the input signal that Coordinate Rotation Digital computational methods will represent with complex information be converted to the first signal a (i) represented with phase information,

The γ (i) utilizing modular arithmetic to eliminate in the first signal obtains secondary signal c (i), and secondary signal c (i) is pending phase noise signal;

Phase noise value dynamic conditioning is carried out to secondary signal c (i) and obtains the 3rd signal N (i);

Utilize formula obtain the 4th signal d (i);

The mean value calculating the 4th signal d (i) obtains estimating phase place seta:

Utilize and estimate that phase place seta carries out phase compensation to the first signal a (i) and obtains outputing signal out, out=a (i)-seta;

Wherein: the angle that γ (i) is signal transmission, for the angle of phase noise, the angle that ε (i) is additive noise; I is positive integer, represents i-th data in process.

In the above-mentioned methods, set the first signal a (i) and have M position valid data, output area is [0,2 ^m], the angular range of expression is [0,2 π], and numeral is linear corresponding relation with actual corners angle value.

In the above-mentioned methods, according to mean filter demand, multiple first signal a (i) is combined into the pending data of a frame [a (i-n) that length is 2n+1,, a (i) ... a (i+n)], utilize the secondary signal c (i) after modular arithmetic process be combined as [c (i-n) ..., c (i),, c (i+n)].

In the above-mentioned methods, for the input signal of 4QAM modulation, the modular arithmetic formula of secondary signal c (i) is for the input signal of QPSK modulation, the modular arithmetic formula of secondary signal c (i) is $c\left(i\right)=(a\left(i\right)+\frac{\mathrm{\π}}{4})\mathrm{mod}\frac{\mathrm{\π}}{2}.$

In the above-mentioned methods, phase noise value dynamic modulation step is as follows:

First by current secondary signal [c (i-n) ..., c (i),, c (i+n)] produced with a upper clock cycle secondary signal [c_old (i-n) ... c_old (i) ..., c_old (i+n)] and each corresponding position compares, judge whether to occur phase hit, and setting compensation counter register N (i-n) ..., N (i),, N (i+n)] and initial value is 0:

When time, corresponding compensation counter register-1, namely corresponding compensation counter register regressive

When corresponding compensation counter register+1, namely namely corresponding compensation counter register adds up

When $-\frac{\mathrm{\&pi;}}{4}<c\left(i\right)-c\_\mathrm{old}\left(i\right)<\frac{\mathrm{\&pi;}}{4}$ Time, corresponding compensation count register value remains unchanged;

As min (N) > 3, when namely all compensation counter registers are all greater than 3, corresponding all compensation counter registers all-4, namely subtract 2 π;

As min (N) <-3, when namely all compensation counter registers are all less than-3, corresponding all compensation counter registers all+4, namely add 2 π;

As-3 < min (N) < 3, all register values remain unchanged;

Finally obtain required offset registers value N (i-n) ..., N (i) ..., N (i+n)].

In the above-mentioned methods, for the input signal of 4QAM modulation, the low M-2 position of data of getting the first signal a (i) obtains secondary signal c (i); For the input signal of QPSK modulation, the data that the first signal a (i) is corresponding add 2 ^m-3and get its low M-2 position and obtain secondary signal c (i).

The present invention, the multiplication that phase estimation in existing smooth coherent receiver adopts is converted to addition, simplify system operations amount, the interval of dynamic conditioning estimator simultaneously, overcome algorithm estimation range and retrain the phase hit problem caused, the dynamic phase estimation accurately of final realization, thus improve performance and the realizability thereof of whole system.In a word, method provided by the invention, overcome the shortcoming that the consumption of original algorithm multiplier resources is too much, enough overcome the impact of inherent spurious frequency deviation on phase estimation simultaneously, and phase value itself is compensated accurately, and provide feasible implementation method, thus the performance of raising whole system, realizability and stability.

Accompanying drawing explanation

Fig. 1 is the phase estimation method flow chart in smooth coherent receiver provided by the invention;

Fig. 2 estimates phase place interval dynamic adjustment process flow chart.

Embodiment

The invention provides the phase estimation method in a kind of smooth coherent receiver, based on cordic(Coordinate Rotation Digital computational methods) input signal that will represent with complex information be converted to the first signal a (i) represented with phase information, thus by follow-up carry out phase estimation calculate time required multiplication be converted to addition, simplify system operations amount; The interval of dynamic conditioning phase estimation amount, overcomes estimation range in traditional algorithm and retrains the phase hit problem caused simultaneously, and the dynamic phase estimation accurately of final realization, improves performance and the realizability thereof of whole system.Below in conjunction with accompanying drawing, the present invention is described in detail.

As shown in Figure 1, the phase estimation method in smooth coherent receiver provided by the invention, comprises the following steps:

Step 1: utilize the input signal that complex information represents by cordic algorithm be converted to the first signal a (i) represented with phase information, input data are made to be converted to the angle information of its correspondence by complex information.Wherein: the angle that γ (i) is signal transmission, for the angle of phase noise, the angle that ε (i) is additive noise; I is positive integer, represents i-th data in process.

Cordic algorithm and Coordinate Rotation Digital computational methods, its basic thought is: constantly approach the required anglec of rotation with a series of fixed angle, realize the various computings of plural number, be very suitable for the realization of FPGA, Altera and Xilinx is proposed the IP kernel realizing cordic algorithm, according to different demand choice for use, can not do cordic algorithm here and describe in detail.According to signal to noise ratio demand, each input data are carried out cordic coding, after exporting, each data are that M position is long, and output area is [0,2 ^m], the angular range of expression is [0,2 π], and numeral is linear corresponding relation with actual corners angle value, and the value size of M is determined by performance requirements, and M is larger, and precision is higher, estimation effect better (being generally greater than 10 in actual value).

Step 2: the γ (i) utilizing modular arithmetic to eliminate in the first signal obtains secondary signal c (i), secondary signal c (i) is pending phase noise signal.

DATA is the data exported after cordic coding, according to signal to noise ratio demand formed pending data of a frame that length is 2n+1 [a (i-n) ... a (i) ..., a (i+n)], the scope of its each data representation is in [0,2 π].

For the input signal of 4QAM modulation, its γ (i) value therefore by its mould γ (i) can be eliminated, so modular arithmetic formula is realize for actual hardware, the low M-2 position of desirable a (i) data obtains c (i).

For the input signal of QPSK modulation, its γ (i) value therefore its each data are needed to add obtain data b (i), then carry out mould computing obtains c (i).Actual hardware is realized: the data that its a (i) is corresponding can be added 2 ^m-3and get its low M-2 position (ignore carry information and be equivalent to mould 2 π, addition and subtractions all in algorithm is adopted and uses the same method) and can b (i) be obtained, obtain b (i) same by its mould afterwards obtain c (i), namely the modular arithmetic formula of secondary signal c (i) is

At this moment [the c (i-n) that length is 2n+1 is obtained, c (i),, c (i+n)] and Frame is its pending phase noise value, represents the known [c (i-n) of scope by it, c (i) ..., c (i+n)] all exist in.

When the frequency instability of signal and local oscillator light source, frequency excursion algorithm can not eliminate frequency deviation completely, therefore has additive phase and introduces, phase noise value is exceeded scope, therefore needs that its span is adjusted to correct interval and goes.

Step 3: phase noise value dynamic modulation is carried out to secondary signal c (i) and obtains the 3rd signal N (i);

According to the continuity of phse conversion, assuming that input is crossed over before and after setting two angles are respectively with due to the continuous transformation θ 1 of phase place and θ 2 be all one just indivisible, when carrying out mould during computing, actual output corresponding to the phase place inputted below is θ 2, therefore needs to judge whether to occur phase hit according to the difference of former and later two phase places, therefore when both differ β:

$\mathrm{\&beta;}=\mathrm{\&theta;}2-(\frac{\mathrm{\&pi;}}{2}-\mathrm{\&theta;}1)=\mathrm{\&theta;}2+\mathrm{\&theta;}1-\frac{\mathrm{\&pi;}}{2};$

Because θ 1 and θ 2 is just indivisible, therefore at least in like manner when front and back two angle crosses over 0, accordingly, the invention provides following phase noise value dynamic modulation method, concrete steps as shown in Figure 2:

Step 31, by current secondary signal [c (i-n), c (i), c (i+n)] secondary signal [c_old (i-n) that produced with a upper clock cycle, c_old (i) ..., c_old (i+n)] and each corresponding position compares, judge whether to occur phase hit, and setting compensation counter register [N (i-n) ..., N (i),, N (i+n)] and initial value is 0:

Whether step 32, the difference comparing c (i) and c_old (i) are greater than or be less than

When time, corresponding compensation counter register-1, namely corresponding compensation counter register regressive

When corresponding compensation counter register+1, namely namely corresponding compensation counter register adds up

When $-\frac{\mathrm{\&pi;}}{4}<c\left(i\right)-c\_\mathrm{old}\left(i\right)<\frac{\mathrm{\&pi;}}{4}$ Time, corresponding compensation count register value remains unchanged.

Step 33, judge whether the value of all compensation counter registers is greater than 3 or be less than-3.

As min (N) > 3, when namely all compensation counter registers are all greater than 3, corresponding all compensation counter registers all-4, namely subtract 2 π;

As min (N) <-3, when namely all compensation counter registers are all less than-3, corresponding all compensation counter registers all+4, namely add 2 π;

As-3 < min (N) < 3, all register values remain unchanged.

Step 34, finally obtain required offset registers value N (i-n) ..., N (i) ..., N (i+n)].

Step 4: utilize formula $d\left(i\right)=c\left(i\right)+N\left(i\right)\&times;\frac{\mathrm{\&pi;}}{2}$ Obtain the 4th signal d (i);

Step 5: the mean value calculating the 4th signal d (i) obtains estimating phase place seta, $\mathrm{aeta}=\frac{1}{2n+1}\underset{i=-n}{\overset{n}{\mathrm{\&Sigma;}}}d\left(i\right):$

Step 6: utilize and estimate that phase place seta carries out phase compensation to the first signal a (i) and obtains outputing signal out, out=a (i)-seta.

Can adopt said structure when phse conversion is very fast, namely every frame data compensate all to one of them data, and many pipeline organizations can be adopted to ensure to estimate multiple phase place simultaneously, and input and output data transfer rate is consistent.

When phse conversion is slow, every frame data can be adopted all to compensate to wherein one piece of data, also can adopt the structure of streamline.

out＝a(i)-seta;-n＜-m＜i＜m＜n。

M represents the length being less than n one piece of data.

The present invention is not limited to above-mentioned preferred forms, and anyone should learn the structural change made under enlightenment of the present invention, and every have identical or close technical scheme with the present invention, all falls within protection scope of the present invention.

Claims (4)

1. the phase estimation method in smooth coherent receiver, is characterized in that, comprise the following steps:

Coordinate Rotation Digital computational methods are utilized the input signal represented with complex information to be converted to the first signal a (i) represented with phase information,

The γ (i) utilizing modular arithmetic to eliminate in the first signal obtains secondary signal c (i), and secondary signal c (i) is pending phase noise signal; For the input signal of 4QAM modulation, the modular arithmetic formula of secondary signal c (i) is for the input signal of QPSK modulation, the modular arithmetic formula of secondary signal c (i) is $c\left(i\right)=(a\left(i\right)+\frac{\mathrm{\&pi;}}{4})\mathrm{mod}\frac{\mathrm{\&pi;}}{2};$

Phase noise value dynamic conditioning is carried out to secondary signal c (i) and obtains the 3rd signal N (i);

Utilize formula obtain the 4th signal d (i);

The mean value calculating the 4th signal d (i) obtains estimating phase place seta:

Utilize and estimate that phase place seta carries out phase compensation to the first signal a (i) and obtains outputing signal out, out=a (i)-seta;

Wherein: the angle that γ (i) is signal transmission, for the angle of phase noise, the angle that ε (i) is additive noise; I is positive integer, represents i-th data in process;

Phase noise value dynamic modulation step is as follows:

First by current secondary signal [c (i-n) ..., c (i),, c (i+n)] produced with a upper clock cycle secondary signal [c_old (i-n) ... c_old (i) ..., c_old (i+n)] and each corresponding position compares, judge whether to occur phase hit, and setting compensation counter register N (i-n) ..., N (i),, N (i+n)] and initial value is 0:

When time, corresponding compensation counter register-1, namely corresponding compensation counter register regressive

When corresponding compensation counter register+1, namely namely corresponding compensation counter register adds up

When time, corresponding compensation count register value remains unchanged;

As min (N) > 3, when namely all compensation counter registers are all greater than 3, corresponding all compensation counter registers all-4, namely subtract 2 π;

As min (N) <-3, when namely all compensation counter registers are all less than-3, corresponding all compensation counter registers all+4, namely add 2 π;

As-3 < min (N) < 3, all register values remain unchanged;

Finally obtain required offset registers value [N (i-n) ..., N (i) ..., N (i+n)].

2. the phase estimation method in light coherent receiver as claimed in claim 1, is characterized in that,

Set the first signal a (i) and have M position valid data, output area is [0,2 ^m], the angular range of expression is [0,2 π], and numeral is linear corresponding relation with actual corners angle value.

3. the phase estimation method in light coherent receiver as claimed in claim 1, it is characterized in that, according to mean filter demand multiple first signal a (i) is combined into pending data of a frame that length is 2n+1 [a (i-n) ... a (i),, a (i+n)], utilize the secondary signal c (i) after modular arithmetic process to be combined as [c (i-n), c (i) ..., c (i+n)].

4. the phase estimation method in light coherent receiver as claimed in claim 2, is characterized in that,

For the input signal of 4QAM modulation, the low M-2 position of data of getting the first signal a (i) obtains secondary signal c (i);

For the input signal of QPSK modulation, the data that the first signal a (i) is corresponding add 2 ^m-3and get its low M-2 position and obtain secondary signal c (i).