CN101917308A - FPGA-based signal transmission network group delay measuring device and method - Google Patents
FPGA-based signal transmission network group delay measuring device and method Download PDFInfo
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- CN101917308A CN101917308A CN 201010263072 CN201010263072A CN101917308A CN 101917308 A CN101917308 A CN 101917308A CN 201010263072 CN201010263072 CN 201010263072 CN 201010263072 A CN201010263072 A CN 201010263072A CN 101917308 A CN101917308 A CN 101917308A
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Abstract
The invention belongs to the technical field of group delay measurement and relates to an FPGA-based signal transmission network group delay measuring device. The device comprises a main FPGA measuring circuit and an upper computer, wherein the main FPGA measuring circuit comprises an FPGA chip, a communication circuit and a D/A and A/D conversion circuit. A digital sinusoidal signal generated by a DDS of an FPGA is subjected to D/A conversion and is output to equipment to be measured; the signal to be measured is first transmitted by the equipment to be measured, then returned to an input end of a measuring unit, later on sent to the FPGA after A/D conversion, and finally subjected to digital orthogonal sequential demodulation by an MAC to obtain the real part and imaginary part information of the measured signal; and the measured data is processed by the upper computer to obtain the group delay characteristics of the equipment to be measured. The invention also provides a group delay measuring method which adopts the device. The device and the system can conveniently and flexibly adjust the frequency range of the measured signal and control the measurement process, have simple and convenient operation and low cost, and have very important significance in the field of group delay measurement.
Description
Technical field
The invention belongs to transmission network group delay field of measuring technique, relate to a kind of group delay measuring set and method of measurement based on FPGA.
Background technology
Group delay has been described the phase characteristic of signal transmission network and signal by time delay that network produced.This notion now has been widely used in textbook early than proposing the thirties in 20th century, and it is defined as the opposite number of phase place diagonal frequencies difference quotient.Transmission network postpones signal transmission time and the important parameter of distorted signals influence as weighing, and the measurement of group delay has important use value on to systematic function research and improvement, obtained very big concern.In available research achievements, the method for measurement of group delay mainly contains: modulation method and based on the method for measurement of vector network analyzer (Vector Network Analyzer).Wherein, modulation method is a kind of envelope delay measuring technique, on using significant limitation is arranged; Based on dependence to vector measurement hardware, feasible method of measurement cost height based on vector network analyzer, and difficult definite to the optimum Working of group delay measuring process, pass through repeatedly heuristic analysis possibly, brought the inconvenience of using.
Summary of the invention
The objective of the invention is to overcome the deficiencies in the prior art, provide a kind of and be convenient to operate, applying flexible be applicable to the device that extensive group delay is measured.The object of the present invention is achieved like this:
A kind of signal transmission network group delay measuring device based on FPGA, be used to measure the signal transmission network group delay of Devices to test, comprise FPGA master's measuring circuit unit and host computer two parts, described FPGA master's measuring circuit unit comprises fpga chip, telecommunication circuit, D/A change-over circuit and A/D change-over circuit, the fpga chip of main measuring circuit links to each other with host computer by telecommunication circuit, fpga chip is connected respectively to the signal output part and the input of main measuring circuit unit by D/A change-over circuit and A/D change-over circuit, and the signal output part of main measuring circuit unit and input are connected to form with the input of Devices to test and output respectively and measure the loop; By to the FPGA programming, press the digital positive string signal of a fixed step size circulation change in the DDS generation certain frequency scope by fpga chip, after changing through D/A, this signal reaches the signal output part of main measuring circuit unit; The measuring-signal that returns from Devices to test by main measuring circuit unit input and the A/D conversion after be admitted to fpga chip; MAC by fpga chip carries out the orthogonal sequence demodulation to measuring-signal, the reference signal of demodulation is the sinusoidal signal under the corresponding frequencies that DDS produced, thereby obtain the real part and the imaginary part information of measuring-signal, and be admitted to host computer, obtain the phase-frequency response in whole measurement loop after to signal processing by host computer, determine the group delay of Devices to test.
The present invention provides a kind of group delay method of measurement that adopts the described measurement mechanism of claim 1 to realize simultaneously, comprises the following steps:
1) signal output part with main measuring circuit links to each other with input, according to the application performance of Devices to test, sets appropriate frequency range of DO and frequency delay aperture by host computer, determines the frequency test point;
2) enter test pattern, host computer calculates respective phase according to real part, the imaginary part information of the measuring-signal that obtains, by the group delay computing formula by the group delay computing formula
Obtain device self circuit group time delay τ
0, in the formula, Δ θ is the phase place of measuring-signal, is unit with the degree, Δ f is that frequency delay aperture is a frequency step;
3) output of main measuring circuit, input are connected to form with input, the output of Devices to test respectively measure the loop, 1) in frequency range and the frequency determined postpone to test measuring the loop under the aperture, in like manner obtain the group delay τ in whole measurement loop
1
4) calculate τ
1-τ
0, obtain the group delay τ of Devices to test
d
Device and method of the present invention can obtain the group delay of Devices to test, for time of delay and the distortion situation of studying the Devices to test transmission signals provides important reference.This invention is based on programmable logic device FPGA, integrated signal generation, conditioning and demodulation function and with the communication function of host computer, by software programming be convenient to realize, cost is low, have portability and autgmentability preferably, control and easy and simple to handle, flexible has using value in group delay measurement and application.
Description of drawings
Fig. 1 group delay measuring set schematic diagram based on FPGA of the present invention;
Fig. 2 FPGA measuring circuit structure chart.
Specific implementation method
Below in conjunction with accompanying drawing and enforcement the present invention is further described.
Fig. 1 is a signal transmission network group delay measuring device schematic diagram implemented according to the invention.Main composition is FPGA master's measuring circuit (1) and host computer (2), and (3) are Devices to test.Host computer is realized related setting and the control to measuring process; FPGA master's measuring circuit realize test signal generation, conditioning and demodulation and with the communicating by letter of host computer.
Setting according to host computer, main measuring circuit produces the interior sinusoidal test signal by a fixed step size cyclical-transformation of certain frequency scope and outputs to Devices to test, the transmission of signal process Devices to test is back to main measuring circuit and carries out quadrature demodulation, and demodulation result reaches host computer.
Fig. 2 is the structure chart of FPGA master's measuring circuit, mainly comprises FPGA master chip (4), communications portion (5), D/A change-over circuit (6) and A/D change-over circuit (7).
Generation by the IP kernel DDS of FPGA and MAC programming being realized flexibly test sinusoidal signal and to the quadrature demodulation of inverse signal.IP kernel DDS can produce the very digital sine signal of wide frequency ranges, and the resolution value of initial phase and frequency can be set as required, is easy to realize that by programming frequency postpones the flexible control of aperture, frequency test point and test loop.To being treated to of measuring-signal key of the present invention, in order to obtain the measuring-signal phase-frequency response, the real part and the imaginary values of Applied Digital orthogonal sequence demodulation picked up signal can be realized by demodulation module IP kernel MAC.If the signal that records after changing through D/A is:
Reference signal is the sine and the cosine signal of the zero initial phase of DDS generation, and then demodulating process is as follows:
Be the real part V that has obtained measuring-signal after the demodulation respectively
RWith imaginary part V
IHost computer is according to the real part that obtains, the phase place that imaginary part calculates signal:
Promptly obtained the phase-frequency response of signal circuit, by the group delay computing formula:
(wherein,
θ is the phase place of measuring-signal, is unit with radian and degree respectively; ω, f are respectively the angular frequency and the frequency of signal, and Δ f is the frequency aperture.), can determine to measure the group delay in loop.The group delay of main measuring circuit can realize by himself and demarcate in advance, thereby can determine the group delay of Devices to test.
Communications portion of the present invention can adopt the usb communication mode, selects the EZ-USB FX2 family chip of CYPRESS company for use, so that with the two-way communication of host computer and accelerate communication speed; D/A converter and A/D converter can be selected the AD9754 with high-resolution and conversion speed and the AD9240 of AD company respectively for use.
The group delay of using this measurement device equipment specifically may further comprise the steps:
1) signal output part with main measuring circuit links to each other with input, according to the application performance of Devices to test, sets appropriate frequency range of DO and frequency delay aperture (step-length) by host computer, promptly determines the frequency test point; Enter test pattern, host computer calculates respective phase according to the real part, the imaginary part that obtain, obtains device self circuit group time delay τ by the group delay computing formula
0
2) output of main measuring circuit, input are connected to form with input, the output of Devices to test respectively measure the loop, 1) in the frequency range determined and postpone to test measuring the loop under the aperture, in like manner obtain the group delay τ in whole measurement loop
1
3) host computer COMPUTER CALCULATION τ
1-τ
0, obtain the group delay τ of Devices to test
d
Claims (2)
1. signal transmission network group delay measuring device based on FPGA, be used to measure the signal transmission network group delay of Devices to test, comprise FPGA master's measuring circuit unit and host computer two parts, described FPGA master's measuring circuit unit comprises fpga chip, telecommunication circuit, D/A change-over circuit and A/D change-over circuit, the fpga chip of main measuring circuit links to each other with host computer by telecommunication circuit, fpga chip is connected respectively to the signal output part and the input of main measuring circuit unit by D/A change-over circuit and A/D change-over circuit, and the signal output part of main measuring circuit unit and input are connected to form with the input of Devices to test and output respectively and measure the loop; By to the FPGA programming, press the digital positive string signal of a fixed step size circulation change in the DDS generation certain frequency scope by fpga chip, after changing through D/A, this signal reaches the signal output part of main measuring circuit unit; The measuring-signal that returns from Devices to test by main measuring circuit unit input and the A/D conversion after be admitted to fpga chip; MAC by fpga chip carries out the orthogonal sequence demodulation to measuring-signal, the reference signal of demodulation is the sinusoidal signal under the corresponding frequencies that DDS produced, thereby obtain the real part and the imaginary part information of measuring-signal, and be admitted to host computer, obtain the phase-frequency response in whole measurement loop after to signal processing by host computer, determine the group delay of Devices to test.
2. a group delay method of measurement that adopts the described measurement mechanism of claim 1 to realize comprises the following steps:
1) signal output part with main measuring circuit links to each other with input, according to the application performance of Devices to test, sets appropriate frequency range of DO and frequency delay aperture by host computer, determines the frequency test point;
2) enter test pattern, host computer calculates respective phase according to real part, the imaginary part information of the measuring-signal that obtains, by the group delay computing formula by the group delay computing formula
Obtain device self circuit group time delay τ
0,
In the formula, Δ θ is the phase place of measuring-signal, is unit with the degree, and Δ f is that frequency delay aperture is a frequency step;
3) output of main measuring circuit, input are connected to form with input, the output of Devices to test respectively measure the loop, 1) in frequency range and the frequency determined postpone to test measuring the loop under the aperture, in like manner obtain the group delay τ in whole measurement loop
1
4) calculate τ
1-τ
0, obtain the group delay τ of Devices to test
d
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102508024A (en) * | 2011-09-20 | 2012-06-20 | 郑州轻工业学院 | Frequency and phase difference precision measurement method based on frequency and phase relationship auxiliary processing |
| CN102938714A (en) * | 2012-11-29 | 2013-02-20 | 迈普通信技术股份有限公司 | System and method for testing input frequency deviation tolerance of gigabit Ethernet interface |
| CN105515910A (en) * | 2015-12-17 | 2016-04-20 | 北京无线电计量测试研究所 | Group delay measuring method and device |
| CN111082834A (en) * | 2019-12-13 | 2020-04-28 | 浙江大学 | Radio frequency time delay rapid measuring device based on chirp signal orthogonal demodulation |
| CN111478866A (en) * | 2020-03-17 | 2020-07-31 | 重庆邮电大学 | Method for realizing physical broadcast channel analysis based on FPGA |
| CN113055108A (en) * | 2021-01-18 | 2021-06-29 | 浙江大学 | Method and device for measuring group delay of frequency mixer |
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| US20060020865A1 (en) * | 2004-07-22 | 2006-01-26 | Fa Dai | Automatic analog test & compensation with built-in pattern generator & analyzer |
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| US20060020865A1 (en) * | 2004-07-22 | 2006-01-26 | Fa Dai | Automatic analog test & compensation with built-in pattern generator & analyzer |
Non-Patent Citations (1)
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| 《仪器仪表学报》 20100131 于长军等 一种基于软件无线电技术的变频系统群时延精确测量方法 第166-171页 1,2 第31卷, 第1期 2 * |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102508024A (en) * | 2011-09-20 | 2012-06-20 | 郑州轻工业学院 | Frequency and phase difference precision measurement method based on frequency and phase relationship auxiliary processing |
| CN102938714A (en) * | 2012-11-29 | 2013-02-20 | 迈普通信技术股份有限公司 | System and method for testing input frequency deviation tolerance of gigabit Ethernet interface |
| CN102938714B (en) * | 2012-11-29 | 2015-06-10 | 迈普通信技术股份有限公司 | System and method for testing input frequency deviation tolerance of gigabit Ethernet interface |
| CN105515910A (en) * | 2015-12-17 | 2016-04-20 | 北京无线电计量测试研究所 | Group delay measuring method and device |
| CN105515910B (en) * | 2015-12-17 | 2018-10-30 | 北京无线电计量测试研究所 | A kind of Group Delay Measurement method and apparatus |
| CN111082834A (en) * | 2019-12-13 | 2020-04-28 | 浙江大学 | Radio frequency time delay rapid measuring device based on chirp signal orthogonal demodulation |
| CN111478866A (en) * | 2020-03-17 | 2020-07-31 | 重庆邮电大学 | Method for realizing physical broadcast channel analysis based on FPGA |
| CN111478866B (en) * | 2020-03-17 | 2022-04-22 | 重庆邮电大学 | Method for realizing physical broadcast channel analysis based on FPGA |
| CN113055108A (en) * | 2021-01-18 | 2021-06-29 | 浙江大学 | Method and device for measuring group delay of frequency mixer |
| CN113055108B (en) * | 2021-01-18 | 2022-06-17 | 浙江大学 | Method and device for measuring group delay of frequency mixer |
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