CN102820225B - There is the manufacture method of the high-voltage high-speed soft-recovery diode of diffusing buffer layer - Google Patents

There is the manufacture method of the high-voltage high-speed soft-recovery diode of diffusing buffer layer Download PDF

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CN102820225B
CN102820225B CN201210285197.9A CN201210285197A CN102820225B CN 102820225 B CN102820225 B CN 102820225B CN 201210285197 A CN201210285197 A CN 201210285197A CN 102820225 B CN102820225 B CN 102820225B
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diffusion
resilient coating
recovery diode
single crystal
silicon single
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CN102820225A (en
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周伟松
刘道广
张斌
王培清
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Beijing Thupe Technology Co Ltd
Tsinghua University
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Tsinghua University
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Abstract

The invention discloses a kind of manufacture method with the high-voltage high-speed soft-recovery diode of diffused resilient coating belonging to semiconductor device scope.Diffusing buffer layer fast recovery diode adopts twice method of diffusion to make resilient coating, before PN junction and electrode preparation, first a phosphorus diffusion is adopted, the phosphorus diffusion region of low concentration and dark junction depth is generated on silicon chip two sides, thereafter fall apart in process in the diffusion of secondary phosphorus and boron aluminum extension, the junction depth of a phosphorus diffusion continues to advance, and the junction depth of final phosphorus diffusion ratio secondary phosphorus diffusion goes out about 20 μm deeply, and one time phosphorus diffusion front concentration is less than 1 × 10 15/ cm -3the degree of depth in region is no less than 15 μm; Adopt nondefective zone silicon crystal and diffused resilient coating, significantly can improve the voltage and current level of quick soft-recovery diode.<!--1-->

Description

There is the manufacture method of the high-voltage high-speed soft-recovery diode of diffusing buffer layer
Technical field
The invention belongs to semiconductor device scope, particularly a kind of manufacture method with high pressure (1600V) quick soft-recovery diode of diffusing buffer layer.
Background technology
The basic structure of diode is exactly a PN junction (as shown in accompanying drawing 1,2), but in order to extraction electrode, P+ and the N+ layer of high concentration must be introduced in the contact portion of electrode and semi-conducting material, to guarantee ohmic contact, and reduce ohmic contact resistance, can appreciate that from the operation principle of diode
1) during forward, namely at the anode (P of diode +) "+" pole of termination external circuit, negative electrode (N +) termination "-" pole, under the effect of electric field, P +end will to N -base injects a large amount of positively charged minority carrier--holes, N +end is to N -base injects a large amount of electronegative majority carrier-electronics.Due to the injection of electric charge a large amount of in base, base resistance is sharply reduced, and this is called as " conductivity modulation effect ".Therefore very large electric current can be passed through during diode forward, and pressure drop is very little.
2) time oppositely, i.e. "-" pole of anode termination external circuit, negative electrode termination "+" pole, under the effect of electric field, few son (minority carrier) hole positively charged in base will face south and extremely flow out, and electronegative many sons (majority carrier) electronics flows out to cathode terminal, and the electric charge in base sharply reduces, resistance sharply strengthens, and presents high resistant characteristic.Therefore can bear very high reverse voltage during diode reverse, only have very little leakage current.
3) reverse recovery characteristic.When just at the diode of conducting additional reverse voltage, due to during forward conduction to N -base is filled with a large amount of few sub-hole, therefore needs these few sons extract out completely or neutralize before realization turns off, and this process is called " reversely restoring process ".At the beginning of reversely restoring process, in base, a large amount of charge carrier is drawn out of under additional reverse voltage effect, and after charge carrier quantity drops to certain level, PN junction space charge region starts to set up, and decimate action stops.Excess carrier, can only be neutralized by composite action by shutoff in base.Accompanying drawing 3 is the current-voltage waveform schematic diagram of reversely restoring process.In figure, t afor storing or the time of extraction, t bfor compound or in and the time, t rrfor reverse recovery time, t rr=t a+ t b, Reverse recovery softness is S, S=t b/ t a, require that reverse recovery characteristic is soft, be in fact exactly require that S value is large, namely require extraction time t aless as far as possible, extract speed as far as possible hurry up, and recombination time t blong as far as possible, recombination velocity is slow as far as possible.
The feature of fast recovery diode is:
1) require that reverse recovery time is short, thus switching speed is fast.
Realize this purpose, set about from 2 aspects.One is shorten extraction time t a.The most effective way is thinning base, thus reduces the charge carrier quantity in base, but the thinning side effect in base is then the reverse voltage degradation of diode.Two is improve recombination velocity to reduce t recombination time b, normally in base, introduce complex centre by techniques such as expansion gold, platinum expansion, electron irradiation, ion irradiations, its side effect is then the forward voltage drop of diode and the serious increase of power loss.For making the increase of forward voltage drop as far as possible little, also wishing that base is as far as possible thinning, to offset the side effect introducing complex centre, but the problem of the reverse voltage degradation of diode will be encountered equally.The reverse voltage of Here it is fast recovery diode is difficult to do height, and well below the basic reason place of general-purpose diode.
2) require that Reverse recovery softness is large, impact with the overvoltage reducing reversely restoring process.
Reverse recovery softness counts for much for the reliability of circuit and equipment.Softness and Reverse recovery di r/ dt
Softness is larger, means di r/ dt is less.Di rthe product of/dt and circuit inductance (comprising stray inductance) constitutes additional reverse voltage (V rM-V r) spike (as accompanying drawing 3).Softness is less, di r/ dt is larger, and this due to voltage spikes is higher, even can much larger than normal reverse voltage V r.This due to voltage spikes for other equipment that equipment self and electrical network connect be all macro-energy, high-tension overvoltage impacts harmonious wave interference, has very large danger and destructiveness.The situation that switching frequency is higher, reverse recovery time is shorter, this problem is more serious, thus also more outstanding to the requirement of Reverse recovery softness.
For solving above-mentioned two key issues of fast recovery diode, there has been proposed at high concentration N +forward position increase the N thin layer of a low concentration, this thin layer is called as resilient coating, and its structure and CONCENTRATION DISTRIBUTION schematic diagram are shown in accompanying drawing 4 and accompanying drawing 5.
Resilient coating improves the principle of voltage, thinning base
When diode bears reverse voltage, space charge region is broadening in base, and determines base width.The electric field E distribution situation of space charge region is shown in accompanying drawing 6.Illustrate 3 kinds of situations in figure, 3 kinds of situations are all based on identical N -base doping concentration.
1st kind of situation, assuming that base width does not limit, space charge region by broadening to X mplace, base width is greater than X m, the avalanche breakdown voltage V that reverse voltage at this moment will reach corresponding to base doping concentration b.
2nd kind of situation, base width is restricted to N +edge, without resilient coating.In this case, space charge region broadening is to N +edge just enter N +barrier layer, due to N +layer dense, compare N -high 6 ~ 7 orders of magnitude in base, avalanche breakdown voltage is very low, just can avalanche breakdown occur and stop very soon after therefore entering.Reverse voltage comparatively the first situation has degradation, usually can only reach 0.7V bleft and right.
3rd kind of situation, has the existence of resilient coating, base width X1.At this moment, N resilient coating will be entered after space charge region broadening to X1 and continue broadening to X2, because the doping content of N resilient coating is also not bery high, only than N -the high order of magnitude in base, have higher avalanche breakdown voltage, reverse voltage can reach 0.9V bleft and right, higher than the second situation with identical base thickness.Broadening in simultaneous buffering layer is narrow, and width (X2-X1) only has about 0.3 of (Xm-X1) usually, makes base thickness greatly thinning, thus substantially reduces reverse recovery time and forward on-state voltage drop.
Resilient coating improves the principle of Reverse recovery softness
In the semiconductors, except PN junction, also has a kind of height knot, namely at the interface that the semiconductor memory of identical conduction type suddenlys change in doping content, as the N in accompanying drawing 6 -n interface and NN +, all there is height knot in interface.Height knot is because both sides, interface exist concentration difference, high concentration charge carrier on one side will spread to low concentration side, make the electric charge disequilibrium of both sides, interface and produce electric field, the foundation of electric field stops again charge carrier to spread further, till extension and electric field force balance.
N resilient coating is introduced in the base of diode, makes to create N in base -n and NN +two height tie electric field, and the electric field strength of these two electric fields is all very weak, generally at below 0.3V.Diode forward conducting and when oppositely extracting, 2 height knots all flood by the charge carrier of high concentration in base, can not have an impact.But in the latter stage oppositely extracted, base carrier concentration is very low, and the at this moment existence of 2 height knots will, to oppositely having extracted barrier effect, make in base, especially in resilient coating, more charge carrier is had to be left and to enter the compound stage, for the prolongation of recombination time is made contributions.After entering the compound stage, the existence of 2 height knots plays barrier effect to diffusion-compound that resilient coating carriers is outside again, has also delayed recombination velocity.The superposition of two aspect effects, makes resilient coating for extending recombination time, to improve the effect of Reverse recovery softness very remarkable.
The control of resilient coating width and concentration
Can N resilient coating really play the effect of resilient coating, and the control of its width and concentration is most important.Doping content must control 10 14/ cm 3within scope, width about 20 μm.If concentration is too low, or width is too narrow, and space charge region will break-through, and voltage degradation, does not have the effect of buffering; If concentration is too high, then compound is too fast, does not have the effect of resilient coating equally, but also loses conductance modulation ability, and pressure drop is increased.Therefore the control of doping content and width is the key that can resilient coating better play a role.
Summary of the invention
The object of the invention is to propose a kind of manufacture method with the high-voltage high-speed soft-recovery diode of diffusing buffer layer, it is characterized in that, adopt twice method of diffusion to make resilient coating, obtain diffusing buffer layer fast recovery diode; Before PN junction and electrode preparation, first a phosphorus diffusion is adopted, the phosphorus diffusion region of low concentration and dark junction depth is generated on silicon chip two sides, thereafter fall apart in process in the diffusion of secondary phosphorus and boron aluminum extension, the junction depth of a phosphorus diffusion continues to advance, the junction depth X2 that final phosphorus diffusion junction depth X1 spreads than secondary phosphorus goes out 15-25 μm deeply, and a phosphorus diffusion concentration is lower than 1 × 10 15cm -3the forward position degree of depth (X1-X) be no less than 15 μm; Concrete manufacturing step is as follows:
(1) raw material adopt zero defect, dislocation-free zone silicon crystal disk, and doping content is 10 12~ 10 14cm -3, silicon wafer thickness is 300 ~ 400 μm;
(2) at above-mentioned silicon single crystal disk two sides low temperature (950 ~ 1050 DEG C), short time (5 ~ 10 minutes) sedimentary phosphor, then high temperature (1240 ~ 1260 DEG C), long-time diffusion (60 ~ 70 hours), form low concentration ((2 ~ 6) × 10 16cm -3), the dark n type diffused layer of junction depth 55 ~ 60 μm;
(3) in silicon single crystal disk two sides high temperature (1180 ~ 1200 DEG C) of step (2), long-time (2.5 ~ 3.5 hours) deposition high concentration is NS > 1 × 10 21cm -3n +phosphorus thin layer;
(4) by the silicon single crystal disk safe-sided disk of step (3), grinding depth should be greater than n type diffused layer (representative value: 80 ~ 120 μm);
(5) by the flour milling coating boron-aluminium diffuse source of sol evenning machine in the silicon single crystal disk of step (4), then high temperature (1240 ~ 1260 DEG C), long-time (20 ~ 30 hours) diffusion advance; N, N +diffusion layer advances simultaneously, and junction depth is respectively X1, X2, should guarantee that width (X1-X2) reaches 15 ~ 25 μm; Concentration is less than 1 × 10 15cm -3forward position junction depth (X1-X) be no less than 15 μm;
(6) platinum expansion: carry out high temperature platinum expansion to the silicon single crystal disk of step (5), controls minority carrier lifetime.Platinum source adopts chloroplatinic acid, diffusion temperature 800 ~ 950 DEG C, time 30-60 minute, and high pure nitrogen is protected;
(7) cyclotomy: adopt carborundum disc cyclotomy cutter that the silicon single crystal disk of step (6) is cut into required size (representative value: 400A-φ 30; 1000A-φ 45) disk;
(8) anode electrode makes: in high-temperature vacuum sintering furnace, by means of aluminium foil, the silicon single crystal disk after step (7) cyclotomy and molybdenum sheet are sintered together, and forms the anode of chip;
(9) cathode electrode makes: deposited by electron beam evaporation is greater than 10 μm of thick aluminium films in the cathode plane evaporation that the chip of step (8) does not sinter molybdenum sheet, then 500 ~ 520 DEG C of annealing 0.5 ~ 1 hour is placed in vacuum annealing furnace, reach microalloying, form cathode electrode;
(10) carry out angle lap (25 °) moulding, mesa etch and table top 408 silicon rubber passivation protection to the chip of step (9), so far, the high-voltage high-speed soft recovery diode chip manufacturing process with diffusing buffer layer completes.
Advantage of the present invention is that homepitaxy resilient coating diode is compared, and the present invention has following features:
(1) can pass through method of diffusion, introduce diffusing buffer layer in base, realize quick, the soft recovery characteristics only having epitaxial diode to realize, cost significantly reduces.
(2) voltage can do higher than epitaxial diode, because N -the width of base has not had technologic restriction.In addition, diffused diode adopts table top end process, is also beneficial to and does high voltage.
(3) electric current can do very large, because what adopt is zero defect, dislocation-free zone silicon crystal, can do large-area chips, can do 1 chip by 1 whole wafer, electric current can accomplish hundreds of, several thousand and even ampere up to ten thousand.
(4) weak point: concentration and the degree of depth of diffused N buffering area are not easy accurate control, and the dispersiveness of element characteristic is large compared with epitaxial diode.
Accompanying drawing explanation
Accompanying drawing 1, general-purpose diode basic structure schematic diagram.
Accompanying drawing 2, general-purpose diode doping concentration distribution schematic diagram.
Accompanying drawing 3, diode buffer layer structure schematic diagram.
Accompanying drawing 4, Reverse recovery waveform schematic diagram.
Accompanying drawing 5, diffusing, buffering layer diode CONCENTRATION DISTRIBUTION schematic diagram.
Accompanying drawing 6, diffused diode space charge region broadening schematic diagram.
Accompanying drawing 7, diffusing buffer layer making step.
Embodiment
The present invention proposes a kind of manufacture method with the high-voltage high-speed soft-recovery diode of diffusing buffer layer.Be explained below in conjunction with accompanying drawing.
Up to now, the resilient coating of fast recovery diode all adopts two step epitaxy methods to make.Main making step is as follows: raw material adopt silicon single crystal N +substrate slice, thick 500 ~ 600 μm of sheet, doping content > 8 × 10 19cm -3; At N +substrate slice grows skim concentration 10 with epitaxy method 14cm -3the silicon single crystal thin film of scope is as N resilient coating; Epitaxial growth N is continued again on N resilient coating -single crystalline layer is used for the N of diode -base and P +the making of layer.
By the problem that epitaxy method makes fast recovery diode existing be: 1, in view of the technical merit of current epitaxy technique, epitaxy layer thickness is the highest can only accomplish 100 μm, and these 100 μm comprise P +, N -with N resilient coating three part, N -base width also just remains about 60 μm, and voltage accomplishes that 1200V has been the limit.If increase epitaxial thickness, epitaxial layer quality will be reduced to unacceptable level.2, electric current does not quite.The level that different from nondefective zone silicon crystal, epitaxial silicon single crystal does not also reach at present " zero defect ", and epitaxial loayer is thicker, and defect is more.And defect often destroys the chip at this defect place.Therefore, make device with epitaxy method, can not do a chip by a wafer, usually will do a lot of chips on a wafer, chip size is less, and defective effect is less, and rate of finished products is higher.Current epitaxial silicon fast recovery diode maximum core chip size 10 × 15mm, electric current can reach 150A, ceiling voltage 1200V.Electric current and voltage levvl can not show a candle to the height of method of diffusion.
The advantage making fast recovery diode of epitaxy method is: P +, N -can accurately control with the concentration of N resilient coating three part and width, characteristic is easy to optimize; Again due to N -base is short, P +district's concentration is high, P +distribute with the even concentration of N resilient coating, therefore can do shorter than method of diffusion reverse recovery time, forward voltage drop can be lower.
The present invention adopts twice method of diffusion to make resilient coating, before PN junction and electrode preparation, first a phosphorus diffusion is adopted, the phosphorus diffusion region of low concentration and dark junction depth is generated on silicon chip two sides, thereafter fall apart in process in the diffusion of secondary phosphorus and boron aluminum extension, the junction depth of a phosphorus diffusion continues to advance, and the junction depth of final phosphorus diffusion ratio secondary phosphorus diffusion goes out about 20 μm deeply, and wherein concentration is less than 1 × 10 15cm -3forward position junction depth be no less than 15 μm; (as shown in Figure 5 diffused diode space charge region broadening schematic diagram shown in diffusing, buffering layer diode CONCENTRATION DISTRIBUTION schematic diagram and accompanying drawing 6); Adopt nondefective zone silicon crystal, can do a chip by a wafer, electric current can reach hundreds of, several thousand and even ampere up to ten thousand, and electric current and voltage levvl are far above epitaxial diode.But concentration and the degree of depth of diffused N buffering area are difficult to accurate control, and the dispersiveness of element characteristic is large compared with epitaxial diode.
The diffusing buffer layer making step of diffusing buffer layer quick soft-recovery diode shown in accompanying drawing 7 is as follows:
(1) raw material adopt zero defect, dislocation-free zone silicon crystal disk, and doping content is 10 12~ 10 14cm -3, silicon wafer thickness is 300 ~ 400 μm;
(2) be 1000 DEG C, 8 minute short time sedimentary phosphor at above-mentioned silicon single crystal disk two sides low temperature, then 1250 DEG C of high temperature, diffusion for a long time in 65 hours, form (2 ~ 6) × 10 16cm -3low concentration, junction depth be 60 μm of dark n type diffused layers;
(3) be 1190 DEG C, 3 hours for a long time deposition NS > 1 × 10 in the silicon single crystal disk two sides high temperature of step (2) 21cm -3high concentration N +phosphorus thin layer;
(4) by the silicon single crystal disk safe-sided disk of step (3), grinding depth should be greater than the representative value 100 μm of n type diffused layer;
(5) with sol evenning machine the silicon single crystal disk of step (4) flour milling coating boron-aluminium diffuse source, then under 1255 DEG C of high temperature, within 27 hours, spread propelling for a long time; N, N +diffusion layer advances simultaneously, and junction depth is respectively X1, X2, should guarantee that width (X1-X2) reaches 15 ~ 25 μm; Concentration is less than 1 × 10 15cm -3forward position junction depth (X1-X) be no less than 15 μm;
So far, diffused resilient coating completes.Thereafter chip manufacturing program is identical with the manufacture craft of the general diffused fast recovery diode without resilient coating.

Claims (1)

1. there is a manufacture method for the high-voltage high-speed soft-recovery diode of diffusing buffer layer, it is characterized in that, adopt twice method of diffusion to make resilient coating, obtain diffusing buffer layer fast recovery diode; The concrete making step of diffusing buffer layer is as follows:
(1) raw material adopt nondefective zone silicon crystal disk, and doping content is 10 12~ 10 14cm -3, silicon wafer thickness is 300 ~ 400 μm;
(2) at above-mentioned silicon single crystal disk two sides low temperature 950 ~ 1050 DEG C, 5 ~ 10 minute short time sedimentary phosphor, then high temperature 1240 ~ 1260 DEG C, diffusion for a long time in 60 ~ 70 hours, requires that square resistance is not less than 200 Ω and forms low concentration (2 ~ 6) × 10 16cm -3, the dark n type diffused layer of junction depth 55 ~ 60 μm;
(3) in silicon single crystal disk two sides high temperature 1180 ~ 1200 DEG C, 2.5 ~ 3.5 hours long-time deposition high concentration NS > 1 × 10 of step (2) 21cm -3n +phosphorus thin layer;
(4) by the silicon single crystal disk safe-sided disk of step (3), grinding depth should be greater than n type diffused layer, namely 80 ~ 120 μm;
(5) with sol evenning machine the silicon single crystal disk of step (4) flour milling coating boron-aluminium diffuse source, then high temperature 1240 ~ 1260 DEG C, within 20 ~ 30 hours, spread propelling for a long time; N, N +diffusion layer advances simultaneously, and junction depth is respectively X1, X2, should guarantee that width (X1-X2) reaches 15 ~ 25 μm; Concentration is less than 1 × 10 15cm -3forward position junction depth (X1-X) be no less than 15 μm, so far, diffused resilient coating completes; Thereafter chip manufacturing program is identical with the manufacture craft of the general diffused fast recovery diode without resilient coating; Comprise:
(6) platinum expansion: carry out high temperature platinum expansion to the silicon single crystal disk of step (5), controls minority carrier lifetime; Platinum source adopts chloroplatinic acid, diffusion temperature 800 ~ 950 DEG C, time 30-60 minute, and high pure nitrogen is protected;
(7) cyclotomy: adopt carborundum disc cyclotomy cutter that the silicon single crystal disk of step (6) is cut into required size: 400A-φ 30mm; The disk of 1000A-φ 45mm;
(8) anode electrode makes: in high-temperature vacuum sintering furnace, by means of aluminium foil, the silicon single crystal disk after step (7) cyclotomy and molybdenum sheet are sintered together, and forms the anode of chip;
(9) cathode electrode makes: deposited by electron beam evaporation is greater than 10 μm of thick aluminium films in the cathode plane evaporation that the chip of step (8) does not sinter molybdenum sheet, then 500 ~ 520 DEG C of annealing 0.5 ~ 1 hour is placed in vacuum annealing furnace, reach microalloying, form cathode electrode;
(10) carry out angle lap 25 ° of moulding, mesa etch and table tops 408 silicon rubber passivation protection to the chip of step (9), so far, the high-voltage high-speed soft recovery diode chip manufacturing process with diffusing buffer layer completes.
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