CN102802105A - Amplification circuit and digital microphone using the same - Google Patents
Amplification circuit and digital microphone using the same Download PDFInfo
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- CN102802105A CN102802105A CN2011103019222A CN201110301922A CN102802105A CN 102802105 A CN102802105 A CN 102802105A CN 2011103019222 A CN2011103019222 A CN 2011103019222A CN 201110301922 A CN201110301922 A CN 201110301922A CN 102802105 A CN102802105 A CN 102802105A
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- 230000003321 amplification Effects 0.000 title claims description 7
- 238000003199 nucleic acid amplification method Methods 0.000 title claims description 7
- 230000005236 sound signal Effects 0.000 claims abstract description 13
- 238000006243 chemical reaction Methods 0.000 claims description 14
- 235000014676 Phragmites communis Nutrition 0.000 claims description 12
- 230000003068 static effect Effects 0.000 claims description 5
- 230000010354 integration Effects 0.000 claims description 4
- 238000000034 method Methods 0.000 claims description 4
- 230000008676 import Effects 0.000 claims 2
- 238000012545 processing Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 238000013461 design Methods 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 238000012216 screening Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R3/00—Circuits for transducers, loudspeakers or microphones
- H04R3/04—Circuits for transducers, loudspeakers or microphones for correcting frequency response
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- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
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- Amplifiers (AREA)
- Circuit For Audible Band Transducer (AREA)
Abstract
According to an embodiment, a digital microphone includes a vibration sheet, a buffer circuit, an amplifier circuit, and an analog to digital converter. The vibration sheet is in response to the sound pressure to generate an analog sound signal. A source follower buffer circuit is in response to the analog sound signal to generate multiple differential bias voltages. The amplifier circuit is in response to the multiple differential bias voltages to generate a first differential amplifier signal and a second differential amplifier signal. The analog to digital converter generates a digital voice signal in response to the first and the second differential amplifier signal.
Description
Technical field
The present invention relates to amplifying circuit, particularly a kind of amplifying circuit and the digital microphone that utilizes said amplifying circuit.
Background technology
Usually, microphone is to be acoustic pressure (Sound Pressure) and the device of analog signal or digital signal is amplified and converted into to the weak voltage that produces with vibrating reed in response to audio signal.
Microphone mainly uses in like kneetop computer portable computers such as (Laptop) or mobile phone etc.
Because microphone is worked with the mode of amplifying the weak current that is produced by acoustic pressure, so generating noise is the key factor of decision tonequality in the amplification process.
But existing microphone---is analog form or digital form---all owing to element characteristic or circuit structure problem are difficult to noise is reduced to the level that needs.
Summary of the invention
Embodiments of the invention provide a kind of digital microphone that can reduce the amplifying circuit of noise and utilize this amplifying circuit.
The embodiment of the invention is characterised in that, comprises: the first differential differential amplifier (Differential Difference Amplifier), and it is constituted as in response to the first differential input signal group and exports the first differential amplifying signal; The second differential differential amplifier, it is constituted as in response to the second differential input signal group and exports the second differential amplifying signal; First resistance, any one in a plurality of inputs of one of which end and the said first differential differential amplifier is connected, and the other end is connected with the output of the said first differential differential amplifier; Second resistance, any one in a plurality of inputs of one of which end and the said second differential differential amplifier is connected, and the other end is connected with the output of the said second differential differential amplifier; And be connected third and fourth resistance between the other end of the other end and said second resistance of said first resistance.
Another of the embodiment of the invention is characterised in that, comprises: vibrating reed, and it is constituted as the generation simulated audio signal in response to acoustic pressure (Sound Pressure); The buffer circuit of source follower (Source Follower) type, it is set to generate a plurality of differential bias voltage in response to said simulated audio signal; Amplifying circuit, it is constituted as in response to said a plurality of differential bias voltages and generates the first and second differential amplifying signals; And analog-digital conversion portion, it is constituted as in response to the said first and second differential amplifying signals and generates digital audio and video signals.
The resistance value of the resistance of embodiments of the invention through reducing to determine amplifier gain, and use differential differential amplifier to design amplifying circuit, thus can improve noise and distorted characteristic, improve the accuracy and the stability of amplifying signal.
In addition; The resistance value of the resistance of embodiments of the invention through reducing on the one hand to determine amplifier gain; Buffer circuit via the source follower type provides stable DC biasing to amplifying circuit on the other hand; Thereby can improve the noise and the distorted characteristic of digital microphone, finally improve the performance of microphone.
Description of drawings
Fig. 1 is the Butut of expression according to the digital microphone 100 of the embodiment of the invention.
Fig. 2 is the circuit diagram of the Audio Processing chip 400 of presentation graphs 1.
Fig. 3 is the circuit diagram of the antistatic portion 501 of presentation graphs 2.
Fig. 4 is the circuit diagram of first amplifier 601 of presentation graphs 2.
Fig. 5 is the block diagram of the analogue-to-digital converters 700 of presentation graphs 2.
Embodiment
Illustrate in greater detail embodiments of the invention with reference to the accompanying drawings.
Fig. 1 representes the Butut according to the digital microphone 100 of the embodiment of the invention.
As shown in Figure 1, comprise screening can (Shield Case) 200, vibrating reed 300 and Audio Processing chip 400 according to the digital microphone 100 of the embodiment of the invention.
Screening can 200 is to be used to shield the outside EMI (electromagnetic interference) and the structure of RF (radio frequency) noise, can be made up of metal material.
Vibrating reed 300 produces weak voltage, is simulated audio signal in response to acoustic pressure (Sound Pressure).
The input of Audio Processing chip 400 receive clock signals (CLK) and stereo selection signal (L/R).
At this moment, be made up of under the situation of stereo microphone two microphones as shown in Figure 1 100, stereo selection signal (L/R) is any one signal that is used for selecting a left side/right side.
Fig. 2 is the circuit diagram of the Audio Processing chip 400 of presentation graphs 1.
As shown in Figure 2, Audio Processing chip 400 can be integrated into single SOC(system on a chip) (SoC:System on Chip), can make manufacturing cost and minimize power consumption in view of the above.
At this moment, input signal E1 is expressed as the weak voltage that the vibrating reed 300 of equivalent circuit is produced.
Transistor M1, M3 are connected between power end VDD and the earth terminal and form first current path, and transistor M2, M4 are connected between power end VDD and the earth terminal with transistor M1, M3 parallelly connectedly and form second current path.
On the grid of transistor M1, M2, apply the first bias voltage VB1.
The grounded-grid of transistor M4 applies input signal E2 at the grid of transistor M3.
In addition, buffer circuit 500 also comprises the antistatic portion 501 of influence of static composition that Audio Processing chip 400 is not come from the output signal E1 of vibrating reed 300.
The gain (Gain) of said buffer circuit 500 on the characteristic of source follower form approaches " 1 " approximately.The DC level constant of first to the 6th differential bias voltage V1~V6 and irrelevant with the change of input signal E2.
Amplifying circuit 600 is constituted as in response to first to the 6th differential bias voltage V1~V6 and generates the first and second differential amplifying signal VOUT+, VOUT-.
Amplifying circuit 600 is constituted as in response to first to the 6th differential bias voltage V1~V6, the first and second feedback voltage V F1, VF2 and the second bias voltage VB2, generates the first and second differential amplifying signal VOUT+, VOUT-.
Amplifying circuit 600 comprises first amplifier 601, second amplifier 602 and a plurality of resistance R 1~R4.
At this moment, first and second amplifiers 601,602 can be made up of differential differential amplifier (DDA:Differential Difference Amplifier) respectively.
Between the output of first amplifier 601 and input (+), be connected with resistance R 1.
Between the output of second amplifier 602 and input (+), be connected with resistance R 4.Between resistance R 1 and resistance R 4, be connected with resistance R 2, R3.
At this moment, the multiplication factor of first amplifier 601 is confirmed that by resistance R 1, R2 the multiplication factor of second amplifier 602 is confirmed by resistance R 3, R4.
So, therefore the multiplication factor of first amplifier 601 and second amplifier 602 makes the variable of decision magnification ratio minimized, thereby can reduce noise and distortion only by resistance R 1~R4 decision.
Analog-digital conversion portion 700 is in response to the output signal of enlarging section 600, the i.e. first and second differential amplifying signal VOUT+, VOUT-and generate the digital audio and video signals DOUT of single-bit (Single Bit).That is, analog-digital conversion portion 700 is digital bit stream (Digital Bit Stream) with analog signal conversion.
In addition, analog-digital conversion portion 700 is constituted as the output time that changes digital audio and video signals DOUT according to stereo selection signal L/R.
Analog-digital conversion portion 700 is configured in response to stereo selection signal L/R, and at the rising edge (Rising Edge) or trailing edge (Falling Edge) the outputting digital audio signal DOUT of clock signal clk.
At this moment, digital audio and video signals DOUT can export with serial bit rate (Serial Bit Rate).These digital signals can be not influenced even external noise has taken place when imposing on next stage yet.
Bias voltage generation portion 800 is constituted as and generates the first and second bias voltage VB1, VB2.
At this moment, the level of the first and second bias voltage VB1, VB2 can be according to circuit design and difference.
Below the action that constitutes like this of explanation according to the digital microphone 100 of the embodiment of the invention.
Utilize acoustic pressure to produce weak voltage and input to Audio Processing chip 400 by vibrating reed 300.
In the buffer circuit 500 of Audio Processing chip 400, then remove these static from the static of the weak voltage of vibrating reed 300 generations via antistatic portion 501 if taken place.
At this moment, because buffer circuit 500 is forms of source follower, therefore can generate the first to the 6th differential bias voltage V1~V6 with stable level.
Amplifying circuit 600 generates the first and second differential amplifying signal VOUT+, VOUT-in response to first to the 6th differential bias voltage V1~V6 and the first and second feedback voltage V F1, VF2.
At this moment, because amplifying circuit 600 is made up of differential differential amplifier (Differential Difference Amplifier), therefore can generate the first and second differential amplifying signal VOUT+, VOUT-more accurately.In addition, because therefore the multiplication factor of first amplifier 601 and second amplifier 602 can make noise and distortion minimization only by resistance R 1~R4 decision.
Analog-digital conversion portion 700 will be equivalent to the analog signal of the difference of first and second differential amplifying signal VOUT+, VOUT-and change and outputting digital audio signal DOUT according to ∑-Δ conversion method.
Fig. 3 is the circuit diagram of the antistatic portion 501 of presentation graphs 2.
As shown in Figure 3, antistatic portion 501 can be made up of resistance R 11 and a plurality of reverse diode D11, D12.
Diode D11, D12 are flow through through making weak voltage in antistatic portion 501, and coming provides zero offset (Zero bias) to the weak voltage that generates from vibrating reed 300.
So antistatic portion 501 carries out basic anti-static electrification, mate with the impedance of transistor (M3) through electric capacity (Cmic) vibrating reed 300, also carry out the effect of the filter of eliminating high frequency noise.
Fig. 4 is the circuit diagram of first amplifier 601 of presentation graphs 2.
As shown in Figure 4, first amplifier 601 comprises enlarging section 610, secondary enlarging section 620 and frequency compensation portion 630 one time.
Enlarging section 610 is constituted as via the differential input signal of first to fourth input VNN (+), VNP (-), VPP (+), VPN (-) input, promptly the difference of the level of first to the 3rd differential bias voltage V1~V3 and the first feedback voltage V F1 is carried out the amplification first time.
An enlarging section 610 is constituted as carries out the amplification first time to the error of first differential signal and second differential signal.
At this moment, first differential signal is the signal corresponding to the difference of the first differential bias voltage V1 and the second differential bias voltage V2, and second differential signal is the signal corresponding to the difference of the first feedback voltage V F1 and the 3rd differential bias voltage V3.
Secondary enlarging section 620 is constituted as with the commonsource amplifier structure carries out amplifying the second time and generates the first differential amplifying signal VOUT+ the output of an enlarging section 610.
One time enlarging section 610 comprises input part 611, offset 612 and efferent 613.
Offset 612 is constituted as to efferent 613 constant bias current is provided.
Transistor M31, M34 and power end VDD are connected in parallel.
Grid to transistor (M31, M34) applies second bias voltage (VB2).
Transistor M32, M33 and transistor M31 are connected in parallel.
Transistor M35, M36 and transistor M34 are connected in parallel.
The grid of transistor M32, M33, M35, M36 is connected with input VNN (+), VNP (-), VPP (+), VPN (-).
Transistor M35, M36 are connected with earth terminal via load resistance R31, R32.
Offset 612 comprises a plurality of transistor M37~M38 and biasing resistor R33.
Transistor M37, transistor M38 and biasing resistor R33 are connected in turn between power end VDD and the earth terminal.
Grid to transistor M37 applies the second bias voltage VB2.
Grid and the drain electrode of transistor M38 interconnect.
A plurality of transistor M39~M44 of efferent 613 connect with the mode of cascode (cascode).
The transistor M43 of efferent 613, the source electrode of M44 are connected with the transistor M35 of input part 611, the drain electrode of M36.
The transistor M43 of efferent 613, the grid of M44 jointly are connected with the grid of the transistor M8 of offset 612.
Secondary enlarging section 620 comprises a plurality of transistor M45, M46 that are connected between power end VDD and the earth terminal.
Grid to transistor M45 applies the second bias voltage VB2.
The grid of transistor M46 is applied the output signal of efferent 613.
The structure of second amplifier 602 can be with first amplifier 601 identical.
Fig. 5 is the block diagram of the analogue-to-digital converters 700 of Fig. 2, can constitute the form of 4 ∑-Δ transducers.
As shown in Figure 5, analogue-to-digital converters 700 comprise a plurality of integrator 720~723, a plurality of adder 740~743, comparator 760 and bit streaming (one-bit) digital-analog convertor (DAC) 770.
At this moment, 710~713,730,750~753 gain (Gain) has been standardized.
Analogue-to-digital converters 700 of the present invention are designed to only have a feedback control loop.That is, integrator 723, adder 742, integrator 722 and adder 743 are formed a feedback control loop.
The internal structure of analogue-to-digital converters 700 is constituted as in response to clock signal (CLK) and works.
At this moment, A0~A3 representes forward gain, and B0~B3 shows reverse gain, and G representes feedback oscillator.
Input signal INPUT can be poor " (VOUT+)-(VOUT-) " of the first and second differential amplifying signal VOUT+, VOUT-.
In addition, analogue-to-digital converters 700 can also comprise stereo selection portion 780.
That is, can constitute the stereo microphone on a left side/right side by two digital microphones shown in Figure 1 100.
At this moment, stereo selection signal L/R is the signal that is used to distinguish a left side/right side.
For example, be under the situation of high level at stereo selection signal L/R, stereo selection portion 780 control comparators 760, so as at the rising edge place of clock signal clk outputting digital audio signal DOUT.
On the other hand, be under the low level situation at stereo selection signal L/R, stereo selection portion 780 control comparators 760 are so that at the falling edge outputting digital audio signal DOUT of clock signal clk.
Certainly, according to the difference of circuit design, opposite situation also is fine.
So,, can sequentially generate digital audio and video signals DOUT at the rising edge and the falling edge of clock signal clk through two digital microphones 100 being provided level different stereo selection signal L/R.Like this, can constitute stereo microphone.
The analogue-to-digital converters 700 that so constitute carry out times without number with input signal INPUT with digital output signal DOUT is carried out conversion analog signal according to forward gain and the reverse gain process of adduction integration mutually sequentially, carry out analog-digital conversion and move.
At this moment, be under the situation of PCM (pulse code modulation) at the signal demodulation mode of the equipment of the input that receives digital audio and video signals DOUT, analogue-to-digital converters 700 can also comprise decimation filter (Decimation Filter).
So, those skilled in the art of the present invention can understand, and the present invention can be embodied as other concrete forms under the situation that does not change its technological thought or necessary characteristic.Therefore above-described embodiment is an illustration in all respects, and is not determinate.Scope of the present invention is by claim, and---rather than above-mentioned detailed description---confirmed, and all changes that meaning and scope and equivalent concepts thereof derived or the deformation form that should be interpreted as the scope of claim are included within the scope of the present invention.
Claims (18)
1. amplifying circuit comprises:
The first differential differential amplifier is constituted as in response to the first differential input signal group and exports the first differential amplifying signal;
The second differential differential amplifier is constituted as in response to the second differential input signal group and exports the second differential amplifying signal;
First resistance, any one in a plurality of inputs of one of which end and the said first differential differential amplifier is connected, and the other end is connected with the output of the said first differential differential amplifier;
Second resistance, any one in a plurality of inputs of one of which end and the said second differential differential amplifier is connected, and the other end is connected with the output of the said second differential differential amplifier; And
Third and fourth resistance, said third and fourth resistance are connected between the other end of the other end and said second resistance of said first resistance.
2. amplifying circuit according to claim 1, wherein,
First feedback voltage that the said first differential input signal group comprises first to the 3rd differential bias voltage and imports via said first resistance.
3. amplifying circuit according to claim 2, wherein,
Second feedback voltage that the said second differential input signal group comprises the 4th to the 6th differential bias voltage and imports via said second resistance.
4. amplifying circuit according to claim 2, wherein,
Said first differential amplifier comprises:
An enlarging section is constituted as the difference of first differential signal and second differential signal is carried out the amplification first time; With
The secondary enlarging section is constituted as the output of a said enlarging section is carried out amplifying the second time and generated the said first differential amplifying signal,
Said first differential signal is the signal corresponding to the difference of the level of the said first differential bias voltage and the said second differential bias voltage, and said second difference signal is the signal corresponding to the difference of the level of first feedback voltage and said the 3rd differential bias voltage.
5. amplifying circuit according to claim 4, wherein,
Also comprise the frequency compensation portion that the frequency error between a said enlarging section and the said secondary enlarging section is compensated.
6. amplifying circuit according to claim 1, wherein,
The buffer circuit that also comprises the source follower type, said buffer circuit are configured to generate the said first differential input signal group and the said second differential input signal group in response to input signal.
7. amplifying circuit according to claim 6, wherein,
Said buffer circuit comprises:
Be connected between power end and the earth terminal and form first and second transistors of first current path; And
Be connected between said power end and the earth terminal and form third and fourth transistor of second current path parallelly connectedly with said first and second transistors.
8. amplifying circuit according to claim 7, wherein,
Said input signal is applied on the grid of said transistor seconds, and on said the first transistor and the said the 3rd transistorized grid, jointly applies bias voltage.
9. amplifying circuit according to claim 7, wherein,
Also comprise antistatic portion, said antistatic portion is connected with the grid of said transistor seconds, so that remove the static of said input signal.
10. digital microphone comprises:
Vibrating reed is constituted as in response to acoustic pressure and generates simulated audio signal;
The buffer circuit of source follower type is configured to generate a plurality of differential bias voltages in response to said simulated audio signal;
Amplifying circuit is constituted as in response to said a plurality of differential bias voltages and generates the first and second differential amplifying signals; And
Analog-digital conversion portion is constituted as according to the said first and second differential amplifying signals and generates digital audio and video signals.
11. digital microphone according to claim 10, wherein,
Said buffer circuit comprises:
Be connected between power end and the earth terminal and form first and second transistors of first current path; And
Be connected between said power end and the earth terminal and form third and fourth transistor of second current path parallelly connectedly with said first and second transistors.
12. digital microphone according to claim 11, wherein,
Said simulated audio signal is applied on the grid of said transistor seconds, and on said the first transistor and the said the 3rd transistorized grid, jointly applies first bias voltage.
13. digital microphone according to claim 10, wherein,
Said amplifying circuit comprises:
The first differential differential amplifier is constituted as in response to first to the 3rd differential bias voltage and first feedback voltage and exports the said first differential amplifying signal;
The second differential differential amplifier is constituted as in response to the 4th to the 6th differential bias voltage and second feedback voltage and exports the said second differential amplifying signal;
First resistance, any one in a plurality of inputs of one of which end and the said first differential differential amplifier is connected, and the other end is connected with the output of the said first differential differential amplifier;
Second resistance, any one in a plurality of inputs of one of which end and the said second differential differential amplifier is connected, and the other end is connected with the output of the said second differential differential amplifier; And
Third and fourth resistance, the said the 3rd and the 4th resistance are connected between the other end of the other end and said second resistance of said first resistance.
14. digital microphone according to claim 13, wherein,
Said first differential amplifier comprises:
An enlarging section is constituted as the difference of first differential signal and second differential signal is carried out the amplification first time; And
The secondary enlarging section is constituted as the output of a said enlarging section is carried out amplifying the second time and generated the said first differential amplifying signal,
Said first differential signal is the signal corresponding to the difference of the level of the said first differential bias voltage and the said second differential bias voltage, and second difference signal is the signal corresponding to the difference of the level of said first feedback voltage and said the 3rd differential bias voltage.
15. digital microphone according to claim 14, wherein,
Also comprise the frequency compensation portion that the frequency error between a said enlarging section and the said secondary enlarging section is compensated.
16. digital microphone according to claim 14, wherein,
A said enlarging section comprises:
Input part, being constituted as with said first to the 3rd differential bias voltage and said first feedback voltage is input, and generates said first differential signal and said second differential signal;
Efferent is constituted as the use bias current, and the difference of said first differential signal and said second differential signal is amplified and generated the first differential amplifying signal; And
Offset, being configured to provides said bias current consistently to said efferent.
17. digital microphone according to claim 10, wherein,
Said analog-digital conversion portion comprises ∑-Δ transducer.
18. digital microphone according to claim 17, wherein,
Said ∑-Δ transducer be constituted as repeatedly carry out will to input signal applied the forward gain gained signal, with the process that the analog signal that is obtained by said analog signal conversion has been applied the signal plus and the integration of reverse gain gained; Generate said digital audio and video signals; Wherein, Said input signal is equivalent to the poor of the said first differential amplifying signal and the said second differential amplifying signal, and
A feedback control loop that only has the integration phase that a gain with final integration phase feeds back to the front.
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KR1020110050685A KR101094397B1 (en) | 2011-05-27 | 2011-05-27 | Amplification circuit and digital microphone using the same |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103546604A (en) * | 2013-10-21 | 2014-01-29 | 上海理工大学 | Communication system based on anti-gas mask |
CN105530570A (en) * | 2014-10-20 | 2016-04-27 | 现代自动车株式会社 | Analogue signal processing circuit for microphone |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US9338546B2 (en) * | 2013-12-16 | 2016-05-10 | Infineon Technologies Ag | Circuit assembly for processing an input signal, microphone assembly and method for following an input signal |
KR101718079B1 (en) | 2016-08-26 | 2017-03-20 | 주식회사 에이디텍 | Microphone system |
US11711073B1 (en) | 2022-03-04 | 2023-07-25 | Analog Devices, Inc. | Buffer cascade |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
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EP2082609A2 (en) * | 2006-10-11 | 2009-07-29 | Analog Devices, Inc. | Microphone microchip device with differential mode noise suppression |
US7791520B2 (en) | 2007-04-23 | 2010-09-07 | Qualcomm Incorporated | Low power, low noise digital-to-analog converter reference circuit |
JP4998211B2 (en) | 2007-10-31 | 2012-08-15 | アイコム株式会社 | Low noise amplifier and differential amplifier |
-
2011
- 2011-05-27 KR KR1020110050685A patent/KR101094397B1/en active IP Right Grant
- 2011-10-09 CN CN2011103019222A patent/CN102802105A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103546604A (en) * | 2013-10-21 | 2014-01-29 | 上海理工大学 | Communication system based on anti-gas mask |
CN105530570A (en) * | 2014-10-20 | 2016-04-27 | 现代自动车株式会社 | Analogue signal processing circuit for microphone |
CN105530570B (en) * | 2014-10-20 | 2020-08-14 | 现代自动车株式会社 | Analog signal processing circuit of microphone |
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Application publication date: 20121128 |