CN218679014U - Third harmonic frequency generation circuit with higher harmonic suppression - Google Patents
Third harmonic frequency generation circuit with higher harmonic suppression Download PDFInfo
- Publication number
- CN218679014U CN218679014U CN202222768179.8U CN202222768179U CN218679014U CN 218679014 U CN218679014 U CN 218679014U CN 202222768179 U CN202222768179 U CN 202222768179U CN 218679014 U CN218679014 U CN 218679014U
- Authority
- CN
- China
- Prior art keywords
- harmonic
- generation circuit
- signal
- balun
- coupler
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Amplifiers (AREA)
Abstract
The utility model discloses a take third harmonic frequency generation circuit of higher harmonic suppression contains: a signal generating circuit for generating a quadrature differential signal; a third harmonic generation circuit for connecting to the signal generation circuit and converting the quadrature differential signal generated by the signal generation circuit into a third harmonic output signal; the signal generating circuit comprises a coupler and a cascade balun; the coupler converts the input radio frequency signal into a pair of orthogonal signals and outputs the orthogonal signals to the cascade balun; the cascade balun converts the orthogonal signal into an orthogonal differential signal and outputs the orthogonal differential signal to the third harmonic generation circuit. The utility model discloses a take third harmonic frequency of high order harmonic suppression to produce the circuit adopts the framework of coupler and balun, can reduce the technology sensitivity, and the inductive impedance of balun output and third harmonic frequency produce the input capacitive impedance of circuit simultaneously and can carry out impedance matching to this produces higher voltage swing, and need not increase radio frequency drive circuit.
Description
Technical Field
The utility model relates to a take third harmonic frequency generation circuit of higher harmonic suppression.
Background
In the conventional third harmonic generation circuit based on the conventional PPF (Poly phase flip) quadrature signal generator architecture, a radio frequency amplifier is required to be added to improve the signal driving capability so as to ensure that a harmonic frequency circuit can normally work, so that the circuit generates more power consumption and is not suitable for a low-power consumption circuit. Meanwhile, the added radio frequency amplifier has very high sensitivity to process, voltage and temperature, and the mismatch of the radio frequency circuit can cause the amplitude of the fourth harmonic and the fifth harmonic to be increased, so that more calibration ways are needed in the circuit design to reduce the mismatch error. Meanwhile, the conventional PPF quadrature signal generator is implemented by a PPF cascade method in order to widen the signal bandwidth, which increases the insertion loss of the PPF.
SUMMERY OF THE UTILITY MODEL
The utility model provides a take third harmonic frequency of higher harmonic suppression to produce circuit and solve the above-mentioned technical problem, specifically adopt following technical scheme:
a third harmonic frequency generation circuit with higher harmonic suppression, comprising:
a signal generating circuit for generating a quadrature differential signal;
a third harmonic generation circuit for connecting to the signal generation circuit and converting the quadrature differential signal generated by the signal generation circuit into a third harmonic output signal;
the signal generating circuit comprises a coupler and a cascade balun;
the coupler converts the input radio frequency signal into a pair of orthogonal signals and outputs the orthogonal signals to the cascade balun;
the cascade balun converts the orthogonal signal into an orthogonal differential signal and outputs the orthogonal differential signal to the third harmonic generation circuit.
Further, the cascaded balun includes a first passive balun and a second passive balun;
the coupler converts the input radio frequency signal into a pair of orthogonal signals and respectively outputs the orthogonal signals to the first passive balun and the second passive balun;
the first passive balun and the second passive balun output quadrature differential signals In, ip and Qn, qp to the third harmonic generation circuit, respectively.
Further, the coupler is a lange coupler;
the first end of the Lange coupler is connected with an input radio frequency signal;
the second terminal and the third terminal of the Lange coupler output a pair of quadrature signals.
Further, the fourth terminal of the lange coupler is grounded through a first resistor.
Further, the first resistance is 50 Ω.
Further, the coupler is a 3dB coupler.
Furthermore, the third harmonic generation circuit comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and four bias resistors;
the first passive balun inputs orthogonal differential signals In and Ip to the grid electrodes of the first MOS tube and the second MOS tube respectively;
the second passive balun inputs the orthogonal differential signals Qn and Qp to the grid electrodes of the third MOS tube and the fourth MOS tube respectively;
the source electrodes of the first MOS tube and the second MOS tube are grounded;
the drain electrode of the first MOS tube, the drain electrode of the second MOS tube, the source electrode of the third MOS tube and the source electrode of the fourth MOS tube are mutually connected;
the bias voltages Vb _ Ip, vb _ In, vb _ Qn and Vb _ Qp are respectively connected to the gates of the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor through a bias resistor.
Further, the bias voltages Vb _ Ip, vb _ In, vb _ Qn and Vb _ Qp are generated by the high-precision DAC.
Furthermore, the signal generating circuit also comprises four capacitors;
the first passive balun inputs orthogonal differential signals In and Ip to the grid electrodes of the first MOS tube and the second MOS tube through a capacitor respectively;
and the second passive balun inputs orthogonal differential signals Qn and Qp to the grid electrodes of the third MOS tube and the fourth MOS tube respectively through a capacitor.
Further, the capacitance is 0.2pF.
The utility model discloses an useful part lies in the third harmonic frequency who puts forward area high order harmonic suppression and produces the circuit, adopts the framework of coupler and balun, can reduce the technology sensitivity, and the inductive impedance of balun output and the input capacitive impedance of third harmonic frequency production circuit can carry out impedance matching simultaneously to this produces higher voltage swing, and need not increase radio frequency drive circuit.
The utility model discloses an useful part still lies in the third harmonic frequency who puts forward the area high order harmonic suppression and produces the circuit, and the quadrature signal that blue ge coupler produced possesses the high bandwidth, low insertion loss and port matching characteristic.
Drawings
Fig. 1 is a schematic diagram of a third harmonic frequency generation circuit with higher harmonic suppression according to the present invention;
fig. 2 is a comparative diagram of the output power of the third harmonic generation circuit before and after calibration.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1, a third harmonic frequency generation circuit with harmonic suppression according to the present invention includes: a signal generating circuit and a third harmonic generating circuit. The signal generating circuit is connected to the third harmonic generating circuit.
The signal generating circuit is used for generating quadrature differential signals. The third harmonic generation circuit converts the quadrature differential signal generated by the signal generation circuit into a third harmonic output signal. The signal generating circuit comprises a coupler and a cascade balun. The coupler inputs a radio frequency signal Vin (f) 0 ) And converting the signals into a pair of orthogonal signals and outputting the orthogonal signals to the cascade balun. The cascade balun converts the orthogonal signal into an orthogonal differential signal and outputs the orthogonal differential signal to the third harmonic generation circuit.
Specifically, the cascaded balun includes a first passive balun i and a second passive balun q. The coupler inputs a radio frequency signal Vin (f) 0 ) Conversion to a pair of quadrature signalsRespectively output to the first passive balun BalunI and the second passive balun BalunQ.
The first passive balun I and the second passive balun BalunQ output quadrature differential signals In, ip and Qn, qp to a third harmonic generation circuit, respectively.
In the present application, the Coupler is a Lange Coupler (Lange Coupler). The first end of the Lange coupler is connected with an input radio frequency signal Vin (f) 0 ). The second terminal and the third terminal of the Lange coupler output a pair of quadrature signals. And the fourth end of the Lange coupler is grounded through a first resistor. Specifically, the first resistance is 50 Ω. The coupler is a 3dB lange coupler.
In a preferred embodiment, the third harmonic generation circuit includes a first MOS transistor MN1, a second MOS transistor MN2, a third MOS transistor MN3, a fourth MOS transistor MN4, and four bias resistors Rb.
The first passive balun I inputs orthogonal differential signals In and Ip to the gates of the first MOS transistor MN1 and the second MOS transistor MN2 respectively. The second passive balun Q inputs quadrature differential signals Qn and Qp to the gates of the third MOS transistor MN3 and the fourth MOS transistor MN4 respectively. The source electrodes of the first MOS tube MN1 and the second MOS tube MN2 are grounded. The drain electrode of the first MOS tube MN1, the drain electrode of the second MOS tube MN2, the source electrode of the third MOS tube MN3 and the source electrode of the fourth MOS tube MN4 are mutually connected. The bias voltages Vb _ Ip, vb _ In, vb _ Qn and Vb _ Qp are respectively connected to the gates of the first MOS transistor MN1, the second MOS transistor MN2, the third MOS transistor MN3 and the fourth MOS transistor MN4 through a bias resistor Rb. The drain output voltage Vout (3 f) of the third MOS transistor MN3 and the fourth MOS transistor MN4 0 ) The signal is output for the third harmonic.
In the application, the bias voltages Vb _ Ip, vb _ In, vb _ Qn and Vb _ Qp are generated by the high-precision DAC, the calibration precision is high, errors caused by mismatch of quadrature differential signals are adjusted, and therefore the harmonic suppression capability of the third harmonic frequency generation circuit is improved. As shown in fig. 2, the dotted line represents the output power of the pre-calibration harmonic circuit, and the solid line represents the output power of the post-calibration harmonic circuit. The third harmonic of the harmonic circuit after calibration is flatter and the second, fourth and fifth harmonics are reduced relative to before calibration.
In the present application, the bias resistor Rb is 5K Ω.
As a preferred embodiment, the signal generating circuit further comprises four capacitors C. The first passive balun I inputs orthogonal differential signals In and Ip to the gates of the first MOS transistor MN1 and the second MOS transistor MN2 through a capacitor C respectively. The second passive balun Q inputs orthogonal differential signals Qn and Qp to the gates of the third MOS transistor MN3 and the fourth MOS transistor MN4 through a capacitor C respectively. Preferably, the capacitance is 0.2pF.
The Lange coupler is used as the orthogonal signal generator in the application, and the Lange coupler has the advantages of high bandwidth and low insertion loss. The input and output are matched to 50 ohms. Meanwhile, only a single-ended radio frequency input signal is needed, and the Lange coupler and the balun adopt a process top metal design, so that the method has very low process sensitivity and can improve the accuracy of orthogonal signals. Meanwhile, the inductive impedance of the balun output and the input capacitive impedance of the third harmonic frequency generation circuit can be subjected to impedance matching so as to generate a higher voltage swing without adding a radio frequency driving circuit.
The foregoing illustrates and describes the principles, general features, and advantages of the present invention. It should be understood by those skilled in the art that the above embodiments do not limit the present invention in any way, and all technical solutions obtained by adopting equivalent replacement or equivalent transformation fall within the protection scope of the present invention.
Claims (10)
1. A third harmonic frequency generation circuit with harmonic suppression, comprising:
a signal generating circuit for generating a quadrature differential signal;
a third harmonic generation circuit for connecting to the signal generation circuit and converting the quadrature differential signal generated by the signal generation circuit into a third harmonic output signal;
wherein the signal generating circuit comprises a coupler and a cascaded balun;
the coupler converts an input radio frequency signal into a pair of orthogonal signals and outputs the orthogonal signals to the cascade balun;
the cascade balun converts the orthogonal signal into the orthogonal differential signal and outputs the orthogonal differential signal to the third harmonic generation circuit.
2. A third harmonic frequency generation circuit with higher harmonic suppression as in claim 1,
the cascaded balun includes a first passive balun and a second passive balun;
the coupler converts an input radio frequency signal into a pair of orthogonal signals and outputs the orthogonal signals to the first passive balun and the second passive balun respectively;
the first passive balun and the second passive balun output the quadrature differential signals In, ip and Qn, qp to the third harmonic generation circuit, respectively.
3. A third harmonic frequency generation circuit with higher harmonic suppression as in claim 2,
the coupler is a Lange coupler;
the first end of the Lange coupler is connected with an input radio frequency signal;
and the second end and the third end of the Lange coupler output a pair of the quadrature signals.
4. A third harmonic frequency generation circuit with high harmonic rejection as in claim 3,
and the fourth end of the Lange coupler is grounded through a first resistor.
5. A third harmonic frequency generation circuit with high harmonic rejection as in claim 4,
the first resistance is 50 Ω.
6. A third harmonic frequency generation circuit with high harmonic rejection as in claim 3,
the coupler is a 3dB coupler.
7. A third harmonic frequency generation circuit with high harmonic rejection as in claim 3,
the third harmonic generation circuit comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and four bias resistors;
the first passive balun inputs the quadrature differential signals In and Ip to the gates of the first MOS transistor and the second MOS transistor respectively;
the second passive balun inputs the quadrature differential signals Qn and Qp to the gates of the third MOS transistor and the fourth MOS transistor respectively;
the source electrodes of the first MOS tube and the second MOS tube are grounded;
the drain electrode of the first MOS tube, the drain electrode of the second MOS tube, the source electrode of the third MOS tube and the source electrode of the fourth MOS tube are mutually connected;
bias voltages Vb _ Ip, vb _ In, vb _ Qn and Vb _ Qp are respectively connected to the gates of the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor through one bias resistor.
8. A third harmonic frequency generation circuit with high harmonic rejection as in claim 7,
the bias voltages Vb _ Ip, vb _ In, vb _ Qn and Vb _ Qp are generated by the high precision DAC.
9. A third harmonic frequency generation circuit with high harmonic rejection as in claim 7,
the signal generating circuit also comprises four capacitors;
the first passive balun inputs the quadrature differential signals In and Ip to the gates of the first MOS transistor and the second MOS transistor through one capacitor respectively;
and the second passive balun inputs the quadrature differential signals Qn and Qp to the gates of the third MOS transistor and the fourth MOS transistor respectively through one capacitor.
10. The third harmonic frequency generation circuit with high order harmonic suppression of claim 9,
the capacitance is 0.2pF.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222768179.8U CN218679014U (en) | 2022-10-20 | 2022-10-20 | Third harmonic frequency generation circuit with higher harmonic suppression |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222768179.8U CN218679014U (en) | 2022-10-20 | 2022-10-20 | Third harmonic frequency generation circuit with higher harmonic suppression |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218679014U true CN218679014U (en) | 2023-03-21 |
Family
ID=85564098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222768179.8U Active CN218679014U (en) | 2022-10-20 | 2022-10-20 | Third harmonic frequency generation circuit with higher harmonic suppression |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218679014U (en) |
-
2022
- 2022-10-20 CN CN202222768179.8U patent/CN218679014U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9634685B2 (en) | Telescopic amplifier with improved common mode settling | |
| CN101753159B (en) | RF (radio frequency) receiving front end with diversified gaining modes and capable of automatic tuning | |
| CN103414442A (en) | High-precision fully differential amplifier based on chopper technology | |
| CN101800550A (en) | Input buffer circuit for high-speed pipeline analog-to-digital converter | |
| CN111756366B (en) | CMOS input signal buffer applied to front end of high-speed ADC | |
| JP5128680B2 (en) | Mixer circuit | |
| CN102545806A (en) | Differential amplifier | |
| CN111130469B (en) | Broadband CMOS second-order active balun amplifier | |
| CN102545850A (en) | PWM (pulse-width modulation) comparator and class-D amplifier | |
| CN111277232A (en) | Ultra-wideband amplifier unit circuit based on improved TIA | |
| CN112398452B (en) | Operational amplifier circuit applied to pipeline analog-to-digital converter | |
| CN108900172B (en) | Broadband single-ended input high-precision quadrature differential output signal generation circuit | |
| CN218679014U (en) | Third harmonic frequency generation circuit with higher harmonic suppression | |
| CN101789789B (en) | Generating circuit from reference voltage | |
| CN116743165A (en) | High-linearity input buffer circuit and high-speed analog-to-digital converter | |
| CN115567020A (en) | Third harmonic frequency generation circuit with higher harmonic suppression | |
| CN111293983B (en) | High-linearity active mixer with common mode feedback | |
| CN110224700A (en) | A kind of high speed complementation type dual power supply operational amplifier | |
| CN104320105A (en) | A mixed model capacitance multiplier circuit | |
| CN106788279B (en) | Low-sensitivity substrate input amplifier | |
| CN106656078B (en) | Operational amplifier with inductance and dual power supply and analog-digital converter | |
| CN110855244B (en) | Millimeter wave broadband frequency multiplier with high conversion gain | |
| CN104635827B (en) | DC maladjustment is eliminated circuit | |
| CN110912540B (en) | High-speed pre-amplification latch comparator with low dynamic mismatch | |
| CN218734263U (en) | Circuit for converting single-end signal into differential signal |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |