CN102779750A - Manufacturing method of trench insulated gate bipolar transistor (TIGBT) - Google Patents
Manufacturing method of trench insulated gate bipolar transistor (TIGBT) Download PDFInfo
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- CN102779750A CN102779750A CN2012101211123A CN201210121112A CN102779750A CN 102779750 A CN102779750 A CN 102779750A CN 2012101211123 A CN2012101211123 A CN 2012101211123A CN 201210121112 A CN201210121112 A CN 201210121112A CN 102779750 A CN102779750 A CN 102779750A
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Abstract
The invention provides a manufacturing method of a trench insulated gate bipolar transistor. A beak type oxide layer of which the middle is thick and the two ends are thin is formed on a semiconductor substrate located at the place where a trench is to be formed, and the two ends of the beak type oxide layer extend to places below etching blocking layers at the two sides of the trench; and after the trench is etched, the upper edge of the trench can be arc-shaped so that the trench can have a smooth top edge. With the smooth top edge, the trench is easy for the filling and the crawling of porous silicon layers inside the trench in later process and can prevent aggregation of the excessive charges, which is caused by a sharp apex angle of the trench and can lead to breakdown failure. Meanwhile, before the porous silicon layers are filled into the trench, ions are injected to the surface of the semiconductor substrate in a rotation angle so that ions can be injected to the trench in a large angle, thus being beneficial for compensating the dosage concentration at the corners of a two-dimensional figure, and therefore the performance of a semiconductor device can be improved.
Description
Technical field
The present invention relates to integrated circuit and make the field, relate in particular to a kind of manufacturing approach of insulated trench gate electrode bipolar type transistor.
Background technology
Igbt (IGBT) has been widely used in civilian household electrical appliances, Industry Control, and locomotive traction, the field of military electronics or the like is in having become, the device of the main flow in high-power electric and electronic field.Wherein groove (Trench) type IGBT is one of popular device; The Trench technology has improved the cellular density of device, has reduced channel resistance, and has eliminated the JFET resistance in the MOS technology of plane; Can be inner PNP transistor bigger base current is provided, thereby reduced switching loss.
Slot type power device is compared with planar device, and maximum improvement is exactly to have trench-gate.And along with structure becomes thinner; A lot of new problems have also appearred at process aspect; In the IGBT of high short circuit tolerance design; The grid polycrystalline silicon of filling in the groove can cover silicon face outside the groove usually from groove, at this moment the top of trenched side-wall needs one slick and sly slope, and top side wall formation right angle or acute angle just all might make the grid oxygen at this place lose efficacy else if.And, because the concentration of oxidation technology surface doping also can occur and the inconsistent problem in flat limit, and it can cause the non-homogeneous unlatching of cellular, produce and lost efficacy at the turning of Trench planar graph along with size decreases.
Summary of the invention
The manufacturing approach that the purpose of this invention is to provide a kind of insulated trench gate electrode bipolar type transistor.
For addressing the above problem, the present invention provides a kind of manufacturing approach of insulated trench gate electrode bipolar type transistor, comprises Semiconductor substrate is provided, and on said Semiconductor substrate, comprises cellular zone and terminal area; Growth thermal field oxygen film on said Semiconductor substrate, etched portions thermal field oxygen film is to form slope thermal field oxygen layer on said terminal area; On said Semiconductor substrate and slope thermal field oxygen layer, form etching barrier layer and barrier oxide layer, etched portions etching barrier layer and barrier oxide layer are with expose portion (desire forms the groove position) Semiconductor substrate; Carry out thermal oxidation technology, on said exposed portions Semiconductor substrate, to form beak type oxide layer; With said etching barrier layer and barrier oxide layer is mask, carries out etching technics, in Semiconductor substrate, to form groove; Remove said beak type oxide layer and remaining barrier oxide layer and etching barrier layer, groove has slick and sly top margin edge; Be rotated the angle ion and inject, the normal that belongs to face with said Semiconductor substrate is a rotating shaft, divides equally a plurality of injection directions around said rotating shaft 360 degree, and each injection direction all keeps identical inclination angle with said Semiconductor substrate place face.
Further, the forming process of said slope thermal field oxygen layer comprises: said thermal oxide film is carried out the damaging injection of silicon ion, with loose said thermal oxide film surface; The thermal oxide film surface that forms thermal field oxygen layer position, slope in desire forms photoresist, and the said thermal oxide film of wet etching is to form slope thermal field oxygen layer below said photoresist; Remove said photoresist.
Preferable, the thickness of said thermal field oxygen film is 8000～18000 dusts.
Preferable, thermal field oxygen layer longitudinal cross-section, said slope is trapezoidal, and the inclined-plane of said slope thermal field oxygen layer and Semiconductor substrate place face angle are 15～45 degree.
Further, said beak type oxide layer extends in the Semiconductor substrate of said etching barrier layer below.
Preferable, adopt the thermal oxide growth method to form said beak type oxide layer, the thickness in the thickness, middle part of said beak type oxide layer is 2000～8000 dusts.
Further, be rotated the step that the angle ion injects, the impurity that ion injects is a boron, and the implantation dosage scope is 1e12～5e13, and injection direction and the said Semiconductor substrate place angle that the plane was are 30～70 degree.
Further, be rotated the step that the angle ion injects, dividing equally four injection directions, whenever turning 90 degrees and carry out the primary ions injection, injecting metering and be 1/4th of accumulated dose around said rotating shaft 360 degree.
Further, after the step that is rotated the injection of angle ion, also comprise, form withstand voltage field plate structure, form device architecture in said cellular zone in said terminal area.
Further, form field plate structure in said terminal area, form device architecture in said cellular zone and comprise: deposition forms polysilicon layer in said groove and on the thermal field oxygen layer of said slope; The injection of mixing is to form the well region and the doped region that is arranged in second type of said well region of the first kind in the Semiconductor substrate in said cellular zone; On said Semiconductor substrate, cover interlayer dielectric layer and deposit field plate oxide layer film successively; Carry out photoetching process, the said field plate oxide layer of wet etching film is to form the field plate oxide layer; Do photoetching process, the said inter-level dielectric oxide layer of etching is up to exposing Semiconductor substrate, to form through hole; In said through hole, carry out ion implantation technology, to form the draw-out area of first kind well region; Depositing metal to be forming metal level, and makes metal level photoetching and etching, forms source electrode and grid in said cellular zone, and forms the metal field plate in the terminal area; At the back side of said Semiconductor substrate, carry out back side injection and annealing, and the deposit metal layer on back.
Further, the said first kind is the P type, and said second type is the N type; Or the said first kind is the N type, and said second type is the P type.
In sum; In the manufacturing approach of said insulated trench gate electrode bipolar type transistor proposed by the invention, through forming beak type oxide layer on the Semiconductor substrate that forms the groove position in desire, said beak type oxide layer thick middle two ends are thin; And the two ends of beak type oxide layer extend to etching barrier layer below, said groove both sides; After the said groove of etching, the upper edge of said groove can form the circular arc pattern, thereby makes groove have slick and sly top margin edge.Groove with slick and sly top margin edge not only is easy to realize the filling of porous silicon layer in the follow-up groove and climb out of, and can avoid sharp-pointed drift angle to cause that excessive charge assembles, and causes to puncture and loses efficacy; And in groove, before the filling porous silicon layer, said semiconductor substrate surface is rotated the angle ion injects, mix so that trench wall is formed to inject.Said repeatedly equal portions are injected with and are beneficial to corner's doping content in the compensation planar graph, thereby improve the unlatching uniformity of insulated trench gate electrode bipolar type transistor, and then improve performance of semiconductor device.
Description of drawings
Fig. 1 is the critical workflow sketch map of the manufacturing approach of insulated trench gate electrode bipolar type transistor in one embodiment of the invention.
Fig. 2～Figure 11 is the structural representation in the manufacture process of insulated trench gate electrode bipolar type transistor in one embodiment of the invention.
Embodiment
For making content of the present invention clear more understandable,, content of the present invention is described further below in conjunction with Figure of description.Certainly the present invention is not limited to this specific embodiment, and the general replacement that those skilled in the art knew also is encompassed in protection scope of the present invention.
Secondly, the present invention utilizes sketch map to carry out detailed statement, and when instance of the present invention was detailed, for the ease of explanation, sketch map did not amplify according to general ratio is local, should be with this as to qualification of the present invention.
Fig. 1 is the critical workflow sketch map of the manufacturing approach of insulated trench gate electrode bipolar type transistor in one embodiment of the invention.As shown in Figure 1, the present invention provides a kind of manufacturing approach of insulated trench gate electrode bipolar type transistor, comprises
Step S01: Semiconductor substrate is provided, on said Semiconductor substrate, comprises cellular zone and terminal area;
Step S02: growth thermal field oxygen film on said Semiconductor substrate, the said thermal field oxygen of etched portions film is to form slope thermal field oxygen layer on said terminal area;
Step S03: deposit forms etching barrier layer and barrier oxide layer on said Semiconductor substrate and slope thermal field oxygen layer, does trench lithography and etched portions etching barrier layer and barrier oxide layer, with the expose portion Semiconductor substrate;
Step S04: carry out thermal oxidation technology, to form beak type oxide layer on the expose portion Semiconductor substrate;
Step S05: with said etching barrier layer and barrier oxide layer is mask, carries out etching technics, in Semiconductor substrate, to form groove;
Step S06: remove said beak type oxide layer and remaining barrier oxide layer and etching barrier layer, groove has slick and sly top margin edge;
Step S07: be rotated the angle ion and inject, the normal that belongs to face with said Semiconductor substrate is a rotating shaft, divides equally a plurality of injection directions around said rotating shaft 360 degree, and each injection direction all keeps identical inclination angle with said Semiconductor substrate place face.
Fig. 2～Figure 11 is the structural representation in the manufacture process of insulated trench gate electrode bipolar type transistor in one embodiment of the invention.In conjunction with Fig. 1～Figure 11, below specify the manufacturing approach of insulated trench gate electrode bipolar type transistor according to the invention, may further comprise the steps:
As shown in Figure 2, in step S01, Semiconductor substrate 100 is provided, to describe for convenient, said Semiconductor substrate 100 comprises cellular zone 10 and terminal area 20; The material of said Semiconductor substrate 100 can be monocrystalline silicon or carborundum etc.; Said Semiconductor substrate 100 comprises cellular zone 10 and terminal area 20; After accomplishing said step S08; In subsequent technique, form the structure of insulated gate bipolar transistor device on said cellular zone 10 and the said terminal area 20; To form device active region in the said cellular zone 10, for example comprise emitter region, tagma, drift region and collector area etc., will be formed for terminal structures such as high voltage bearing field plate oxide layer in the said terminal area 20.
In conjunction with Fig. 2 and Fig. 3, in step S02, on said Semiconductor substrate 100, form thermal field oxygen film 102a, photoetching and wet etching part thermal field oxygen film 102a are to form slope thermal field oxygen layer 102 on said terminal area 20.Wherein, at first form said thermal field oxygen film 102a, can adopt the thermal oxide growth method to form, the preferable thickness of said thermal field oxygen film 102a is 8000～18000 dusts; Then, form said slope thermal field oxygen layer 102, its forming process comprises: said thermal oxide film 102a is carried out the damaging injection of silicon ion, with loose said thermal oxide film 102a surface; The thermal oxide film 102a surface that forms thermal field oxygen layer 102 position, slope in desire forms photoresist (not indicating among the figure); Block as mask; The said thermal oxide film 102a of wet etching, because thermal oxide film 102a surface porosity, and there is isotropic etching in wet etching; Can the etching photoresist below part thermal oxide film, thereby below photoresist, form slope thermal field oxygen layer 102 with a drift angle degree slope; After this remove said photoresist.Said slope thermal field oxygen layer 102 can combine the polysilicon layer in the subsequent technique to form slope polysilicon field plate, and then improves terminal knot voltage endurance capability.Thermal field oxygen layer 102 longitudinal cross-section, wherein said slope are trapezoidal, and the inclined-plane of said slope thermal field oxygen layer and the preferable angle of Semiconductor substrate place face are 15～45 degree.
As shown in Figure 3; In step S03; On said Semiconductor substrate 100 and slope thermal field oxygen layer 102, form etching barrier layer 104 and barrier oxide layer 106; Do trench lithography and etched portions etching barrier layer 104 and barrier oxide layer 106, with expose portion Semiconductor substrate 100, this part semiconductor substrate 100 is the zone of follow-up formation groove; The material of said etching barrier layer 104 can be silicon nitride, and the material of said barrier oxide layer 106 can be silica.Said etching barrier layer 104 and said barrier oxide layer 106 play the effect of etching barrier layer in the process of subsequent etching formation groove.
As shown in Figure 4, in step S04, carry out thermal oxidation technology, on said exposed portions Semiconductor substrate 100, to form beak type oxide layer 108, can adopt the thermal oxide growth method to form; Said beak type oxide layer 108; Said beak type oxide layer 108 thick middle two ends are thin; The thickness in the thickness, middle part of said beak type oxide layer is 2000～8000 dusts, and said beak type oxide layer 108 two ends extend in the Semiconductor substrate 100 of said etching barrier layer 104 belows.
Then, in conjunction with Fig. 4 and shown in Figure 5, in step S05, be mask with barrier oxide layer 104 with said etching barrier layer 106, carry out etching technics, in Semiconductor substrate, to form groove 110; Because the existence of beak type oxide layer 108 makes in the etching process, can form circular arc in the upper edge of groove 110, thereby make groove 100 have slick and sly top margin along 300.
Continue to combine Fig. 4 and Fig. 5, in step S06, remove said beak type oxide layer 108 residual beak and remaining barrier oxide layer 106 and etching barrier layer 104, groove 110 has slick and sly top margin along 300; Groove 110 with slick and sly top margin edge 300 is easy to realize the filling of porous silicon layer in the follow-up groove 110 and climb out of, and avoids sharp-pointed top edge angle to cause the excessive charge gathering, causes that semiconductor device punctures inefficacy.
As shown in Figure 6; In step S07; Be rotated the angle ion and inject 202; Normal (vertical line) with said Semiconductor substrate 100 place faces is a rotating shaft, divides equally a plurality of injection directions around said rotating shaft 360 degree, and each injection direction all keeps identical inclination angle with said Semiconductor substrate place face; In one embodiment, said 202 impurities are boron, and total dose range is 1e12～5e13, and doping injection direction and said substrate place Plane Angle are 30～70 degree.In a preferred embodiment, divide equally four injection directions around said rotating shaft 360 degree, whenever turn 90 degrees and carry out the primary ions injection, inject metering and be 1/4th of accumulated dose.Groove 110 internal rotation angle degree ions are injected before porous silicon layer fills said raceway groove carrying out, help increasing in the planar graph groove at the top corner place doping content, improve the unlatching uniformity of insulated trench gate electrode bipolar type transistor.
After step S07, also be included in said terminal area 20 and form field plate structures, form device architectures in said cellular zone 10, like Fig. 7～shown in Figure 11, may further comprise the steps:
Deposit forms polysilicon layer 112 in said groove 110 as shown in Figure 6 and on the thermal field oxygen layer 102 of said slope; Be arranged in the grid of the polysilicon that is filled in groove 110 112 in cellular zone 10 as insulated trench gate electrode bipolar type transistor.
Then; As shown in Figure 8; After forming polysilicon layer 112; The injection of mixing, in the Semiconductor substrate 100 in said cellular zone 10, to form the well region 114 of the first kind and the doped region 115 and the dense doped region 117 of the first kind of second type that is arranged in said well region, the dense doped region 117 of the said first kind is drawn as the ohmic contact of the trap 114 of the first kind.
On said Semiconductor substrate 100, cover interlayer dielectric layer 116 and field plate oxide film 118a successively; Do the photoetching of field plate oxide film, wet etching field plate oxide film 118a is to form slope field plate oxide layer 118 as shown in Figure 9, and then, the said inter-level dielectric oxide layer 116 of etching up to exposing Semiconductor substrate, is done the well region of contact hole 111 up to the first kind; Then, the dense doping of in contact hole, injecting the first kind is to form the draw-out area 117 of first kind well region, and the thickness of said slope field plate oxide layer 118 is 30000～60000 dusts.
Shown in figure 10, deposit forms metal level 120 on oxidation field, said slope flaggy 118 and in the said through hole 111 at last, does the metal level photoetching, and the surface of metal level 120 forms passivation layer 122 on said terminal area 20; At last; Shown in figure 11, at the back side of the formation device architecture of said Semiconductor substrate 100, carry out the back side and inject; Form injection region, the back side 122; And deposit formation metal layer on back 124, the insulated trench gate electrode bipolar type transistor structure is carried out the back side be injected to the technology contents that those of ordinary skills know, so repeat no more.
In sum; In the manufacturing approach of said insulated trench gate electrode bipolar type transistor proposed by the invention, through forming beak type oxide layer on the Semiconductor substrate that forms the groove position in desire, said beak type oxide layer thick middle two ends are thin; And the two ends of beak type oxide layer extend to etching barrier layer below, said groove both sides; After the said groove of etching, the upper edge of said groove can form the circular arc pattern, thereby makes groove have slick and sly top margin edge.Groove with slick and sly top margin edge not only is easy to realize the filling of porous silicon layer in the follow-up groove and climb out of, and can avoid sharp-pointed drift angle to cause that excessive charge assembles, and causes to puncture and loses efficacy; And in groove, before the filling porous silicon layer, said semiconductor substrate surface is rotated the angle ion injects, mix so that trench wall is formed to inject.Said repeatedly equal portions are injected with and are beneficial to corner's doping content in the compensation planar graph, thereby improve the unlatching uniformity of insulated trench gate electrode bipolar type transistor, and then improve performance of semiconductor device.
Though the present invention discloses as above with preferred embodiment; Right its is not in order to limit the present invention; Has common knowledge the knowledgeable in the technical field under any; Do not breaking away from the spirit and scope of the present invention, when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (11)
1. the manufacturing approach of an insulated trench gate electrode bipolar type transistor comprises
Semiconductor substrate is provided, on said Semiconductor substrate, comprises cellular zone and terminal area;
Growth thermal field oxygen film on said Semiconductor substrate, the said thermal field oxygen of etched portions film is to form slope thermal field oxygen layer on said terminal area;
On said Semiconductor substrate and slope thermal field oxygen layer, form etching barrier layer and barrier oxide layer, etched portions etching barrier layer and barrier oxide layer are with the expose portion Semiconductor substrate;
Carry out thermal oxidation technology, on said exposed portions Semiconductor substrate, to form beak type oxide layer;
With said etching barrier layer and barrier oxide layer is mask, carries out etching technics, in Semiconductor substrate, to form groove;
Remove said beak type oxide layer and remaining barrier oxide layer and etching barrier layer, groove has slick and sly top margin edge;
Be rotated the angle ion and inject, the normal that belongs to face with said Semiconductor substrate is a rotating shaft, divides equally a plurality of injection directions around said rotating shaft 360 degree, and each injection direction all keeps identical inclination angle with said Semiconductor substrate place face.
2. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1 is characterized in that, the forming process of said slope thermal field oxygen layer comprises:
Said thermal oxide film is carried out the damaging injection of silicon ion, with loose said thermal oxide film surface;
The thermal oxide film surface that forms thermal field oxygen layer position, slope in desire forms photoresist, and the said thermal oxide film of wet etching is to form slope thermal field oxygen layer below said photoresist;
Remove said photoresist.
3. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1, the thickness of said thermal field oxygen film is 8000～18000 dusts.
4. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1 is characterized in that, thermal field oxygen layer longitudinal cross-section, said slope is trapezoidal, and the inclined-plane of said slope thermal field oxygen layer and Semiconductor substrate place face angle are 15～45 degree.
5. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1 is characterized in that, said beak type oxide layer extends in the Semiconductor substrate of said etching barrier layer below.
6. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1 is characterized in that, adopts the thermal oxide growth method to form said beak type oxide layer, and the thickness in the thickness, middle part of said beak type oxide layer is 2000～8000 dusts.
7. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1; It is characterized in that; Be rotated the step that the angle ion injects; The impurity that ion injects is a boron, and the implantation dosage scope is 1e12～5e13, and injection direction and the said Semiconductor substrate place angle that the plane was are 30～70 degree.
8. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1; It is characterized in that; Be rotated the step that the angle ion injects; Divide equally four injection directions around said rotating shaft 360 degree, whenever turn 90 degrees and carry out the primary ions injection, inject metering and be 1/4th of accumulated dose.
9. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 1; It is characterized in that, after the step that is rotated the injection of angle ion, also comprise; Form withstand voltage field plate structure in said terminal area, form device architecture in said cellular zone.
10. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 9 is characterized in that, forms field plate structure in said terminal area, forms device architecture in said cellular zone and comprises:
In said groove with on the thermal field oxygen layer of said slope, deposit the formation polysilicon layer;
The injection of mixing is to form the well region and the doped region that is arranged in second type of said well region of the first kind in the Semiconductor substrate in said cellular zone;
On said Semiconductor substrate, cover interlayer dielectric layer and deposit field plate oxide layer film successively;
The said field plate oxide layer of wet etching film is to form the field plate oxide layer;
The said inter-level dielectric oxide layer of etching is up to exposing Semiconductor substrate, to form through hole;
In said through hole, carry out ion implantation technology, to form the draw-out area of first kind well region;
Depositing metal to be forming metal level, and makes metal level photoetching and etching, forms source electrode and grid in said cellular zone, and forms the metal field plate in the terminal area;
At the back side of said Semiconductor substrate, carry out back side injection and annealing, and the deposit metal layer on back.
11. the manufacturing approach of insulated trench gate electrode bipolar type transistor as claimed in claim 10 is characterized in that, the said first kind is the P type, and said second type is the N type; Or the said first kind is the N type, and said second type is the P type.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104733377A (en) * | 2013-12-24 | 2015-06-24 | 上海华虹宏力半导体制造有限公司 | Method for achieving groove field effect transistor source electrode contact groove self aligned structure |
| CN107527800A (en) * | 2016-06-22 | 2017-12-29 | 无锡华润上华科技有限公司 | Trench gate structure and its manufacture method |
| CN116564895A (en) * | 2023-07-06 | 2023-08-08 | 捷捷微电(南通)科技有限公司 | Semiconductor device manufacturing method and semiconductor device |
| CN117672976A (en) * | 2024-02-01 | 2024-03-08 | 汉轩微电子制造(江苏)有限公司 | Manufacturing method of BJT combined totem pole driving device |
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| CN102263016A (en) * | 2011-08-02 | 2011-11-30 | 上海先进半导体制造股份有限公司 | Method for forming N-type groove power device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104733377A (en) * | 2013-12-24 | 2015-06-24 | 上海华虹宏力半导体制造有限公司 | Method for achieving groove field effect transistor source electrode contact groove self aligned structure |
| CN104733377B (en) * | 2013-12-24 | 2017-10-24 | 上海华虹宏力半导体制造有限公司 | The method for realizing trench FET source contact groove self-alignment structure |
| CN107527800A (en) * | 2016-06-22 | 2017-12-29 | 无锡华润上华科技有限公司 | Trench gate structure and its manufacture method |
| CN116564895A (en) * | 2023-07-06 | 2023-08-08 | 捷捷微电(南通)科技有限公司 | Semiconductor device manufacturing method and semiconductor device |
| CN116564895B (en) * | 2023-07-06 | 2023-09-08 | 捷捷微电(南通)科技有限公司 | Semiconductor device manufacturing method and semiconductor device |
| CN117672976A (en) * | 2024-02-01 | 2024-03-08 | 汉轩微电子制造(江苏)有限公司 | Manufacturing method of BJT combined totem pole driving device |
| CN117672976B (en) * | 2024-02-01 | 2024-04-05 | 汉轩微电子制造(江苏)有限公司 | Manufacturing method of BJT combined totem pole driving device |
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Application publication date: 20121114 |