CN102779078A - Method for improving cable compatibility of rear panel - Google Patents
Method for improving cable compatibility of rear panel Download PDFInfo
- Publication number
- CN102779078A CN102779078A CN2012102197918A CN201210219791A CN102779078A CN 102779078 A CN102779078 A CN 102779078A CN 2012102197918 A CN2012102197918 A CN 2012102197918A CN 201210219791 A CN201210219791 A CN 201210219791A CN 102779078 A CN102779078 A CN 102779078A
- Authority
- CN
- China
- Prior art keywords
- clock signal
- increasing
- fall time
- increase
- clock signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Dc Digital Transmission (AREA)
Abstract
The invention provides a method for improving cable compatibility of a rear panel. The method includes reducing sideband signal cross talk by increasing descending time of clock signals to achieve the effect that the rear panel is compatible with various Minisas cables and increase the descending time of the clock signals. The method includes the specific steps: 1) improving resistance of a clock signal pull-up resistor and increasing the descending time of the clock signals to reduce signal cross talk by increasing the resistance of the pull-up resistor of the clock signals; and 2) increasing a grounded capacitor at the clock signal end. The descending time of the clock signals can be effectively increased by increasing capacitance, but the descending time cannot be larger than 20ns.
Description
Technical field
The present invention relates to computer communication field, specifically is to utilize to increase the clock signal method of fall time, solves the hard disk backboard problem compatible to the Minisas cable., specifically a kind of compatible method of backboard cable that improves.
Background technology
The SAS hard disk backboard is widely used in taking in the server product effect of " increment cable ", to server machine performance and stable important influence.Along with the continuous variation of client's application demand, the variation that server master board also becomes to the Minisas cable between the hard disk backboard.
Comprised the four edges band signal in the Minisas line, the status indicator lamp of hard disk backboard has been controlled through sideband signals.Sideband signals is deferred to the SFF-8485 agreement, ≤20ns fall time of clock signal.Through to clock signal actual measurement on the backboard; The signal negative edge is usually about 2ns; Because it is too fast that clock signal changes; For the poor slightly Minisas line of sideband lines shielding, can on adjacent sideband lines, cause certain crosstalking, thereby make the status indicator lamp misoperation on the hard disk backboard.
To above problem; Through analysing in depth, we have summed up a kind of mould and have improved the compatible method of backboard cable: thus reach and make the compatibility of backboard through reducing crosstalking between sideband signals the fall time that increases clock signal multiple Minisas cable.
Summary of the invention
The purpose of this invention is to provide a kind of compatible method of backboard cable that improves.
The objective of the invention is to realize that through reducing crosstalking between sideband signals the fall time that increases clock signal, make the compatibility of backboard to multiple Minisas cable thereby reach, concrete grammar fall time that increases clock signal is following by following mode:
1) resistance of increase clock signal pull-up resistor; Thereby through reducing crosstalking between signal the fall time that the pull-up resistor resistance that increases clock signal can increase clock signal;
2) increase a electric capacity at clock signal terminal to ground; Can effectively increase the fall time of clock signal through increasing electric capacity, but it should be noted that fall time can not be greater than 20ns.
The invention has the beneficial effects as follows:, our backboard can be provided cost savings the Minisas cable compatibility of plurality of specifications and manufacturer through top improvement to backboard.
Description of drawings
Fig. 1 is the electrical block diagram that increases the pull-up resistor resistance;
Fig. 2 is the electrical block diagram that is increased to earth capacitance.
Embodiment
Explanation at length below with reference to Figure of description method of the present invention being done.
Increase the fall time of clock signal through the mode that increases resistance and increase electric capacity; Reach and make the compatibility of backboard to multiple Minisas cable thereby reduce crosstalking between sideband signals, concrete grammar fall time that increases clock signal can be divided into following two:
A) resistance of increase clock signal pull-up resistor R1 is as shown in Figure 1;
B) increase a capacitor C 1 at clock signal terminal to ground, as shown in Figure 2;
Carry out more detailed elaboration in the face of content of the present invention down:
First method, thereby through reducing crosstalking between signal the fall time that the pull-up resistor resistance that increases clock signal can increase clock signal;
Second method increases the electric capacity of clock signal to ground, needs to revise earlier the schematic diagram and the PCB of back plate design.Can effectively increase the fall time of clock signal through increasing electric capacity, but it should be noted that fall time can not be greater than 20ns.
Except that the described technical characterictic of instructions, be the known technology of those skilled in the art.
Claims (1)
1. one kind is improved the compatible method of backboard cable; It is characterized in that; Reduce crosstalking between sideband signals the fall time through increasing clock signal, makes the compatibility of backboard to multiple Minisas cable thereby reach, and concrete grammar fall time that increases clock signal is following:
1) resistance of increase clock signal pull-up resistor; Thereby through reducing crosstalking between signal the fall time that the pull-up resistor resistance that increases clock signal can increase clock signal;
2) increase a electric capacity at clock signal terminal to ground; Can effectively increase the fall time of clock signal through increasing electric capacity, but it should be noted that fall time can not be greater than 20ns.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012102197918A CN102779078A (en) | 2012-06-29 | 2012-06-29 | Method for improving cable compatibility of rear panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012102197918A CN102779078A (en) | 2012-06-29 | 2012-06-29 | Method for improving cable compatibility of rear panel |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102779078A true CN102779078A (en) | 2012-11-14 |
Family
ID=47123997
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2012102197918A Pending CN102779078A (en) | 2012-06-29 | 2012-06-29 | Method for improving cable compatibility of rear panel |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102779078A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103106303A (en) * | 2013-01-25 | 2013-05-15 | 浪潮电子信息产业股份有限公司 | Method for designing signal wire pull-up resistor according to length of signal wire |
CN105389247A (en) * | 2015-11-09 | 2016-03-09 | 浪潮电子信息产业股份有限公司 | Method for improving quality of SAS sideband signal |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1816116A (en) * | 2005-02-04 | 2006-08-09 | 富士通株式会社 | Semiconductor apparatus with crosstalk noise reduction circuit |
-
2012
- 2012-06-29 CN CN2012102197918A patent/CN102779078A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1816116A (en) * | 2005-02-04 | 2006-08-09 | 富士通株式会社 | Semiconductor apparatus with crosstalk noise reduction circuit |
Non-Patent Citations (4)
Title |
---|
吴昊等: "高速数字系统的串扰问题分析", 《电子技术》 * |
周路等: "信号上升或下降时间对高速电路信号完整性影响的研究", 《现代电子技术》 * |
高照辉: "数字电路PCB的电磁兼容涉及", 《工程实践》 * |
黎淑兰等: "微带线间的串扰抑制分析", 《温州师范学院学报(自然科学版)》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103106303A (en) * | 2013-01-25 | 2013-05-15 | 浪潮电子信息产业股份有限公司 | Method for designing signal wire pull-up resistor according to length of signal wire |
CN105389247A (en) * | 2015-11-09 | 2016-03-09 | 浪潮电子信息产业股份有限公司 | Method for improving quality of SAS sideband signal |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN203224819U (en) | Mainboard | |
CN102779078A (en) | Method for improving cable compatibility of rear panel | |
CN208284706U (en) | A kind of novel PCIe/SAS connector construction | |
CN202930673U (en) | Orthogonal connector possessing double layer shielding mechanism | |
CN204064375U (en) | Is furnished with the fast plugging structure of electronic module counter | |
CN203930819U (en) | A kind of PCIE signal transmitting apparatus | |
CN204680007U (en) | A kind of XMC turns the PCIE adapter of PMC | |
CN208315205U (en) | A kind of circuit of compatible multiple interfaces SSD | |
CN204928796U (en) | USB interface circuit and electronic equipment | |
CN103713557A (en) | Analogue isolation technology based on digital bus | |
CN202838135U (en) | Statistics analysis system(SAS) hard disk drive back panel | |
CN204480294U (en) | A kind of Cloud Server storage card | |
CN104244610A (en) | Design method for reducing CONNECTOR via influences | |
CN202472509U (en) | Embedded type main board based on AT91SAM9263 processor | |
CN204305462U (en) | A kind of novel PCB | |
CN204302863U (en) | Mainboard | |
CN203299724U (en) | Device enabling backboard SAS lines not easy to scratch | |
CN201583870U (en) | Expansion board with fuction of effective connecting | |
CN102158063A (en) | Method for reducing voltage ripples | |
CN204178482U (en) | Tax-controlled cash register with panel-mounted USB interface | |
CN202998012U (en) | Filter circuit | |
CN203054687U (en) | Cortex A9 M3-based core board framework | |
CN203595974U (en) | RISER board card of unit connector | |
CN204883686U (en) | PCIE bus test structure based on cable | |
CN203775531U (en) | Substrate of inductive magnetic ring board |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20121114 |