CN102769272A - Failure latching and resetting system of power converter and power converter - Google Patents
Failure latching and resetting system of power converter and power converter Download PDFInfo
- Publication number
- CN102769272A CN102769272A CN2012102494685A CN201210249468A CN102769272A CN 102769272 A CN102769272 A CN 102769272A CN 2012102494685 A CN2012102494685 A CN 2012102494685A CN 201210249468 A CN201210249468 A CN 201210249468A CN 102769272 A CN102769272 A CN 102769272A
- Authority
- CN
- China
- Prior art keywords
- signal
- circuit
- power inverter
- fault
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Inverter Devices (AREA)
Abstract
The invention provides a failure latching and resetting system of a power converter. The failure latching and resetting system comprises a state latching circuit, a failure analysis circuit, a control circuit and a reset signal circuit, wherein the state latching circuit receives a state signal of the power converter, latches the state signal and outputs a corresponding intermediate signal; the failure analysis circuit judges whether the corresponding state signal is a failure signal according to the intermediate signal, and outputs a judgment signal; the control circuit controls the turn-on and turn-off of the power converter according to the state of the judgment signal and outputs a driving control signal; and the reset signal circuit outputs a reset signal to the state latching circuit under the condition that the state of the judgment signal and the state of the driving control signal are in accordance with a preset state. The invention also provides the power converter. By adoption of the technical scheme provided by the invention, the failure signal of the power converter can be latched, and the failure latching and resetting system has a resetting function, so the operation of the power converter can be automatically recovered, a power switching tube is prevented from being frequently turned on and turned off, the service life of the power converter is prolonged, and the reliability and maintainability of the power converter are improved.
Description
Technical field
The present invention relates to the power inverter field, in particular to a kind of fault latch and resetting system and a kind of power inverter of power inverter.
Background technology
At present general power inverter failure protecting device principle all is: the phase current frequency spectrum of power inverter as characteristic quantity, according to the variation of characteristic quantity, is differentiated the failure mode and the phase place of power inverter.
But still there are some technical problems in aforesaid way:
1) owing to be the detection to the phase current frequency, and faults such as the excess temperature of power inverter, overvoltage, low pressure is not detected, make that the fault detect type is single;
2) after each fault disappears, need artificial close switch, cause the frequent switch of power switch pipe, reduced the useful life of power inverter, reliability reduces, the maintainability variation.
Therefore; Need a kind of new power inverter failure protecting device, can the fault-signal of power inverter be latched, after fault disappears; Has reset function; Make power inverter recover operate as normal automatically, avoided the frequent switch of power switch pipe has been improved useful life, the reliability and maintainability of power inverter.
Summary of the invention
The present invention just is being based on the problems referred to above; Proposed a kind of fault latch and resetting system of power inverter, can the fault-signal of power inverter have been latched, after fault disappears; Has reset function; Make power inverter recover operate as normal automatically, avoided the frequent switch of power switch pipe has been improved useful life, the reliability and maintainability of power inverter.
In view of this; The present invention proposes a kind of fault latch and resetting system of power inverter, comprising: state latching circuit receives at least one status signal from said power inverter; Latch said at least one status signal; And the corresponding M signal of output, and when receiving reset signal, remove the status signal that has latched; The accident analysis circuit receives said M signal, judge according to the level state of said M signal whether corresponding status signal is fault-signal, and signal is judged in output; Control circuit receives said judgement signal, and according to the state of said judgement signal, control the unlatching of said power inverter or close, and the corresponding drive control signal of output; The reset signal circuit receives said judgement signal and said drive control signal, and under the state of said judgement signal and said drive control signal and situation that preset state conforms to, exports said reset signal to said state latching circuit.
In this technical scheme; Can and transfer to state latching circuit through the corresponding status signal of various sensor acquisition; As excess temperature fault, low temperature fault, over current fault, overvoltage fault, driving malfunction, under-voltage fault etc. appear, then the level state of status signal will change, such as being high level normally; It during fault low level; Be convenient to state latching circuit and export the M signal of different conditions in view of the above, make control circuit in time open or close power inverter, and realized detection the polytype fault; And fault-signal latchs reliably, also for Fault Processing and maintenance condition is provided.
Through judging the acting in conjunction of signal and drive control signal, whether to get rid of with failure judgement, arbitrary one-side signal condition variation can not make state latching circuit reset, thereby has avoided the variable power device to be activated under nonserviceabling; And the control through signal can quit work or restart power inverter automatically, need not manual reset, has improved useful life, reliability, maintainability and the service efficiency of power inverter.
In technique scheme, preferably, also comprise: the fault suggestion device, be connected to said accident analysis circuit, according to the state of said judgement signal, the output corresponding prompt message.
In this technical scheme, the fault suggestion device can be one or more in warning light, prompting loudspeaker, the display screen etc.Through the fault suggestion device, the staff can intuitively and easily understand current whether breaking down, so that in time handle.
In technique scheme; Preferably, said state latching circuit comprises the RS latch, and said accident analysis circuit comprises AND circuit; Then said fault latch and resetting system also comprise: the first logical transition circuit; Be connected between said state latching circuit and the said accident analysis circuit, after being used for said M signal carried out logical transition, export said accident analysis circuit to.
In this technical scheme; The logic level of RS latch output may not conform to the required input logic level of accident analysis circuit; Logic level like the output of RS latch is 1,1; And the required input logic level of accident analysis circuit is 0,0, can carry out logical transition to the M signal of RS latch output through the first logical transition circuit so, makes the logic of M signal meet the required input logic of accident analysis circuit.Certainly, the accident analysis circuit here also can not adopt AND circuit, but adopts other to have the circuit with logic, can realize above-mentioned functions equally.
In technique scheme, preferably, said RS latch, said AND circuit and the said first logical transition circuit are the cmos logic gate circuit.
In this technical scheme; When surpassing the 10us rank, failure response time will cause fatal damage to power inverter; And, can improve failure response speed through adopting the cmos logic gate circuit, failure response time should be controlled at the ns rank; Control circuit in time the power controlling converter unlatching or close, make power inverter when breaking down, protected timely.
In technique scheme; Preferably, also comprise: delay circuit is arranged between said accident analysis circuit and the said reset signal circuit; Being used at the corresponding status signal of said judgement signal is under the situation of fault-signal, and the transmission course of said judgement signal is postponed to handle.
In this technical scheme, through delay circuit, can control the time of delay of reset signal, operate as normal can be recovered by the indicated horsepower converter by the system that makes, is convenient to staff's monitoring and maintenance.
In technique scheme, preferably, said delay circuit comprises the circuit that resistance, electric capacity and diode constitute, and wherein, said resistance is connected with said capacitances in series, and said diode is connected in parallel on said resistance two ends.
In this technical scheme, when status signal was normal signal, the circuit of corresponding judgment signal through being made up of electric capacity and diode do not have delayed action; When status signal was fault-signal, the circuit of corresponding judgment signal through being made up of electric capacity and resistance had delayed action, and concrete time of delay is by the parameter determining of electric capacity and resistance, and can changed as required and adjusted by the user.
In technique scheme; Preferably, said reset signal circuit comprises NAND gate circuit, and then said fault latch and resetting system also comprise: the second logical transition circuit; After being used for said judgement signal and said drive control signal carried out logical transition, export said reset signal circuit to.
In this technical scheme; The logic level of judging signal and drive control signal may not conform to the required input logic level of reset signal circuit; As the logic level of judging signal and drive control signal is 1,1; And the required input logic level of reset signal circuit is 0,0, can carry out logical transition to judging signal and drive control signal through the second logical transition circuit so, makes the logic of judging signal and drive control signal meet the required input logic of accident analysis circuit.
In technique scheme, preferably, the said second logical transition circuit comprises not circuit.
In technique scheme, preferably, also comprise: drive amplifying circuit, be arranged between said control circuit and the said reset signal circuit, after being used for said drive control signal carried out logical transition and processing and amplifying, export said reset signal circuit to.
According to another aspect of the invention, also propose a kind of power inverter, comprised the fault latch and the resetting system of the described power inverter of above-mentioned arbitrary technical scheme.
Through above technical scheme; Can the fault-signal of power inverter be latched; After fault disappears, have reset function, make power inverter recover operate as normal automatically; Avoided the frequent switch of power switch pipe has been improved useful life, the reliability and maintainability of power inverter.
Description of drawings
Fig. 1 shows the fault latch of power inverter and the structural representation of resetting system according to an embodiment of the invention;
Fig. 2 shows the fault latch of power inverter and the physical circuit figure of resetting system according to an embodiment of the invention;
Fig. 3 shows failure response time test sketch map according to an embodiment of the invention.
Embodiment
In order more to be expressly understood above-mentioned purpose of the present invention, feature and advantage, the present invention is further described in detail below in conjunction with accompanying drawing and embodiment.Need to prove that under the situation of not conflicting, the application's embodiment and the characteristic among the embodiment can make up each other.
A lot of details have been set forth in the following description so that make much of the present invention; But; The present invention can also adopt other to be different from other modes described here and implement, and therefore, protection scope of the present invention does not receive the restriction of following disclosed specific embodiment.
Fig. 1 shows the fault latch of power inverter and the structural representation of resetting system according to an embodiment of the invention.
As shown in Figure 1; The fault latch of power inverter and resetting system comprise according to an embodiment of the invention: state latching circuit 102; Reception is latched at least one status signal from least one status signal of power inverter, and the corresponding M signal of output; And when receiving reset signal, remove the status signal that has latched; Accident analysis circuit 106 receives M signal, judge according to the level state of M signal whether corresponding status signal is fault-signal, and signal is judged in output; Control circuit 108 receive to be judged signal, according to the state of judging signal, and the unlatching of power controlling converter or close, and the corresponding drive control signal of output; Reset signal circuit 116 receive to be judged signal and drive control signal, and under the state of judging signal and drive control signal and situation that preset state conforms to, exports reset signals to state latching circuit 102.
In this technical scheme; Can and transfer to state latching circuit 102 through the corresponding status signal of various sensor acquisition; As excess temperature fault, low temperature fault, over current fault, overvoltage fault, driving malfunction, under-voltage fault etc. appear, then the level state of status signal will change, such as being high level normally; It during fault low level; Be convenient to state latching circuit 102 and export the M signal of different conditions in view of the above, make control circuit 108 in time open or close power inverter, and realized detection the polytype fault; And fault-signal latchs reliably, also for Fault Processing and maintenance condition is provided.
Through judging the acting in conjunction of signal and drive control signal, whether to get rid of with failure judgement, arbitrary one-side signal condition variation can not make state latching circuit 102 reset, thereby has avoided the variable power device to be activated under nonserviceabling; And the control through signal can quit work or restart power inverter automatically, need not manual reset, has improved useful life, reliability, maintainability and the service efficiency of power inverter.
In technique scheme, also comprise: fault suggestion device 118, be connected to accident analysis circuit 106, according to the state of judging signal, the output corresponding prompt message.
In this technical scheme, fault suggestion device 118 can be one or more in warning light, prompting loudspeaker, the display screen etc.Through fault suggestion device 118, the staff can intuitively and easily understand current whether breaking down, so that in time handle.
In technique scheme; State latching circuit 102 can be the RS latch; Accident analysis circuit 106 can be an AND circuit, and then fault latch and resetting system also comprise: the first logical transition circuit 104 is connected between state latching circuit 102 and the accident analysis circuit 106; After being used for M signal carried out logical transition, export accident analysis circuit 106 to.
In this technical scheme; The logic level of RS latch output may not conform to accident analysis circuit 106 required input logic levels; Logic level like the output of RS latch is 1,1; And accident analysis circuit 106 required input logic levels are 0,0, can carry out logical transition to the M signal of RS latch output through the first logical transition circuit so, make the logic of M signal meet the required input logic of accident analysis circuit 106.Certainly, the accident analysis circuit 106 here also can not adopt AND circuit, but adopts other to have the circuit with logic, can realize above-mentioned functions equally.
In technique scheme, RS latch, AND circuit and the first logical transition circuit 104 can adopt the cmos logic gate circuit.
In this technical scheme; When surpassing the 10us rank, failure response time will cause fatal damage to power inverter; And, can improve failure response speed through adopting the cmos logic gate circuit, failure response time should be controlled at the ns rank; Control circuit 108 in time the power controlling converter unlatching or close, make power inverter when breaking down, protected timely.
In technique scheme; Also comprise: delay circuit 112; Be arranged between accident analysis circuit 106 and the reset signal circuit 116, be used for the transmission course of judging signal being postponed to handle judging that the corresponding status signal of signal is under the situation of fault-signal.
In this technical scheme, through delay circuit 112, can control the time of delay of reset signal, operate as normal can be recovered by the indicated horsepower converter by the system that makes, is convenient to staff's monitoring and maintenance.
In technique scheme, delay circuit 112 can adopt the circuit that is made up of resistance, electric capacity and diode, and wherein, resistance is connected with capacitances in series, and diode is connected in parallel on the resistance two ends.
In this technical scheme, when status signal was normal signal, the circuit of corresponding judgment signal through being made up of electric capacity and diode do not have delayed action; When status signal was fault-signal, the circuit of corresponding judgment signal through being made up of electric capacity and resistance had delayed action, and concrete time of delay is by the parameter determining of electric capacity and resistance, and can changed as required and adjusted by the user.
In technique scheme; Reset signal circuit 116 comprises NAND gate circuit; Then fault latch and resetting system also comprise: the second logical transition circuit 114 is used for exporting reset signal circuit 116 to after judging that signal and drive control signal are carried out logical transition.
In this technical scheme; The logic level of judging signal and drive control signal may not conform to reset signal circuit 116 required input logic levels; As the logic level of judging signal and drive control signal is 1,1; And reset signal circuit 116 required input logic levels are 0,0; Can carry out logical transition to judging signal and drive control signal through the second logical transition circuit 114 so, make the logic of judgement signal and drive control signal meet the required input logic of reset signal circuit 116.
In technique scheme, the second logical transition circuit can be a not circuit.
In technique scheme, also comprise: drive amplifying circuit 110, be arranged between control circuit 108 and the reset signal circuit 116, after being used for drive control signal carried out logical transition and processing and amplifying, export reset signal circuit 116 to.
Fig. 2 shows the fault latch of power inverter and the physical circuit figure of resetting system according to an embodiment of the invention.
As shown in Figure 2; By detected each line state signal/ERR1 such as transducer that is provided with on the power inverter and comparator ,/ERR2 ... / ERRX is connected to the asserts signal end (it is effective to be assumed to low level) of state latching circuit 102; The reset signal end (it is effective to be assumed to low level) of reset signal/R_CLR connection status latch cicuit 102, initial condition is a high level.
The state latching circuit 102 here can be the RS latch; Such as the RS latch of the HEF4044 model that can adopt PHILIPS Co. to produce, then when breaking down, the output signal of state latching circuit 102 (be equivalent to embodiment illustrated in fig. 1 described in M signal) ERR1, ERR2 ... ERRX set; During the status signal fault-free; The output of state latching circuit 102 latchs original fault, and after the wait troubleshooting finished, reset signal/R_CLR is (low level) effectively; Just can reset mode latch cicuit 102, and to output signal ERR1, ERR2 ... ERRX is set again.
Particularly; Because accident analysis circuit 106 will carry out AND operation; In order to make any fault all can be detected; Then the output signal of state latching circuit 102 needs to obtain signal E1, E2 through the NOT operation processing of the first logical transition circuit 104 ... EX, signal E1, E2 then ... EX carries out AND operation through accident analysis circuit 106, then needs only E1, E2 ... Have any one the tunnel among the EX corresponding to fault-signal; Then this signal is a low level, makes the output signal/SERR (promptly judging signal) of accident analysis circuit 106 just be low level.The first logical transition circuit 104 here can adopt the not circuit of the HEF4049 model of PHILIPS Co.'s production, and accident analysis circuit 106 can adopt the AND circuit of the HEF4073 model of PHILIPS Co.'s production.
Output signal/the SERR of accident analysis circuit 106 exist many circuit flows to:
Article one, through fault cue circuit 118, particularly, can adopt the not circuit of the HEF4049 model of PHILIPS Co.'s production.When breaking down ,/SERR is a low level, and the output Y2 of fault cue circuit 118 is a low level, and the L1 lamp is lighted, and shows and breaks down; When not having fault ,/SERR is a high level, and the output Y1 of fault cue circuit 118 is a low level, and the L2 lamp is lighted, and showing does not have fault, the staff can be intuitively lighting and extinguish the working condition of learning power inverter through L1 and L2.
Second through delay circuit 112, particularly, can adopt the circuit that is made up of capacitor C 1, resistance R 1 and diode D1.When fault takes place; / SERR signal level is low by hypermutation, and delay circuit 112 feasible/SERR signals produce fault-signal/SERRO through capacitor C 1 and resistance R 1; And delay time can be by the resistance value of R1 and the capacitance decision of C1, and the user can set according to actual needs; After fault was got rid of ,/SERR signal level was by the low height that becomes, and delay circuit makes signal/SERR through capacitor C 1 and diode D1, has guaranteed minimum time-delay, make/the SERR signal transmits fast.
Article three,, through control circuit 108.When fault takes place; / SERR is a low level, and for fear of power inverter being caused fatal damage ,/SERR signal can be uploaded to control circuit 108 immediately; PWM (the Pulse Width Modulation that control circuit 108 is produced; Pulse-width modulation) signal DRIVE-X is a disarmed state, can be because of status signal by the state latch circuit latches, avoided the power consumption penalty and the lost of life of the IGBT in the power inverter that the frequent switch of power inverter causes.After fault disappeared, this moment, signal/SERRO was a high level just, showed that fault removes.
This moment, the second logical transition circuit 114 detected after treatment signal/SERRO and drive signal DRIVEX (the DRIVE-X signal produces drive signal DRIVEX after the processing of the amplifying circuit 110 of overdriving) simultaneously; Be that low level and drive signal DRIVEX are when being disarmed state (low level is invalid) only at signal/SERRO; The second logical transition circuit 114 output signal SERR with/DRIVE just is a high level; Be transformed to the effective reset signal/R_CLR of low level after the NAND operation through reset signal circuit 116; Reset signal/R_CLR transfers to state latching circuit 102, the status signal that resets and latch, and power inverter recovers operate as normal.When fault-signal/SERRO and drive signal DRIVEX do not satisfy above-mentioned condition; Reset signal all is in disarmed state; This has guaranteed that power inverter only disappears and control circuit 108 responds the fault that takes place in fault, is in the recovery operate as normal that just can reset under the situation of safe shutdown.
Particularly; Above-mentioned driving amplifying circuit 110 can adopt the chip of the HEF40240 model of PHILIPS Co.'s production; The second logical transition circuit 114 can adopt the not circuit of the HEF40106 model of PHILIPS Co.'s production, and reset signal circuit 116 can adopt the NAND gate circuit of the HEF4093 model of PHILIPS Co.'s production.
In sum, the defencive function after entire circuit had both had fault and takes place, the reliable turn-off power inverter, after having fault again and disappearing, the ability of self-recovery work has strengthened the reliability of power inverter, maintainability, stability.
In technique scheme, it is good more to lack more for failure response time (from control circuit 108 these faults of response that break down, the time of control switch-off power variator); For the real-time that guarantees to detect; Can select the high-speed cmos device for use, such as the chip of state latching circuit 102 for the HEF4044 model of PHILIPS Co.'s production, the first logical transition circuit 104 can adopt the chip of the HEF4049 model of PHILIPS Co.'s production; Accident analysis circuit 106 can adopt the chip of the HEF4073 model of PHILIPS Co.'s production; Its transmission delay all is 30-60ns, then/and the SERR signal is through a RS latch and two gate circuits, transmission delay:
T
delay=150ns
The Theoretical Calculation delay time is less than 200ns; Solid line as shown in Figure 3 partly for side circuit test obtain /delay time of SERR signal; Specifically be about: 150ns; It is thus clear that this circuit has the extremely good response time, can not cause fatal damage by the guaranteed output device because fault postpones.
And can realize the time of delay of delay circuit through resistance R 1 and capacitor C 1, and concrete delay time equals:
T=R
1C
1ln[(u-uc)/u]
Wherein, u is a charging voltage, and uc is the forward input voltage representative value of the circuit second logical transition circuit; U and uc are fixed voltage value, can be known by above formula, through the resistance value of adjustment R1 and the capacitance of C1; Can adjust the delay time of setting, make things convenient for the on-the-spot maintenance of staff.Particularly, dotted portion as shown in Figure 3 is the time of delay under a kind of concrete condition.
According to another aspect of the invention, also propose a kind of power inverter, comprised the fault latch and the resetting system of the described power inverter of above-mentioned arbitrary technical scheme.
More than be described with reference to the accompanying drawings technical scheme of the present invention; Consider in the correlation technique that the protective device fault detect type of power inverter is single, and needs manual reset to restart power inverter; Cause the frequent switch of power switch pipe; Reduced the useful life of power inverter, and reliability reduces, the maintainability variation.Through technical scheme of the present invention; Can the fault-signal of power inverter be latched; After fault disappears, have reset function, make power inverter recover operate as normal automatically; Avoided the frequent switch of power switch pipe has been improved useful life, the reliability and maintainability of power inverter.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. the fault latch of a power inverter and resetting system is characterized in that, comprising:
State latching circuit receives at least one status signal from said power inverter, latchs said at least one status signal, and the corresponding M signal of output, and when receiving reset signal, removes the status signal that has latched;
The accident analysis circuit receives said M signal, judge according to the level state of said M signal whether corresponding status signal is fault-signal, and signal is judged in output;
Control circuit receives said judgement signal, and according to the state of said judgement signal, control the unlatching of said power inverter or close, and the corresponding drive control signal of output;
The reset signal circuit receives said judgement signal and said drive control signal, and under the state of said judgement signal and said drive control signal and situation that preset state conforms to, exports said reset signal to said state latching circuit.
2. the fault latch of power inverter according to claim 1 and resetting system is characterized in that, also comprise:
The fault suggestion device is connected to said accident analysis circuit, according to the state of said judgement signal, and the output corresponding prompt message.
3. the fault latch of power inverter according to claim 1 and resetting system is characterized in that, said state latching circuit comprises the RS latch, and said accident analysis circuit comprises AND circuit, and then said fault latch and resetting system also comprise:
The first logical transition circuit is connected between said state latching circuit and the said accident analysis circuit, after being used for said M signal carried out logical transition, exports said accident analysis circuit to.
4. the fault latch of power inverter according to claim 3 and resetting system is characterized in that, said RS latch, said AND circuit and the said first logical transition circuit are the cmos logic gate circuit.
5. according to the fault latch and the resetting system of each described power inverter in the claim 1 to 4, it is characterized in that, also comprise:
Delay circuit is arranged between said accident analysis circuit and the said reset signal circuit, and being used at the corresponding status signal of said judgement signal is under the situation of fault-signal, and the transmission course of said judgement signal is postponed to handle.
6. the fault latch of power inverter according to claim 5 and resetting system; It is characterized in that said delay circuit comprises the circuit that resistance, electric capacity and diode constitute, wherein; Said resistance is connected with said capacitances in series, and said diode is connected in parallel on said resistance two ends.
7. the fault latch of power inverter according to claim 5 and resetting system is characterized in that, said reset signal circuit comprises NAND gate circuit, and then said fault latch and resetting system also comprise:
The second logical transition circuit after being used for said judgement signal and said drive control signal carried out logical transition, exports said reset signal circuit to.
8. the fault latch of power inverter according to claim 7 and resetting system is characterized in that, the said second logical transition circuit comprises not circuit.
9. according to the fault latch and the resetting system of each described power inverter in the claim 1 to 4, it is characterized in that, also comprise:
Drive amplifying circuit, be arranged between said control circuit and the said reset signal circuit, after being used for said drive control signal carried out logical transition and processing and amplifying, export said reset signal circuit to.
10. power inverter comprises the fault latch and the resetting system of each described power inverter in the claim 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012102494685A CN102769272A (en) | 2012-07-18 | 2012-07-18 | Failure latching and resetting system of power converter and power converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012102494685A CN102769272A (en) | 2012-07-18 | 2012-07-18 | Failure latching and resetting system of power converter and power converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102769272A true CN102769272A (en) | 2012-11-07 |
Family
ID=47096564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012102494685A Pending CN102769272A (en) | 2012-07-18 | 2012-07-18 | Failure latching and resetting system of power converter and power converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102769272A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103337835A (en) * | 2013-06-07 | 2013-10-02 | 国家电网公司 | Circuit used for IGBT fault protection and self resetting |
| CN104038191A (en) * | 2013-03-06 | 2014-09-10 | 北京北广科技股份有限公司 | Driving circuit of voltage type gate control device |
| CN104660230A (en) * | 2013-11-19 | 2015-05-27 | 河南森源电气股份有限公司 | A fault maintaining and resetting system for converter power module |
| CN104777805A (en) * | 2015-02-11 | 2015-07-15 | 北京配天技术有限公司 | Industrial robot safety control system as well as backup safety circuit and safety module |
| CN105826901A (en) * | 2016-04-26 | 2016-08-03 | 武汉理工大学 | Digital switching converter protection circuit |
| CN110488206A (en) * | 2019-08-13 | 2019-11-22 | 科华恒盛股份有限公司 | A kind of failure monitoring system |
| CN112953508A (en) * | 2021-03-31 | 2021-06-11 | 臻驱科技（上海）有限公司 | Latch circuit and judgment method for low-level fault signal |
| CN116298635A (en) * | 2023-03-30 | 2023-06-23 | 海信家电集团股份有限公司 | IPM fault detection system, IPM fault detection method, IPM fault detection device and storage medium |
| CN118380971A (en) * | 2024-06-20 | 2024-07-23 | 杭州禾迈电力电子股份有限公司 | Power converter and photovoltaic system with switching tube driving protection |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1282108A (en) * | 1999-07-23 | 2001-01-31 | 精工爱普生株式会社 | Semiconductor integrated circuit and checking method, crystal device and electronic device |
| CN201450314U (en) * | 2009-07-09 | 2010-05-05 | 南京泽延微电子有限公司 | Battery overdischarge protection circuit for solar lawn lamp |
| CN102035183A (en) * | 2010-12-31 | 2011-04-27 | 常州赛莱德科技有限公司 | Protection circuit for switching power supply |
| US20110110007A1 (en) * | 2009-11-06 | 2011-05-12 | Analog Vision Technology Inc. | Latch-control protection circuit |
| CN102340246A (en) * | 2011-08-18 | 2012-02-01 | 南京航空航天大学 | Thick-film magnetic isolation direct current solid-state power controller |
-
2012
- 2012-07-18 CN CN2012102494685A patent/CN102769272A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1282108A (en) * | 1999-07-23 | 2001-01-31 | 精工爱普生株式会社 | Semiconductor integrated circuit and checking method, crystal device and electronic device |
| CN201450314U (en) * | 2009-07-09 | 2010-05-05 | 南京泽延微电子有限公司 | Battery overdischarge protection circuit for solar lawn lamp |
| US20110110007A1 (en) * | 2009-11-06 | 2011-05-12 | Analog Vision Technology Inc. | Latch-control protection circuit |
| CN102035183A (en) * | 2010-12-31 | 2011-04-27 | 常州赛莱德科技有限公司 | Protection circuit for switching power supply |
| CN102340246A (en) * | 2011-08-18 | 2012-02-01 | 南京航空航天大学 | Thick-film magnetic isolation direct current solid-state power controller |
Non-Patent Citations (1)
| Title |
|---|
| 孙稚等: "大功率IGBT驱动模块2SD315A的特性及其应用", 《电力电子技术》 * |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104038191A (en) * | 2013-03-06 | 2014-09-10 | 北京北广科技股份有限公司 | Driving circuit of voltage type gate control device |
| CN103337835A (en) * | 2013-06-07 | 2013-10-02 | 国家电网公司 | Circuit used for IGBT fault protection and self resetting |
| CN103337835B (en) * | 2013-06-07 | 2015-11-04 | 国家电网公司 | A kind of error protection for IGBT and self-resetting circuit |
| CN104660230A (en) * | 2013-11-19 | 2015-05-27 | 河南森源电气股份有限公司 | A fault maintaining and resetting system for converter power module |
| CN104777805A (en) * | 2015-02-11 | 2015-07-15 | 北京配天技术有限公司 | Industrial robot safety control system as well as backup safety circuit and safety module |
| CN104777805B (en) * | 2015-02-11 | 2017-12-15 | 北京配天技术有限公司 | A kind of industrial robot safety control system and backup safety circuit, security module |
| CN105826901A (en) * | 2016-04-26 | 2016-08-03 | 武汉理工大学 | Digital switching converter protection circuit |
| CN110488206A (en) * | 2019-08-13 | 2019-11-22 | 科华恒盛股份有限公司 | A kind of failure monitoring system |
| CN112953508A (en) * | 2021-03-31 | 2021-06-11 | 臻驱科技（上海）有限公司 | Latch circuit and judgment method for low-level fault signal |
| CN116298635A (en) * | 2023-03-30 | 2023-06-23 | 海信家电集团股份有限公司 | IPM fault detection system, IPM fault detection method, IPM fault detection device and storage medium |
| CN118380971A (en) * | 2024-06-20 | 2024-07-23 | 杭州禾迈电力电子股份有限公司 | Power converter and photovoltaic system with switching tube driving protection |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102769272A (en) | Failure latching and resetting system of power converter and power converter | |
| CN203326580U (en) | Battery-reversal-connection protection device for electronic cigarette | |
| CN109067353B (en) | Active bypass control device and method for photovoltaic module | |
| CN203056953U (en) | Driver and bus capacitor discharge circuit thereof | |
| CN202888791U (en) | Load controller based on zero-cross starting overvoltage protection | |
| CN103414164B (en) | A kind of protective circuit of multiple IGBT parallel running | |
| CN103208780A (en) | Direct current motor control circuit with heat protection function | |
| CN202488098U (en) | Brake-phase short-circuit detecting, judging and protecting device | |
| CN206271619U (en) | Self-correcting relay anti-adhesion circuit | |
| CN101720147A (en) | LED driving circuit and LED device | |
| CN102778849B (en) | Switching on and shutting down control circuit, electronic equipment and on-off control method | |
| CN202285347U (en) | State detection circuit for main/standby execution switch of automatic change-over switch | |
| CN103731020B (en) | The standby controlling method of photovoltaic DC-to-AC converter | |
| CN102480121B (en) | A kind of load overcurrent guard method based on self-recovering function | |
| CN202940400U (en) | Control circuit of energy-saving socket | |
| CN202141790U (en) | Fault detect circuit for relay of main controller of pure electric car | |
| CN104167709A (en) | Electric vehicle power supply short-circuit protection circuit | |
| CN101060245A (en) | Breaker coil protector | |
| CN101345425A (en) | Intelligentized battery charge control circuit | |
| CN202931610U (en) | Intelligent power supply detecting and controlling device | |
| CN203326565U (en) | Direct current motor control circuit with heat protection function | |
| CN102435933A (en) | Automobile circuit fault discrimination method | |
| CN201341255Y (en) | LED lamp current switch and control circuit for vehicle body control module | |
| CN203564097U (en) | Novel water dispenser | |
| CN102769275A (en) | Over-discharge protection circuit for rechargeable battery |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20121107 |