CN102760437B - Audio decoding device of control conversion of real-time audio track - Google Patents

Audio decoding device of control conversion of real-time audio track Download PDF

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CN102760437B
CN102760437B CN201110109893.XA CN201110109893A CN102760437B CN 102760437 B CN102760437 B CN 102760437B CN 201110109893 A CN201110109893 A CN 201110109893A CN 102760437 B CN102760437 B CN 102760437B
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sound channel
address
data
unit
channel
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CN102760437A (en
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杨堃
孔吉
刘佩林
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Shanghai Jiaotong University
Fujitsu Ltd
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Fujitsu Ltd
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Abstract

The invention discloses an audio decoding device with configurable control conversion of a real-time audio track, in the technical field of digital audio processing. The audio decoding device comprises an audio track control unit, an address control unit, a logical calculus unit and a coefficient storage unit, wherein the audio track control unit is respectively connected with the coefficient storage unit and the address control unit and respectively used for outputting configuration parameter information and original audio information, the coefficient storage unit and the address storage unit are respectively connected with the logical calculus unit and used for outputting logic parameters and data addresses, and the logical calculus unit receives PCM data outputted by a decoder and outputs PCM sample values. The audio decoding device of control conversion of the real-time audio track realizes direct control and conversion of a decoding result, and obtains an anticipant output. The audio decoding device has the advantages of simple logic module, convenience for realizing address block operation in parallel, rapid conversion, synchronization and true time with a system on chip, and no delay.

Description

Sound channel is controlled the audio decoding apparatus of conversion in real time
Technical field
What the present invention relates to is the device in a kind of Digital Audio-Frequency Processing Techniques field, specifically a kind of audio decoding apparatus with configurable real-time sound channel control conversion.
Background technology
Natural sound, characterizes with the audio file of different sound channel standards, the orientation of sound generation is different, different apart from the distance of people's ear so due to the difference of simulating signal sound source after being transformed into DAB.At present, the form of DAB forms with monophony, stereophony and surround sound.Monophonic audio is unified after referring to the sound signal from different azimuth being mixed to be recorded it by recording equipment, then is reset by an audio amplifier.Dual-channel audio is with two at an angle to each other equipment of raising one's voice, each equipment of raising one's voice provides signal by a sound channel separately, the Biological Principles of the sound that the signal mode apery ear in sound channel is heard at nature, carry out the sound of simulating nature circle neutral body, be actually with 2D signal and carry out the stereo sound source in the simulating reality world.Surround sound is a kind of multichannel audio.Normally compare with stereophony, refer to sound as a kind of manner of playback that hearer is surrounded.The playback sound field that this mode produces, except retaining the Sounnd source direction sense of original signal, also supervenes around the acoustics of sense and expansion sense (sound leaves hearer's diffusion or has the sensation of reverberation).
In many application backgrounds, require, in certain distortion range, between the voice data by above various sound channel standards, to change or to carry out the control of sound channel output, with the following various examples that are applied as:
The quality and quantity of equipment of raising one's voice is not enough, and the multichannel audio that decoding need be drawn is mixed is down to two-channel or monophonic audio, utilizes the existing equipment of raising one's voice to carry out the output of audio frequency.
In song audio frequency, wish only output accompaniment or the part of singing opera arias, the i.e. a certain channel information of an output audio.
After the decoding of the monophony of certain low tonequality or dual-channel audio, wish to export by computing the audio frequency of a stereo-circulation sound.
In audio post-processing, to after multitrack audio file decoding wishing the waveform of certain independent sound channel to modify, or utilize the data linear combination of certain several sound channel to reach the effect of audio mixing.
Conversion between sound signal based on above various sound channel standards, based on following several operations:
1, multiplication, is multiplied by a constant value to certain channel data, to this channel data, in the process of linear combination, gives weight;
2, addition, superposes the data of certain several sound channel;
3, displacement, the gain causing in the step of reduction above;
4, saturated, prevent that result from overflowing.
Below provide the example that 5.1 sound channel surround sound audio conversions are changed to dual-channel audio: suppose existing 5.1 sound channel surround sound audio files, storage mode is linear PCM.
Now wish to convert thereof into two-channel linear PCM data.
Suppose that in 5.1 sound channels, L channel data are left, intermediate channel data are center, right data is right, a left side is left_sur around data, the right side is right_sur around data, in the dual-channel audio of output, L channel data are left_sample, and right data is right_sample.Change by the following method.
left_sample=Saturate{[Shift(left×A)+Shift(center×B)+Shift(left_sur×C)]}
right_sample=Saturate{[Shift(right×A)+Shift(center×B)+Shift(right_sur×C)]}
In this formula, A, B, C are multiplication coefficient, are the constant prestoring, and Shift represents that result is shifted by a location number, and Saturate represents that result carries out operated in saturation by certain bit wide.By the method, obtain by the converted stereophony audio frequency of 5.1 sound channel surround sounds.
In common real-time decoding Play System, the channel information of decoded output signal is identical with the side information of compression coding file, even and if have sound channel modular converter also to depend on the software code in system, underaction and configurability are poor.The present invention is when meeting general decoder architecture, output channels control module is provided, output channels is controlled, and due to its configurability, utilize easily hardware directly to realize various conversion, and do not need to write the code of software control, and carry out synchronous arithmetic logical operation and output because it directly utilizes the result of decoding, for SOC (system on a chip), can accomplish real time output data.
Through the retrieval of prior art is found, Chinese Patent Application No. 200580022064.0, open day on June 6th, 2007, recorded a kind of " stereo set and reproduction mode setting method ", the processing and control element (PCE) 11 that this technology comprises microcomputer 1 is controlled demoder 21, with decoding input signal, and obtain the voice format information of input signal.The disposal route of described processing and control element (PCE) 11 based on obtaining voice format information and be invoked in storage unit 12 matrix disposal of storage.Described processing and control element (PCE) 11 obtains coding channel information from input signal further.When described coding sound channel is two-channel, described processing and control element (PCE) 11 control loops so that input signal is carried out to matrix disposal, and are exported multichannel voice around processor 22.
But the prior art can only be for the audio coding standard of the several form setting, and depend on the pattern that audio mode decides reproduction, poor in dirigibility, be unfavorable for the expansion application after new audio standard occurs, and the related sound channel mapping algorithm of this disposal route has only been contained matrix operation, and in present audio algorithm, comprised increasing nonlinear algorithm, therefore can not more there is the reproduction audio frequency of quality.The most important thing is, the audio track transfer algorithm in this disposal route is only comprised of the default algorithm of its storage, can not be configured by user, and therefore, dirigibility has great restriction.To this, a kind of new sound channel converting means has been proposed herein.
Summary of the invention
The present invention is directed to prior art above shortcomings, provide a kind of real-time sound channel to control the audio decoding apparatus of conversion, can directly decoded result be controlled and be converted, obtain the output of expectation.Logic module is simple, and block operations Parallel Implementation is easily pressed in address, realizes rapidly conversion, accomplishes to synchronize with SOC (system on a chip) and can produce delay in real time and not.
The present invention is achieved through the following technical solutions, the present invention includes: sound channel control module, address control unit, arithmetic logic unit and coefficient storage unit, wherein: sound channel control module is connected with address control unit with coefficient storage unit respectively and exports respectively configuration parameter information and original audio information, coefficient storage unit is connected with arithmetic logic unit respectively and output logic parameter and data address with address control unit, and the PCM data of arithmetic logic unit Rcv decoder output are also exported PCM sample value.
Described sound channel control module comprises: sound channel control register and data message register, wherein: the built-in original channel sum of sound channel control register and channel properties thereof and output linearity PCM sound channel sum and channel properties thereof, the bit wide of the built-in PCM data of data message register and the bit wide of PCM sample value, sound channel control register and address control unit, arithmetic logic unit, the configuration information that coefficient storage unit is connected and transmits input and output channel information and convert about sound channel, data message register is connected with address control unit and transmitting audio data bit wide information.
In described sound channel control register, store: the related data that whether adopts decision bit, input and the output channels of default configuration algorithm; This related data comprises: the number of sound channel and the specific object of sound channel, be respectively in order L channel, intermediate channel, R channel etc., the data that corresponding bit is put 1 this sound channel of expression participate in computing, are that 0 expression is not used the data of this sound channel and unnecessary bit to retain.
Described data message register memory contains: the data bit width of the data bit width of input PCM data and output PCM data.
Described address control unit comprises: two address base registers and two group address generation units, wherein: the address, memory block that the first address base register carrying recorded decoding the output of process comprises original channel data message, the first scalar/vector corresponds respectively to the data address of each separate channels of input, the memory buffer of the second address base register record output PCM, terminal device is taken data away from this buffer zone, the second scalar/vector points to is that sound channel after the conversion of choosing in sound channel control register enables corresponding sound channel address, a same interval PCM bit wide between each sound channel initial value, the first address base register be connected with arithmetic logic unit and transmit decoding resultant PCM deposit data address base information, the second address base register is connected with arithmetic logic unit and transmits the address base information of the PCM deposit data after sound channel conversion, the first scalar/vector and sound channel control register, arithmetic logic unit is connected and transmits the address information of the current input of frame PCM data, the second scalar/vector and sound channel control register, arithmetic logic unit is connected and transmits the address information of the current output of frame PCM data.
Described arithmetic logic unit obtains from the first scalar/vector and the second scalar/vector the data address that contains input data address and output data address respectively, and obtain logic parameter from sound channel control register, this arithmetic logic unit is comprised of multiplier, totalizer, shift unit and saturation arithmetic unit, wherein: multiplier, shift unit and the totalizer, the saturation unit that match with number of channels are linked in sequence.
Described coefficient storage unit is built-in: multiplier enables, the multiplication coefficient of each sound channel, shift unit enable, the displacement coefficient of each sound channel, totalizer enable, saturation unit enables, the saturated width of each operation result.
The course of work of the present invention is as follows:
The first step, for different audio coding forms, by demoder, decode and export corresponding each sound channel PCM data sample.User is configured by form sound channel control register, input sound channel sum and the channel type expected, and output channels sum and channel type, and select to adopt the configuration of acquiescence coefficient or the scheme of User Defined placement algorithm.
Second step, address control unit obtain PCM sample value plot from demoder, obtain PCM data bit width and sound channel sum and which sound channel participate in logical operation from sound channel control module, are started to calculate each data address of a frame by the scalar/vector on both sides.
The 3rd step, logical block are obtained input data source address and the data export target address of once-through operation from address control unit.Coefficient storage unit, from sound channel control module acquisition algorithm configuration information, if take acquiescence mode, extracts default algorithm from storage unit, will enable to configure to logical block with coefficient, and the data of appropriate address are carried out exporting after computing.As what take is the mode of User Defined configuration, need user's mode in accordance with regulations one group of vector of pre-stored in coefficient storage unit, with this vector, drive logical block, the data of appropriate address are carried out exporting after computing.
The present invention has the following advantages:
1. the present invention is placed in real-time decoding system, directly decoded result is controlled and is converted, and obtains the output of expectation.Logic module is simple, and block operations Parallel Implementation is easily pressed in address, realizes rapidly conversion, accomplishes to synchronize with SOC (system on a chip) and can produce delay in real time and not.
2. adopt the mode that register is set to carry out administration module, abundant and user interactions, and on output and mapping algorithm, realize configurable.
3. have very high extensibility, only need spreading coefficient memory module and sound channel control register, and the quantity of increase scalar/vector just completes the following more processing of multichannel audio.And by revising the structure of some hardware cell, support following emerging mapping algorithm.
4. support neatly multiple sound channel output, both merely export the data of certain several sound channel, the linear combination of also exporting certain several sound channel, the algorithm that also completes certain function is realized sound channel conversion.Only need to revise register value and do not relate to the control on change software, being easy to realize.
5. this device does not relate to the demoder result of apparatus for processing audio front end, only the result of demoder output is converted, and has wide range of applications, and makes IP easily.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of apparatus for processing audio.
Fig. 2 is sound channel control register schematic diagram.
Fig. 3 is scalar/vector calculated address process schematic diagram.
Fig. 4 is the operational process schematic diagram of arithmetic logic unit and arithmetic element.
Embodiment
Below embodiments of the invention are elaborated, the present embodiment is implemented take technical solution of the present invention under prerequisite, provided detailed embodiment and concrete operating process, but protection scope of the present invention is not limited to following embodiment.
Embodiment
As shown in Figure 3, the audio decoding apparatus that the real-time sound channel of the present embodiment is controlled conversion comprises: sound channel control module 1, address control unit 2, arithmetic logic unit 3 and coefficient storage unit 4, wherein: sound channel control module 1 is connected with address control unit 2 with coefficient storage unit 4 respectively and exports respectively configuration parameter information and original audio information, coefficient storage unit 4 is connected with arithmetic logic unit 3 respectively and output logic parameter and data address with address control unit 2, and the PCM data of arithmetic logic unit 3 Rcv decoder 5 outputs are also exported PCM sample value.
Described sound channel control module 1 comprises: sound channel control register 5 and data message register 6, wherein: the built-in original channel sum of sound channel control register 5 and channel properties thereof and output linearity PCM sound channel sum and channel properties thereof, the bit wide of the built-in PCM data of data message register 6 and the bit wide of PCM sample value, sound channel control register 5 and address control unit 2, arithmetic logic unit 3, the configuration information that coefficient storage unit 4 is connected and transmits input and output channel information and convert about sound channel, data message register 6 is connected with address control unit 2 and transmitting audio data bit wide information.
In described sound channel control register 5, store: the related data that whether adopts decision bit, input and the output channels of default configuration algorithm; This related data comprises: the number of sound channel and the specific object of sound channel, be respectively in order L channel, intermediate channel, R channel etc., the data that corresponding bit is put 1 this sound channel of expression participate in computing, are that 0 expression is not used the data of this sound channel and unnecessary bit to retain.
In described data message register 6, store: the data bit width of the data bit width of input PCM data and output PCM data.
Described address control unit 2 comprises: two address base registers 7, 8 and two group address generation units 9, 10, wherein: the address, memory block that the first address base register 7 carrying recorded decoding the output of process comprise original channel data message, the first scalar/vector 9 corresponds respectively to the data address of each separate channels of input, the memory buffer of the second address base register 8 record output PCM, terminal device is taken data away from this buffer zone, the second scalar/vector 10 points to is that sound channel after the conversion of choosing in sound channel control register 5 enables corresponding sound channel address, a same interval PCM bit wide between each sound channel initial value, the first address base register 7 be connected with arithmetic logic unit 3 and transmit decoding resultant PCM deposit data address base information, the second address base register 8 is connected with arithmetic logic unit 3 and transmits the address base information of the PCM deposit data after sound channel conversion, the first scalar/vector 9 and sound channel control register 5, arithmetic logic unit 3 is connected and transmits the address information of the current input of frame PCM data, the second scalar/vector 10 and sound channel control register 5, arithmetic logic unit 3 is connected and transmits the address information of the current output of frame PCM data.
Described arithmetic logic unit 3 obtains from the first scalar/vector 9 and the second scalar/vector 10 data address that contains input data address and output data address respectively, and obtain logic parameter from sound channel control register 5, this arithmetic logic unit 3 is comprised of multiplier, totalizer, shift unit and saturation arithmetic unit, wherein: multiplier, shift unit and the totalizer, the saturation unit that match with number of channels are linked in sequence.
Described coefficient storage unit 4 is built-in: multiplier enables, the multiplication coefficient of each sound channel, shift unit enable, the displacement coefficient of each sound channel, totalizer enable, saturation unit enables, the saturated width of each operation result.
When sound channel control register 5 is set up and after data message register 612 obtained the bit wide of PCM data, scalar/vector 8 will participate in the address of the PCM data that sound channel changes according to above Information generation.Sound channel before the conversion of choosing in sound channel control register 5 will enable the first corresponding scalar/vector 9, the initial value of address enable unit each other be spaced apart 1 PCM bit wide, by the situation that enables to choose, sequentially arrange, sum equals the input sound channel sum in sound channel control register 5.After every secondary data output computing, the address of each scalar/vector 8 will be updated, and the method for renewal is forward direction sequential addressing input sound channel sum * PCM data bit width unit;
When participating in the value of the first scalar/vector 9 of computing and crossed the address boundary of storage area, and real-time decoding still continuing, and returns to the position of its initial value, repeats this process.The memory buffer of the second address base register 8 record output PCM, terminal device is taken data away from this buffer zone.The second scalar/vector 10 points to is that sound channel after the conversion of choosing in sound channel control register 5 enables corresponding sound channel address, same 1, interval PCM bit wide between each sound channel initial value, output channels number * PCM bit wide unit after upper one group of Data Update in forward direction sequential addressing sound channel control register 5, when the address of the first scalar/vector 9 records runs off the border of output buffer, and decoding is still continuing, just return to its initial position, then repeat this process.The process of the first scalar/vector 9 calculated addresses is with reference to figure 3.
Described arithmetic logic unit 3 is obtained input data address from the first scalar/vector 9, from the second scalar/vector 10, obtains output data address, and controls which signal participation transform operation by sound channel control register 5.
Arithmetic logic unit 3 comprises multiplier, totalizer, and shift unit, saturation arithmetic unit, these 4 unit all, according to being that default algorithm or the algorithm being again written into provide coefficient by coefficient storage unit 4, have logic control element to carry out the execution of steering logic computing simultaneously.This process is with reference to figure 4.
The described required logic parameter of coefficient storage unit 4 stored logic arithmetic element 3, those parameters will participate in the input/output signal number that computing recorded by sound channel control register 5 and be determined, from sound channel control register 5, obtain the information whether configuring simultaneously, by user, by specified format, at first, deposited in the coefficient that coefficient replaces original algorithm, realize the function of configurable conversion coefficient, concrete method is:
According to the number of input sound channel and output channels, form a vector, carry out the dimension of control inputs output, for the required parameter of each arithmetic logic unit 3, as the displacement coefficient of the multiplication constant of multiplier, shift unit, the saturated bit wide of saturation unit etc.The form of storage unit is according to the form storage of first cell enable, rear unit coefficient.Enabling and coefficient vector of one group of acquiescence stored respectively by various input and output dimension in coefficient storage unit 4, the adaptation of carrying out logical operation by this acquiescence vector in the situation that user does not configure voluntarily, when user wishes to provide output by the algorithm of oneself, by this form, deposit some groups of vectors in.
As the music of CD disc is decoded and produced stereophony, only wish now to export in real time left channel signals, accompaniment music, arranges so as follows.Obviously, input and output dimension is 2,1, need to use multiplier, it is 1,1 that multiplier enables with coefficient, 0, the output of multiplier is exactly L channel, and shift unit, totalizer and saturation unit all do not enable, be set to 0, x, x, x is indifferent numerical value,, after logical operation, demoder output directly becomes from stereophony the monophonic audio that only has accompaniment L channel.
Real-time decoding device need to carry out real-time decoding to the 5.1 sound channel surround sounds of AC3, because playback equipment hardware resource is not enough, only support the broadcasting of stereo audio, for obtaining the real-time broadcasting of optimum efficiency tonequality, to the linear PCM of demoder output, directly adopt AC3down mix algorithm by the mixed two-channel of being down to of multichannel data, playing the end stereo audio of each frame of output in real time.
First, press the sound channel of format configuration shown in Fig. 2 control register 5, the algorithm that needs application oneself configuration, this bit is assigned as 1, and input sound channel number is 6, and what need to participate in computing is 5 sound channels, L channel, intermediate channel, R channel, left around, right around, the flag bit assignment of these 5 sound channels is 1, and subwoofer sound channel is 0, and input sound channel number is 3 ' b101.Output channels number is 2, is respectively L channel and R channel, and its corresponding bit is 1, and all the other sound channel corresponding bit are 0, and input sound channel number is 2 ' b10.The instruction that utilizes audio process to this register according to above explanation assignment.
Demoder has entered intermediate storage region to the resulting 5.1 sound channel PCM data of AC3 audio decoder, the plot of supposing this region is 0x10000, according to the structure of demoder, data message register 6 is recorded the bit wide of PCM data, be assumed to be 64 bits, hypothesis decoding device once only transmits a frame to decoded result, and the size in intermediate storage region is set to 0x1C000.The linear PCM of 5.1 sound channels is stored as sequential storage, the address base register 7 of input end is set to 0x10000 so, there are 5 scalar/vectors 8 to start to calculate the address date of each computing, might as well suppose that scalar/vector 81 records the address of L channel data, scalar/vector 82 records the address of intermediate channel data, scalar/vector 83 records the address of right data, scalar/vector 84 records the address of left surround channel data, and scalar/vector 85 records the address of right surround channel data.The initial value of scalar/vector 81 is 0x10000 so, the initial value of scalar/vector 82 is the PCM bit wide that 0x10000 adds 1 unit, be 0x10008, the initial value of scalar/vector 83 is 0x10010, the initial value of scalar/vector 84 is 0x10018, and the initial value of scalar/vector 85 is 0x10020.The address base of output terminal is assumed to be 0x20000, the storage format of two-channel linear PCM is sequential storage, there are two scalar/vectors 8 to start to calculate the address date of each computing, what might as well establish scalar/vector 86 calculating is the address of output L channel data, the initial value of scalar/vector 86 is 0x20000 so, what scalar/vector 87 recorded is the address of output right data, and the initial value of scalar/vector 87 is 0x20002 so.
By the down mix algorithm of AC3 by providing below pseudo-code:
left_out=Saturate{Shift_Scale{Shift_Twid[(left)*DOWNMIX_FACTOR]+Shift_Twid[(center)*LUTS_PARAM]+Shift_Twid[(left_sur)*LUTC_PARAM]}}
right_out=Saturate{Shift_Scale{Shift_Twid[(right)*DOWNMIX_FACTOR]+Shift_Twid[(center)*LUTS_PARAM+Shift_Twid(right_sur)*LUTC_PARAM]}}
In example, left_out, right_out are L channel data and the right data of output two-channel, and left, center, right, left_sur, right_sur input respectively L channel data, intermediate channel data, right data, left surround channel data and the right surround channel data of 5.1 sound channels.DOWNMIX_FACTOR, LUTS_PARAM, LUTC_PARAM are respectively and take advantage of property coefficient, by coefficient storage unit 4, provided, Shift_Sclae and Shift_Twid are respectively according to Scale width and Twid width and are shifted, and this displacement width equally can be by 4 storages of coefficient storage unit.Saturate is the operated in saturation to result, and saturated width is by 4 storages of coefficient storage unit.
Two groups of initial vectors of existing storage are to coefficient storage unit 4, primary vector is for calculating the value of output L channel, and it is 1 that multiplier enables, and coefficient is respectively L channel coefficient, DOWNMIX_FACTOR, in the present embodiment, be 0x3504, intermediate channel coefficient LUTS_PARAM, is 0x257a in the present embodiment, R channel coefficient is 0, left surround channel coefficient is LUTC_PARAM, is 0x1a82 in the present embodiment, and right surround channel coefficient is 0.It is 1 that shift unit enables, and each sound channel displacement coefficient is Twid, is 15 in the present embodiment.It is 1 that totalizer enables, and addition results displacement, for Scale, is 15 in the present embodiment, and it is 1 that saturation unit enables, and saturated width is output PCM sample value width 16.Second group of vector is for calculating the value of output R channel, it is 1 that multiplier enables, it is 0 that coefficient is respectively L channel coefficient, intermediate channel coefficient LUTS_PARAM, in the present embodiment, be 0x257a, R channel coefficient is DOWNMIX_FACTOR, in the present embodiment, be 0x3504, doing surround channel coefficient is 0, right surround channel coefficient is LUTC_PARAM, in the present embodiment, be 0x1a82, it is 1 that shift unit enables, each sound channel displacement coefficient is Twid, in the present embodiment, be 15, it is 1 that totalizer enables, addition results displacement is Scale, in the present embodiment, be 15, it is 1 that saturation unit enables, saturated width is output PCM sample value 16.
Address control unit 2 is to the address of arithmetic logic unit 3 output function data, by the indicated input sound channel of sound channel control register 5, the address of L channel, intermediate channel, R channel, left surround channel and right surround channel is by the related operation that enters arithmetic logic unit 3 and export, the coefficient of each arithmetic logic unit 3 provides for two groups of initial vectors that deposit in, after arithmetic logic unit 3, the two-channel PCM sample value of 16 bit bit wides just produces.Left and right acoustic channels data deposit respectively the indicated address of OPADD generation unit 8 in order in.
The scalar/vector 8 of input end continues to calculate next addresses, according to rule, next L channel address, be that the address of recording 81 last times of scalar/vector adds that the input sound channel sum in sound channel control register 5 is multiplied by input PCM bit wide, be 0x10000+6 * 0x8, for 0x100, the recording address of scalar/vector 82 is 0x10038, the recording address of scalar/vector 83 is 0x100, the recording address of scalar/vector 84 is 0x10048, and the recording address of scalar/vector 85 is 0x10050.Output terminal scalar/vector 8 also starts to calculate the address of next group output, the address that the OPADD of location generation unit 86 is this unit last time by rule adds that the output channels sum in sound channel control register 5 is multiplied by output PCM bit wide, be 0x20000+2 * 0x2, for 0x20004, the OPADD of scalar/vector 87 is 0x20006.By the address logic arithmetic element 3 refreshing, carry out next group computing, produce second group of PCM sample value.
When the content of a frame completes, the calculated address of scalar/vector 8 will exceed border, memory block, as the address of recording the scalar/vector 81 of L channel data address will reach 0x1c000, just reach between limit, mean ED, now, by accepting the next frame settling signal of demoder, return to the address to the relevant first record of plot, be 0x10000, the class of operation of remaining scalar/vector 8 seemingly.
So just synchronize with demoder and export in real time dual-channel audio to the terminal equipment of raising one's voice.5.1 sound channel AC3 audio frequency, after decoding, are directly produced to stereophony to the terminal device plays of raising one's voice.
Through technological improvement of the present invention, adopted after sound channel control module 1 of the present invention, the sound channel of any dimension can be converted according to user configured method, convenient management, and mode and the feasibility of conversion are not restricted by audio coding form and feasibility, because of for to be formed by hardware cell, also irrelevant with upper application software.Meanwhile, logical block provided by the invention has contained matrix operation and nonlinear operation, and better more perfect support can be provided mapping algorithm now, makes the sound quality after conversion better.

Claims (5)

1. a real-time sound channel is controlled the audio decoding apparatus of changing, it is characterized in that, comprise: sound channel control module, address control unit, arithmetic logic unit and coefficient storage unit, wherein: sound channel control module is connected with address control unit with coefficient storage unit respectively and exports respectively configuration parameter information and original audio information, coefficient storage unit is connected with arithmetic logic unit respectively and output logic parameter and data address with address control unit, and the PCM data of arithmetic logic unit Rcv decoder output are also exported PCM sample value;
Described sound channel control module comprises: sound channel control register and data message register, wherein: the built-in original channel sum of sound channel control register and channel properties thereof and output linearity PCM sound channel sum and channel properties thereof, the bit wide of the built-in PCM data of data message register and the bit wide of PCM sample value, sound channel control register and address control unit, arithmetic logic unit, the configuration information that coefficient storage unit is connected and transmits input and output channel information and convert about sound channel, data message register is connected with address control unit and transmitting audio data bit wide information,
Described address control unit comprises: two address base registers and two group address generation units, wherein: the address, memory block that the first address base register carrying recorded decoding the output of process comprises original channel data message, the first scalar/vector corresponds respectively to the data address of each separate channels of input, the memory buffer of the second address base register record output PCM, terminal device is taken data away from this buffer zone, the second scalar/vector points to is that sound channel after the conversion of choosing in sound channel control register enables corresponding sound channel address, a same interval PCM bit wide between each sound channel initial value, the first address base register be connected with arithmetic logic unit and transmit decoding resultant PCM deposit data address base information, the second address base register is connected with arithmetic logic unit and transmits the address base information of the PCM deposit data after sound channel conversion, the first scalar/vector and sound channel control register, arithmetic logic unit is connected and transmits the address information of the current input of frame PCM data, the second scalar/vector and sound channel control register, arithmetic logic unit is connected and transmits the address information of the current output of frame PCM data.
2. real-time sound channel according to claim 1 is controlled the audio decoding apparatus of conversion, it is characterized in that, stores: the related data that whether adopts decision bit, input and the output channels of default configuration algorithm in described sound channel control register; This related data comprises: the number of sound channel and the specific object of sound channel, be respectively in order L channel, intermediate channel, R channel, the data that corresponding bit is put 1 this sound channel of expression participate in computing, are that 0 expression is not used the data of this sound channel and unnecessary bit to retain.
3. real-time sound channel according to claim 1 is controlled the audio decoding apparatus of conversion, it is characterized in that, described data message register memory contains: the data bit width of the data bit width of input PCM data and output PCM data.
4. real-time sound channel according to claim 1 is controlled the audio decoding apparatus of conversion, it is characterized in that, described arithmetic logic unit obtains from the first scalar/vector and the second scalar/vector the data address that contains input data address and output data address respectively, and obtain logic parameter from sound channel control register, this arithmetic logic unit is comprised of multiplier, totalizer, shift unit and saturation arithmetic unit, wherein: the multiplier matching with number of channels, shift unit and totalizer, saturation arithmetic sequence of unit are connected.
5. real-time sound channel according to claim 1 is controlled the audio decoding apparatus of conversion, it is characterized in that, described coefficient storage unit is built-in: multiplier enables, the multiplication coefficient of each sound channel, shift unit enable, the displacement coefficient of each sound channel, totalizer enable, the saturated width of saturation arithmetic cell enable, each operation result.
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