CN102751992A - Dynamic element matching coding method - Google Patents
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- CN102751992A CN102751992A CN2012102543395A CN201210254339A CN102751992A CN 102751992 A CN102751992 A CN 102751992A CN 2012102543395 A CN2012102543395 A CN 2012102543395A CN 201210254339 A CN201210254339 A CN 201210254339A CN 102751992 A CN102751992 A CN 102751992A
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Abstract
The invention relates to the technical field of dynamic element matching coding technology and discloses a dynamic element matching coding method. The dynamic element matching coding method comprises the steps of: S1, inputting a digital signal; S2, dividing the digital signal into two parts L and R, setting a pointer pointing towards each element in the digital signal, and performing dynamic element matching coding on the L and the R respectively by utilizing the arranged pointer; and outputting M1 elements from C1 to CM1 corresponding to the L and M-M2+1 elements from CM2 to CM corresponding to the R, wherein the M, the M1 and the M2 are positive integers; and M1 is a number obtained through truncation and rounding-up of M/2. The dynamic element matching coding method, disclosed by the invention, has the advantage of reducing a switch jump variable of each sampling period while converting distortion caused by mismatching into noise.
Description
Technical field
The present invention relates to dynamic element coupling coding techniques field, particularly relate to the coding method of a kind of dynamic element coupling.
Background technology
Along with the continuous progress of CMOS technology, the characteristic size scaled down, comparatively remarkable from the random mismatch of technology manufacture process, the coupling between the current source becomes a bottleneck that promotes current steer type DAC (digital to analog converter) linearity and resolution.Dynamic element coupling (Dynamic Element Matching) is through select the current source combination of output randomly; The harmonic energy relevant with input signal is converted into and the irrelevant white noise of input signal, thereby can under the situation that has bigger mismatch to exist, realizes higher linearity; Through adopting digital circuit to realize the process of dynamic random; The adjustment that need not feed back; Higher operating rate can be realized and SFDR (Spurious Free Dynamic range can be realized; SFDR) irrelevant basically with the frequency of input signal, thus the system linearity degree effectively improved, thereby be widely used among the ADC (analog to digital converter) and DAC of various structures.Fig. 1 is the fundamental diagram of the traditional DAC that comprises the DEM module.As shown in Figure 1; Behind the numeral input process DEM module coding of DAC; Export M digit order number (C1 is to CM among Fig. 1); A said M digit order number converts M son simulation output (y1 is to yM among Fig. 1) into through one 1 seat DAC respectively, said M the synthetic final simulation output (y among Fig. 1) of son simulation output.
Yet traditional DEM coding method meeting sharply increases the switch number of per sampling period saltus step, and too much switch saltus step meeting causes bigger dynamic error,, clock feedthrough asynchronous etc. like the switch saltus step, and this also can influence the performance of system.
Summary of the invention
The technical problem that (one) will solve
The technical problem that the present invention will solve is: how the coding method of a kind of dynamic element coupling is provided, so that when the distortion that mismatch is caused converts noise into, reduces the switch number of transitions in each sampling period.
(2) technical scheme
In order to solve the problems of the technologies described above, the present invention provides the coding method of a kind of dynamic element coupling, may further comprise the steps:
S1, supplied with digital signal;
S2, said digital signal is divided into two parts L and R, the pointer that points to each element in the said digital signal is set, and utilize set pointer that L and R are carried out dynamic element coupling coding, export M1 Elements C corresponding to L
1To C
M1And corresponding to M-M2+1 the Elements C of R
M2To C
M, wherein M, M1, M2 are positive integer, and M1 carries out truncation to M/2 to round the number that obtains i.e. M1=fix (M/2), and M2=M1+1.
Preferably, after step S2, also comprise step:
S3, respectively to Elements C
1To C
MCarry out digital-to-analogue conversion;
M the element that obtains after the conversion of S4, logarithmic mode synthesizes and obtains dateout.
Preferably, utilize current steer type DAC to carry out said digital-to-analogue conversion among the step S3.
Preferably, utilize adder that M element added up among the step S4 and obtain dateout.
Preferably, step S2 is specially:
Execution in step T000 ~ the T300 of elder generation:
T000 is divided into two data L [1] and R [1], L [1]=fix (x [1]/2), R [1]=x [1]-L [1] with the period 1 signal x [1] of said digital signal; The initial value of setting pointer Pstart_L is 1, and the initial value of setting pointer Pend_L is L [1]; The initial value of setting pointer Pstart_R is M2; The initial value of setting pointer Pend_R is R [1]+M2-1; Pointer Pstart_L for point to digital signal L in encoder the head pointer of element; Pointer Pend_L is for pointing to the tail pointer of digital signal L institute element in encoder, and pointer Pstart_R is for pointing to the head pointer of digital signal R institute element in encoder, pointer Pend_R be sensing digital signal R in encoder the tail pointer of element;
Whether T100, the n periodic signal x [n] that judges said digital signal are 0 or M, n>1; If x [n] equals 0 or M, then setting said pointer Pstart_L is rp_L [n], the random number of rp_L [n] expression 1 ~ M1, and setting Pend_L is Pstart_L-1; Setting Pstart_R is rp_R [n], the random number of rp_R [n] expression M2 ~ M, and setting Pend_R is Pstart_R-1; And output C when x [n] is 0
1To C
MFor complete 0, as x [n] output C during for M
1To C
MBe complete 1; Otherwise execution in step T200;
T200; Judge the relation of n periodic signal x [n] Yu the n-1 periodic signal x [n-1] of said digital signal, n>1, if x [n] equals x [n-1]; Then keep the output result of step T100 constant, and keep the value of pointer Pstart_L, Pend_L, Pstart_R and Pend_R constant; Otherwise, carry out T300;
T300 is divided into two parts L [n] and R [n] with the n periodic signal x [n] of said digital signal, L [n]=fix (x [n]/2) wherein, R [n]=x [n]-L [n];
Execution in step R100 ~ the R500 of execution in step L100 ~ L500, and while then:
L100 judges that whether digital signal L [n] is 0 or M1, if L [n] equals 0 or M1, then setting pointer Pstart_L is rp_L [n], and Pend_L is Pstart_L-1; And export C when equaling 0 as L [n]
1~ C
M1For complete 0, when L [n] exports C when equaling M1
1~ C
M1Be complete 1; Otherwise, carry out L200;
L200, the magnitude relationship of judgement digital signal L [n] and L [n-1] is if L [n] equals L [n-1], then execution in step L300; If L [n] is greater than L [n-1], then execution in step L400; If L [n] is less than L [n-1], then execution in step L500;
L300 keeps output C
1~ C
M1Constant, and keep the value of pointer Pstart_L and pointer Pend_L constant;
L400 is to output C
1~ C
M1Carry out first set operation, and correspondingly revise the value of pointer Pend_L;
L500 is to output C
1~ C
M1Carry out second set operation, and correspondingly revise the value of said pointer Pstart_L;
R100 judges that whether digital signal R [n] is 0 or M-M1, if R [n] equals 0 or M-M1, then setting said pointer Pstart_R is rp_R [n], and setting Pend_R is Pstart_R-1; And export C when equaling 0 as R [n]
M2~ C
MFor complete 0, when R [n] exports C when equaling M-M1
M2~ C
MBe complete 1; Otherwise, carry out R200;
R200, the relation of judgement digital signal R [n] and R [n-1] if R [n] equals R [n-1], is then carried out R300; If R [n] then carries out R400 greater than R [n-1]; If R [n] then carries out R500 less than R [n-1];
R300 keeps output C
M2~ C
MConstant, keep the value of pointer Pstart_R and pointer Pend_R constant;
R400 is to output C
M2~ C
MCarry out first set operation, and correspondingly revise the value of said pointer Pend_R;
R500 is to output C
M2~ C
MCarry out second set operation, and correspondingly revise the value of said pointer Pstart_R.
Preferably, step L400 is specially: if Pstart_L+L [n]-1 is not more than output C
1~ C
M1Figure place M1, then carry out L401; Otherwise, carry out L402;
L401 will export C
1~ C
M1In, the element corresponding from the value of said pointer Pstart_L is 1 to the corresponding equal set of element of the value of Pstart_L+L [n]-1, is 0 with the equal set of other element, the value of revising said pointer Pend_L then is Pstart_L+L [n]-1;
L402 will export C
1~ C
M1In; The element corresponding from the value of said pointer Pstart_L is 1 to the corresponding equal set of element of M1; The corresponding equal set of element of value from the 1st to Pstart_L+L [n]-1-M1 is 1, and other element set are 0, and the value of revising said pointer Pend_L then is Pstart_L+L [n]-1-M1.
Preferably, step L500 is specially: if Pend_L-L [n]+1 is not less than 1, then carry out L501; Otherwise, carry out L502;
L501 will export C
1~ C
M1In, the element corresponding from the value of said pointer Pend_L-L [n]+1 is 1 to the corresponding equal set of element of the value of Pend_L, and other element set are 0, and the value of revising said pointer Pstart_L then is Pend_L-L [n]+1;
L502 will export C
1~ C
M1In; The corresponding equal set of element of value from the 1st to said pointer Pend_L is 1; The element corresponding from the value of Pend_L-L [n]+1+M1 is 1 to the corresponding equal set of element of M1, and other element set are 0, and the value of revising said pointer Pstar_L then is Pend_L-L [n]+1+M1.
Preferably, step R400 is specially: if Pstart_R+R [n]-1 is not more than output C
M2~ C
MFigure place M, then carry out R401; Otherwise, carry out R402;
R401 will export C
M2~ C
MIn, the element corresponding from the value of said pointer Pstart_R is 1 to the corresponding equal set of numerical digit of the value of Pstart_R+R [n]-1, and other element set are 0, and the value of revising said pointer Pend_R then is Pstart_R+R [n]-1;
R402 will export C
M2~ C
MIn; The element corresponding from the value of said pointer Pstart_R is 1 to the corresponding equal set of element of M; The corresponding equal set of element of the value of [n]-1-M+M1 is 1 from the M2 position to Pstart_R+R, and other element set are 0, and the value of revising said pointer Pend_R then is Pstart_R+R [n]-1-M+M1.
Preferably, step R500 is specially: if Pend_R-R [n]+1 is not less than M2, carry out R501; Otherwise, carry out R502;
R501 will export C
M2~ C
MIn, the element corresponding from the value of said pointer Pend_R-R [n]+1 is 1 to the corresponding equal set of element of the value of Pend_R, and other element set are 0, and the value of revising said pointer Pstart_R then is Pend_R-R [n]+1;
R502; In element; The corresponding equal set of element of value from the M2 position to said pointer Pend_R is 1; The element corresponding from the value of Pend_R-R [n]+1+M-M1 is 1 to the corresponding equal set of element of M, and other element set are 0, and the value of revising said pointer Pstart_R then is Pend_R-R [n]+1+M-M1.
Preferably, among step T100 and the step L100, after the value of revising said pointer Pstart_L was rpL [n], if Pstart_L is 1, the value of then revising said pointer Pend_L was M1; Among step T100 and the step R100, after the value of revising said pointer Pstart_R was rp_R [n], if Pstart_R is M2, the value of then revising said pointer Pend_R was M.
(3) beneficial effect
Technique scheme has following advantage: the DEM coding method of the DAC of being used for of the present invention; The output of its DEM module has better randomness; Be divided into two independent parts L and R simultaneously and handle, can convert the distortion that mismatch causes into noise, simultaneously; Effectively reduce weekly phase saltus step switch number, thereby effectively reduced the dynamic error that the switch saltus step causes.
Description of drawings
Fig. 1 is the fundamental diagram of the traditional DAC that comprises the DEM module;
Fig. 2 is a fundamental diagram of the present invention;
Fig. 3 is a method overview flow chart of the present invention;
Fig. 4 is the cataloged procedure sketch map of the DEM coding method that is used for current steer DAC of the embodiment of the invention;
Fig. 5 a and Fig. 5 b are the circuit static characteristic figure of DAC that adopts the DEM coding method that is used for current steer DAC of the embodiment of the invention;
Fig. 6 is the SFDR performance plot that adopts the DAC of the said DEM coding method that is used for current steer DAC of the embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing and embodiment, specific embodiments of the invention describes in further detail.Following examples are used to explain the present invention, but are not used for limiting scope of the present invention.
Below according to Fig. 4, and referring to figs. 2 and 3 the method flow of the explanation embodiment of the invention:
The numeral of current steer DAC is input as x [1]=5 during the 1st cycle, is divided into L [1]=2, R [1]=3.The initial value of setting pointer Pstart_L is 1, and the initial value of setting pointer Pend_L is 2; The initial value of setting pointer Pstart_L is 4, and the initial value of setting pointer Pend_L is 6.
During the 2nd cycle the numeral of said current steer DAC be input as 7 equal said DEM module output figure place (for DEM module left half among Fig. 2 and DEM module right half are exported the figure place sum) M=7, be divided into L [2]=3, R [2]=4; The value of revising said pointer Pstarrt_L is 2 (random numbers of generation), and the value of Pend_L is 1; The value of revising said pointer Pstart_R is 6 (random numbers of generation), and the value of Pend_R is 5.
The numeral of said current steer DAC is input as 4 during the 3rd cycle, is divided into L [3]=2, R [3]=2; L [3] L [2], and Pend_L-L [3]+1=0, and less than 1, the 1st bit is that 1, the 3 bit is 1 in the output of then said DEM module left half, and remaining the 2nd bit is 0, and the value of revising said pointer Pstart_L is 3; R [3] R [2], and Pend_R-R [3]+1=4 equal 4, and the 4th is 1 to the 5th bit in the output of the right half of then said DEM module, remaining from the 6th be 0 to the 7th bit, the value of revising said pointer Pstart_R is 4.
The numeral of said current steer DAC is input as 2 during the 4th cycle, is divided into L [4]=1, R [4]=1; < L [3], and Pend_L-L [4]+1=1 equal 1 to L [4], and the 1st bit is 1 in the output of then said DEM module left half, and remaining the 2nd is 0 to the 3rd bit, and the value of revising said pointer Pstart_L is 1; R [4] R [3], and Pend_R-R [3]+1=5, and greater than 4, the 5th bit is 1 in the output of the right half of then said DEM module, and remaining the 4th, 6,7 bit are 0, and the value of revising said pointer Pstart_R is 5.
The numeral of said current steer DAC is input as 6 during the 5th cycle, is divided into L [5]=3, R [5]=3; L [5] equals the output figure place M1=3 of said DEM module left half, and the value of then revising said pointer Pstart_L is 3 (random numbers of generation), and the value of Pend_L is 2; R [5]>R [4], and Pstart_R+R [5]-1=7, equaling 7, the 5th is 1 to the 7th bit in the right half output of then said DEM module, and remaining the 4th bit is 0, and the value of revising said pointer Pend_R is 7.
The numeral of said current steer DAC is input as 1 during the 6th cycle, is divided into L [6]=0, R [6]=1; L [6] equals 0, and the value of then revising said pointer Pstart_L is 1 (random number of generation), and the value of Pend_L is 3; R [6] R [5], and Pend_R-R [6]+1=7, and greater than 4, the 7th bit is 1 in the output of the right half of then said DEM module, and remaining the 4th is 0 to the 6th bit, and the value of revising said pointer Pstart_R is 7.
The numeral of said current steer DAC is input as 3 during the 7th cycle, is divided into L [7]=1, R [7]=2; L [7]>L [6], and Pstart_L+L [7]-1=1 is less than M1, and the 1st bit is 1 in the then said DEM module left half output, and remaining the 2nd is 0 to the 3rd bit, and the value of revising said pointer Pend_L is 1; R [7]>R [6], and Pstart_R+R [7]-1=8, greater than 7, the 7th bit is that 1, the 4 bit is 1 in the output of the right half of then said DEM module, and remaining the 5th is 0 to the 6th bit, and the value of revising said pointer Pend_R is 4.
The numeral of said current steer DAC is input as 5 during the 8th cycle, is divided into L [8]=2, R [8]=3; L [8]>L [7], and Pstart_L+L [8]-1=2 is less than M1, and the 1st is 1 to the 2nd bit in the then said DEM module left half output, and remaining the 3rd bit is 0, and the value of revising said pointer Pend_L is 2; R [8]>R [7], and Pstart_R+R [7]-1=9, greater than 7, to be 1, the 4 be 1 to the 5th bit to the 7th bit in the output of the right half of then said DEM module, and remaining the 6th bit is 0, and the value of revising said pointer Pend_R is 5.
Through the static mismatch of Matlab modeling and simulating current source to 6 DAC Effect on Performance.Fig. 5 a and Fig. 5 b are the circuit static characteristic figure that adopts the DAC of the said DEM coding method that is used for current steer DAC of the embodiment of the invention.The current source standard deviation is changed to 10%; Emulation 20000 times draws the static characteristic of the DAC that adopts the said DEM coding method that is used for current steer DAC of the embodiment of the invention, wherein; Left part is the integral nonlinearity distribution histogram, and right part is the DNL distribution histogram.
Fig. 6 is the SFDR performance plot that adopts the DAC of the said DEM coding method that is used for current steer DAC of the embodiment of the invention.Sample frequency is made as 300MHz, the SFDR characteristic the when incoming frequency that emulation draws the DAC that adopts the said DEM coding method that is used for current steer DAC of the embodiment of the invention is 50MHz.
Above-mentioned simulation result shows that the said DEM coding method that is used for current steer DAC of the embodiment of the invention not only has good static characteristic, and good SFDR characteristic is all arranged under different incoming frequencies simultaneously.And the said DEM coding method that is used for current steer DAC of the embodiment of the invention has effectively reduced weekly phase saltus step switch number, thereby has effectively reduced the dynamic error that the switch saltus step causes; Output has certain randomness, can convert the distortion that mismatch causes into noise.
The above only is a preferred implementation of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from know-why of the present invention; Can also make some improvement and replacement, these improvement and replacement also should be regarded as protection scope of the present invention.
Claims (10)
1. dynamic element coupling coding method is characterized in that, may further comprise the steps:
S1, supplied with digital signal;
S2, said digital signal is divided into two parts L and R, the pointer that points to each element in the said digital signal is set, and utilize set pointer that L and R are carried out dynamic element coupling coding, export M1 Elements C corresponding to L
1To C
M1And corresponding to M-M2+1 the Elements C of R
M2To C
M, wherein M, M1, M2 are positive integer, and M1 carries out truncation to M/2 to round the number that obtains i.e. M1=fix (M/2), and M2=M1+1.
2. the method for claim 1 is characterized in that, after step S2, also comprises step:
S3, respectively to Elements C
1To C
MCarry out digital-to-analogue conversion;
M the element that obtains after the conversion of S4, logarithmic mode synthesizes and obtains dateout.
3. method as claimed in claim 2 is characterized in that, utilizes current steer type DAC to carry out said digital-to-analogue conversion among the step S3.
4. method as claimed in claim 2 is characterized in that, utilizes adder that M element added up among the step S4 and obtains dateout.
5. like each described method in the claim 1 ~ 4, it is characterized in that step S2 is specially:
Execution in step T000 ~ the T300 of elder generation:
T000 is divided into two data L [1] and R [1], L [1]=fix (x [1]/2), R [1]=x [1]-L [1] with the period 1 signal x [1] of said digital signal; The initial value of setting pointer Pstart_L is 1, and the initial value of setting pointer Pend_L is L [1]; The initial value of setting pointer Pstart_R is M2; The initial value of setting pointer Pend_R is R [1]+M2-1; Pointer Pstart_L is for pointing to the head pointer of element among the digital signal L; Pointer Pend_L is for pointing to the tail pointer of element among the digital signal L, and pointer Pstart_R is for pointing to the head pointer of element among the digital signal R, and pointer Pend_R is for pointing to the tail pointer of element among the digital signal R;
Whether T100, the n periodic signal x [n] that judges said digital signal are 0 or M, n>1; If x [n] equals 0 or M, then setting said pointer Pstart_L is rp_L [n], the random number of rp_L [n] expression 1 ~ M1, and setting Pend_L is Pstart_L-1; Setting Pstart_R is rp_R [n], the random number of rpR [n] expression M2 ~ M, and setting Pend_R is Pstart_R-1; And output C when x [n] is 0
1To C
MFor complete 0, as x [n] output C during for M
1To C
MBe complete 1; Otherwise execution in step T200;
T200; Judge the relation of n periodic signal x [n] Yu the n-1 periodic signal x [n-1] of said digital signal, n>1, if x [n] equals x [n-1]; Then keep the output result of step T100 constant, and keep the value of pointer Pstart_L, Pend_L, Pstart_R and Pend_R constant; Otherwise, carry out T300;
T300 is divided into two parts L [n] and R [n] with the n periodic signal x [n] of said digital signal, L [n]=fix (x [n]/2) wherein, R [n]=x [n]-L [n];
Execution in step R100 ~ the R500 of execution in step L100 ~ L500, and while then:
L100 judges that whether digital signal L [n] is 0 or M1, if L [n] equals 0 or M1, then setting pointer Pstart_L is rp_L [n], and Pend_L is Pstart_L-1; And export C when equaling 0 as L [n]
1~ C
M1For complete 0, when L [n] exports C when equaling M1
1~ C
M1Be complete 1; Otherwise, carry out L200;
L200, the magnitude relationship of judgement digital signal L [n] and L [n-1] is if L [n] equals L [n-1], then execution in step L300; If L [n] is greater than L [n-1], then execution in step L400; If L [n] is less than L [n-1], then execution in step L500;
L300 keeps output C
1~ C
M1Constant, and keep the value of pointer Pstart_L and pointer Pend_L constant;
L400 is to output C
1~ C
M1Carry out first set operation, and correspondingly revise the value of pointer Pend_L;
L500 is to output C
1~ C
M1Carry out second set operation, and correspondingly revise the value of said pointer Pstart_L;
R100 judges that whether digital signal R [n] is 0 or M-M1, if R [n] equals 0 or M-M1, then setting said pointer Pstart_R is rp_R [n], and setting Pend_R is Pstart_R-1; And export C when equaling 0 as R [n]
M2~ C
MFor complete 0, when R [n] exports C when equaling M-M1
M2~ C
MBe complete 1; Otherwise, carry out R200;
R200, the relation of judgement digital signal R [n] and R [n-1] if R [n] equals R [n-1], is then carried out R300; If R [n] then carries out R400 greater than R [n-1]; If R [n] then carries out R500 less than R [n-1];
R300 keeps output C
M2~ C
MConstant, keep the value of pointer Pstart_R and pointer Pend_R constant;
R400 is to output C
M2~ C
MCarry out first set operation, and correspondingly revise the value of said pointer Pend_R;
R500 is to output C
M2~ C
MCarry out second set operation, and correspondingly revise the value of said pointer Pstart_R.
6. method as claimed in claim 5 is characterized in that step L400 is specially: if Pstart_L+L [n]-1 is not more than output C
1~ C
M1Figure place M1, then carry out L401; Otherwise, carry out L402;
L401 will export C
1~ C
M1In, the element corresponding from the value of said pointer Pstart_L is 1 to the corresponding equal set of element of the value of Pstart_L+L [n]-1, is 0 with the equal set of other element, the value of revising said pointer Pend_L then is Pstart_L+L [n]-1;
L402 will export C
1~ C
M1In; The element corresponding from the value of said pointer Pstart_L is 1 to the corresponding equal set of element of M1; The corresponding equal set of element of value from the 1st to Pstart_L+L [n]-1-M1 is 1, and other element set are 0, and the value of revising said pointer Pend_L then is Pstart_L+L [n]-1-M1.
7. method as claimed in claim 6 is characterized in that step L500 is specially: if Pend_L-L [n]+1 is not less than 1, then carry out L501; Otherwise, carry out L502;
L501 will export C
1~ C
M1In, the element corresponding from the value of said pointer Pend_L-L [n]+1 is 1 to the corresponding equal set of element of the value of Pend_L, and other element set are 0, and the value of revising said pointer Pstart_L then is Pend_L-L [n]+1;
L502 will export C
1~ C
M1In; The corresponding equal set of element of value from the 1st to said pointer Pend_L is 1; The element corresponding from the value of Pend_L-L [n]+1+M1 is 1 to the corresponding equal set of element of M1, and other element set are 0, and the value of revising said pointer Pstar_L then is Pend_L-L [n]+1+M1.
8. method as claimed in claim 7 is characterized in that step R400 is specially: if Pstart_R+R [n]-1 is not more than output C
M2~ C
MFigure place M, then carry out R401; Otherwise, carry out R402;
R401 will export C
M2~ C
MIn, the element corresponding from the value of said pointer Pstart_R is 1 to the corresponding equal set of numerical digit of the value of Pstart_R+R [n]-1, and other element set are 0, and the value of revising said pointer Pend_R then is Pstart_R+R [n]-1;
R402 will export C
M2~ C
MIn; The element corresponding from the value of said pointer Pstart_R is 1 to the corresponding equal set of element of M; The corresponding equal set of element of the value of [n]-1-M+M1 is 1 from the M2 position to Pstart_R+R, and other element set are 0, and the value of revising said pointer Pend_R then is Pstart_R+R [n]-1-M+M1.
9. method as claimed in claim 8 is characterized in that step R500 is specially: if Pend_R-R [n]+1 is not less than M2, carry out R501; Otherwise, carry out R502;
R501 will export C
M2~ C
MIn, the element corresponding from the value of said pointer Pend_R-R [n]+1 is 1 to the corresponding equal set of element of the value of Pend_R, and other element set are 0, and the value of revising said pointer Pstart_R then is Pend_R-R [n]+1;
R502; In element; The corresponding equal set of element of value from the M2 position to said pointer Pend_R is 1; The element corresponding from the value of Pend_R-R [n]+1+M-M1 is 1 to the corresponding equal set of element of M, and other element set are 0, and the value of revising said pointer Pstart_R then is Pend_R-R [n]+1+M-M1.
10. method as claimed in claim 5 is characterized in that, among step T100 and the step L100, after the value of revising said pointer Pstart_L was rp_L [n], if Pstart_L is 1, the value of then revising said pointer Pend_L was M1; Among step T100 and the step R100, after the value of revising said pointer Pstart_R was rp_R [n], if Pstart_R is M2, the value of then revising said pointer Pend_R was M.
Priority Applications (1)
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|---|---|---|---|
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| CN102324939A (en) * | 2011-06-30 | 2012-01-18 | 北京大学 | Be used for the DEM coding method of current steer DAC |
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| CN102324939A (en) * | 2011-06-30 | 2012-01-18 | 北京大学 | Be used for the DEM coding method of current steer DAC |
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