CN102738072A - Semiconductor assembly with through-silicon via and manufacturing method thereof - Google Patents
Semiconductor assembly with through-silicon via and manufacturing method thereof Download PDFInfo
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- CN102738072A CN102738072A CN2012101610848A CN201210161084A CN102738072A CN 102738072 A CN102738072 A CN 102738072A CN 2012101610848 A CN2012101610848 A CN 2012101610848A CN 201210161084 A CN201210161084 A CN 201210161084A CN 102738072 A CN102738072 A CN 102738072A
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Abstract
The invention discloses a semiconductor assembly with through-silicon via and a manufacturing method of the semiconductor assembly. The semiconductor assembly comprises a silicon substrate, a semiconductor assembly comprises a silicon substrate, a through-silicon via an upper redistribution layer, a lower redistribution layer and at least one cutting slot. The through-silicon via is formed in the silicon substrate, and the upper redistribution layer and the lower redistribution layer are respectively arranged on the surface of the through-silicon via and an insulation layer on a first surface and a second surface of the silicon substrate; and the at least one cutting slot divides the through-silicon via and the upper and lower redistribution layers to be at least two through-silicon via parts and corresponding circuit parts, which are independent. According to the semiconductor assembly disclosed by the invention, the through-silicon via is divided into the through-silicon via parts which are corresponding to a plurality of circuit parts, so that the upper redistribution layer and the lower redistribution layer can be designed to be dense, and further the trend of miniaturization of the stack packaging technology can be met.
Description
Technical field
The present invention relates to a kind of semiconductor subassembly with silicon perforating holes and preparation method thereof, particularly relates to a kind of manufacture method and structure with the corresponding a plurality of layers that reroute of a silicon perforating holes.
Background technology
In semiconductor fabrication process, silicon perforating holes (TSV, Through-Silicon Via) technology has become the means of main electric connection.Silicon perforating holes technology often is used in the first surface of same chip or silicon distance piece (interposer) and the electric connection between the second surface circuit; In the Chip Packaging that is applied in stacking-type; Therefore the silicon perforating holes helps 3D stacking-type Development of Packaging Technology, and can effectively improve the degree of integration and the usefulness of chip.
Moreover, in order to reach better 3D stacking-type encapsulation, need a large amount of reroute layer (redistribution-layer, technology RDL) used.Wherein, silicon perforating holes technology is combined utilization with the layer technology that reroute, more become one of main means that stacking-type encapsulates with the levels circuit of effective integral chip with corresponding chip about it respectively.
Yet; In the existing silicon perforating holes technology and layer The Application of Technology that reroute; The diameter of surperficial connection pad (land) of layer is about 30-50 μ m (micron) owing to reroute, and in the prior art, the spacing of two surperficial connection pads can not be again less than 10 μ m; Therefore the existing framework of wearing the corresponding layer that reroutes with a straight-through silicon makes more intensive that layer can't design that reroute, and can't satisfy the trend of stacking-type encapsulation technology miniaturization.
So, be necessary to provide a kind of semiconductor subassembly and preparation method thereof, to solve the existing in prior technology problem with silicon perforating holes.
Summary of the invention
Main purpose of the present invention is to provide a kind of semiconductor subassembly with silicon perforating holes and preparation method thereof, forms at least two groups independently silicon perforating holes portion and corresponding line part thereof through the linear incision silicon perforating holes and the layer that reroutes.
For reaching aforementioned purpose of the present invention, the present invention provides a kind of manufacture method with semiconductor subassembly of silicon perforating holes, it is characterized in that: said manufacture method comprises following steps: a silicon substrate (A) is provided, comprises a first surface and a second surface; (B) be operating surface with said first surface, in said silicon substrate, form a silicon perforating holes; (C) form the layer that reroutes on one first insulating barrier and in said operating surface, the layer that reroutes on said is formed on said silicon perforating holes and said first insulating barrier, and with said silicon perforating holes electric connection; (D) the said silicon perforating holes of linear incision and the said layer that reroutes up and down becomes the line part of at least two silicon perforating holes portions independently and a plurality of correspondences thereof; And (E) be operating surface with the second surface, repeating step (A)-(D), and the said silicon perforating holes and the layer that once reroutes cut into corresponding to the said silicon perforating holes portion of said first surface and the line part of a plurality of correspondences.
Moreover the present invention provides another kind to have the semiconductor subassembly of silicon perforating holes, and it comprises: reroute on a silicon substrate, the silicon perforating holes, a layer, once reroute the layer and at least one cutting groove.Said silicon substrate comprises a first surface and a second surface, and said first surface is provided with one first insulating barrier, and said second surface is provided with one second insulating barrier; Said silicon perforating holes is formed in the said silicon substrate, and the two ends of said silicon perforating holes are exposed to a said first surface and a second surface; The said layer that reroutes up and down comprises the line part of the said silicon perforating holes of a plurality of electric connections; Said at least one cutting groove cuts apart said silicon perforating holes and the said layer that reroutes up and down becomes independently at least two silicon perforating holes portions and corresponding a plurality of line part thereof.
Description of drawings
Fig. 1 is the sectional view of the semiconductor subassembly with silicon perforating holes of one embodiment of the invention.
Fig. 2 is the vertical view of the semiconductor subassembly with silicon perforating holes of Fig. 1 embodiment of the present invention.
Fig. 3 A-3I is the schematic flow sheet of manufacture method of the semiconductor subassembly with silicon perforating holes of one embodiment of the invention.
Fig. 4 is the vertical view of the semiconductor subassembly with silicon perforating holes of another embodiment of the present invention.
Fig. 5 is the sectional view of the semiconductor subassembly with silicon perforating holes of another embodiment of the present invention.
Fig. 6 is the sectional view of the semiconductor subassembly with silicon perforating holes of another embodiment of the present invention.
Embodiment
For making above-mentioned purpose of the present invention, characteristic and advantage more obviously understandable, hereinafter is special lifts preferred embodiment of the present invention, and conjunction with figs., elaborates as follows:
Please with reference to shown in Figure 1, Fig. 1 is the sectional view of the semiconductor subassembly with silicon perforating holes of one embodiment of the invention.The semiconductor subassembly with silicon perforating holes (TSV, Through-Silicon Via) of present embodiment comprises: a silicon substrate 10, a silicon perforating holes 100, layer 60a that reroute at least one, layer 60b and at least one cutting groove 70 reroute under at least one.Said silicon substrate 10 comprises a first surface 11 and a second surface 12; Said silicon perforating holes 100 is formed in the said silicon substrate 10, and the two ends of said silicon perforating holes 100 are exposed to said first surface 11 and said second surface 12.
In addition, form one first insulating barrier 110 layer on first surface 11, its purpose is reroute in the insulation layer 60a and silicon substrate 10, and forms second insulating barrier 120 layer on second surface 12, and its purpose is reroute under the insulation layer 60b and silicon substrate 10.And the two ends of said silicon perforating holes 100 are exposed to outside second insulating barrier 120 of first insulating barrier 110 and said second surface 12 of said first surface 11.
As shown in Figure 1; Said silicon perforating holes 100 comprises the metal column 50 of an insulation wall portion 30 and internal layer; One cutting groove 70 is formed at the said silicon perforating holes 100 and layer 60a that reroute up and down; The centre of 60b, its purpose is for making the silicon perforating holes 100 and layer 60a that reroute up and down, and 60b separates into two groups of silicon perforating holes portions (not indicating) and corresponding line part and insulation each other; The width of said cutting groove 70 is less than the diameter of the said metal column 50 of internal layer, is formed on the center of the said metal column 50 of internal layer in principle.
Please with reference to shown in Figure 2, Fig. 2 is the vertical view of the semiconductor subassembly with silicon perforating holes of Fig. 1 embodiment of the present invention.Said at least one cutting groove 70 is cut apart the said silicon perforating holes 100 and layer 60a that reroute up and down, 60b, and this cutting groove 70 can run through whole silicon perforating holes 100, makes to reach said silicon perforating holes 100 the right and lefts and be electrically insulated.After the said layer 60a that reroute at least one separates via said cutting groove 70, the line part that forms mutual independence and be electrically insulated (indicating), said line part respectively with the said silicon perforating holes of two groups of Fig. 1 portion electrically connect.
Please with reference to shown in Fig. 3 A-3I, Fig. 3 A-3I is the schematic flow sheet of manufacture method of the semiconductor subassembly with silicon perforating holes of one embodiment of the invention.
Shown in Fig. 3 A, the manufacture method with semiconductor subassembly of silicon perforating holes of the present invention is to prepare a silicon substrate 10 (or being called Silicon Wafer) earlier, and said silicon substrate 10 has a first surface 11 and a second surface second surface 12.
Shown in Fig. 3 B; On the first surface 11 of said silicon substrate 10, form the wherein said photoresist layer 20 of one first photoresist layer 20 (photoresist layer) first surface and form an annular aperture 21, to expose an annular section of said first surface 11 in the position patterning of making the silicon perforating holes.
Shown in Fig. 3 C, the annular section that said annular aperture 21 is exposed to the open air carries out dry-etching (Dry Etching), so that in the annular section 21 downward etchings of said first photoresist layer 20 of the first surface 11 of said silicon substrate 10, form an annular groove 13.
Shown in Fig. 3 D, remove said first photoresist layer 20, and insulating material is inserted in the said annular groove 13 to form the insulation wall portion 30 of a ring-type.Wherein, the optional autohemagglutination compound of said insulating material (Polymer), silicon dioxide or other have the material of insulating property (properties).
Shown in Fig. 3 E, form the first surface 11 of one second photoresist layer 40 in said silicon substrate 10, comprise the said insulation wall portion 30 that covers, to expose the central circular that said first surface 11 is centered on by said insulation wall portion 30 to the open air.
Shown in Fig. 3 F, the border circular areas that is centered on by said insulation wall portion 30 is carried out dry-etching, the silicon substrate of said border circular areas is removed in etching, so that form a deep hole 14 at said border circular areas.And in this step, the degree of depth of said deep hole 14 is less than the degree of depth of said insulation wall portion 30.
Shown in Fig. 3 G, remove said second photoresist layer 40, and metal material is inserted formation one metal column 50 in the said deep hole 14.For example, in this step, can select to insert earlier (for example electroplating sputter) and be prone to the metal material (for example titanium) that combines with said insulation wall portion 30, insert the metal material (for example copper) of (for example plating) easy conductive again, to form a silicon perforating holes 100 (non-through).
Shown in Fig. 3 H, form one first insulating barrier 110 in said first surface 11, form upper strata wiring layer 60a afterwards on the said metal column 50 and first insulating barrier 110, the purpose of first insulating barrier 110 is reroute in the insulation layer 60a and silicon substrate 10.
Shown in Fig. 3 I; Layer 60a and said silicon perforating holes 100 reroute on linear incision is said; Form a cutting groove 70, and with said silicon perforating holes 100 and said on layer 60a that reroute cut into the line part of at least two groups independently said silicon perforating holes portion and a plurality of correspondences.At last, the second surface 12 of said silicon substrate 10 is an operating surface, repeats above-mentioned steps, and said silicon perforating holes 100 and the said layer 60b that reroute are down cut into corresponding to the said silicon perforating holes portion 100 of said first surface 11 and the line part 60 of a plurality of correspondences.
In sum, the manufacture method with semiconductor subassembly of silicon perforating holes of the present invention comprises:
(A) silicon substrate 10 is provided, comprises a first surface 11 and a second surface 12;
(B) be operating surface with said first surface 11, in said silicon substrate 10, form a silicon perforating holes 100;
(C) form layer 60a that reroute on one first insulating barrier 110 and in said operating surface, layer 60a that reroute on said is formed on said silicon perforating holes 100 and said first insulating barrier 110, and electrically connects with said silicon perforating holes 100;
(D) reroute on said layer 60a and said silicon perforating holes 100 of linear incision forms the line part of at least two groups independently said silicon perforating holes portion and a plurality of correspondences.
(E) be operating surface with second surface 12, repeat above-mentioned steps (A)-(D), and said silicon perforating holes 100 and the said layer 60b that reroute are down cut into corresponding to the said silicon perforating holes portion of said first surface 11 and the line part of a plurality of correspondences.
Therefore, can obtain the semiconductor subassembly of present embodiment Fig. 1 with silicon perforating holes via above-mentioned manufacture method.Yet in the present embodiment, the present invention does not limit the structure and the manufacture method of said silicon perforating holes 100.Generally speaking, the diameter of said silicon perforating holes 100 is about 30-50 μ m (micron), and the degree of depth for example is 180-210 μ m more than 50 μ m; The thickness of said insulation wall portion 30 is about 5-10 μ m, but the present invention is not limited to this.Take the mode of which kind of linear incision as for the present invention, the preferable mode of selecting the laser cutting for use, the width of said cutting groove 70 is about 5-10 μ m, but the present invention also is not limited to this.
In the present embodiment, through cutting the said layer 60a that reroute up and down, 60b and said silicon perforating holes 100 and obtain at least two groups independently said silicon perforating holes portion and corresponding line part thereof.That is to say; Semiconductor subassembly with silicon perforating holes of the present invention and preparation method thereof can use a silicon perforating holes 100 corresponding a plurality of layer 60a that reroute; The line part of 60b; The feasible layer 60a that reroute, it is more intensive that 60b can design, to satisfy the trend of stacking-type encapsulation technology miniaturization.
Please with reference to shown in Figure 4, Fig. 4 is the vertical view of the semiconductor subassembly with silicon perforating holes of another embodiment of the present invention.The semiconductor subassembly with silicon perforating holes of Fig. 4 embodiment of the present invention is similar in appearance to Fig. 1 of the present invention and Fig. 2 embodiment; And roughly continue to use same reference numbers; But the difference characteristic of present embodiment is: the semiconductor subassembly with silicon perforating holes of present embodiment has the cutting groove 70 of two intersections; Also with the said layer 60a that reroute, 60b and said silicon perforating holes 100 cut into 4 five equilibriums, just 4 groups of independently said silicon perforating holes portions and corresponding line part thereof.Present embodiment can use the corresponding 4 groups of line part up and down of 4 silicon perforating holes portions of a silicon perforating holes 100, makes layer 60a that reroute, and it is more intensive that 60b can design.But the present invention is not limited to this, and according to the design of said cutting groove 70 and corresponding line part, the present invention can make a straight-through silicon wear and be divided into 2-8.
Please with reference to shown in Figure 5, Fig. 5 is the sectional view of the semiconductor subassembly with silicon perforating holes of another embodiment of the present invention.The semiconductor subassembly with silicon perforating holes of Fig. 5 embodiment of the present invention is similar in appearance to Fig. 1 of the present invention and Fig. 2 embodiment; And roughly continue to use same reference numbers; But the difference characteristic of present embodiment is: the said layer 60a that reroute up and down, 60b is last to comprise the second layer 80a that reroute, 80b respectively.In step (D) afterwards just, layer 60a that reroute on said goes up and forms layer 80a that reroute on one second, goes up in the said layer 60b that reroute down and forms the design variation that layer 80b that reroute for one second time reroutes layer with increase.Accordingly, said first insulating barrier is provided with one the 3rd insulating barrier (not indicating), and said second insulating barrier is provided with one the 4th insulating barrier (not indicating).
Please with reference to shown in Figure 6, Fig. 6 is the sectional view of the semiconductor subassembly with silicon perforating holes of another embodiment of the present invention.The semiconductor subassembly with silicon perforating holes of Fig. 6 embodiment of the present invention is similar in appearance to Fig. 1 of the present invention and Fig. 2 embodiment; And roughly continue to use same reference numbers, but the difference characteristic of present embodiment is: said silicon perforating holes comprises an insulation wall portion 30, a metal column portion 50 and an insulative core portion 31.Be a silicon perforating holes portion 100 just with insulation wall portion 30, metal column portion 50 and insulative core portion 31 at step (D) the silicon perforating holes that forms; Even so, but the effect of being played in the present invention with the corresponding a plurality of said line part of silicon perforating holes is the same.
Semiconductor subassembly with silicon perforating holes of the present invention and preparation method thereof is through layer 60a of portion that silicon perforating holes 100 correspondences are rerouted up and down, a plurality of line part that 60b is last.On the one hand, can save the quantity of the said silicon perforating holes 100 of making if reroute number of lines for fixedly the time; On the other hand, if the quantity of silicon perforating holes 100 for fixedly the time, can make layer 60a that reroute, 60b designs more intensively, to satisfy the trend of stacking-type encapsulation technology miniaturization.
The present invention is described by above-mentioned related embodiment, yet the foregoing description is merely the example of embodiment of the present invention.Must be pointed out that disclosed embodiment does not limit scope of the present invention.Opposite, be contained in the spirit of claims and the modification and impartial setting of scope and include in scope of the present invention.
Claims (10)
1. the manufacture method with semiconductor subassembly of silicon perforating holes is characterized in that: said manufacture method
Comprise following steps:
(A) silicon substrate is provided, comprises a first surface and a second surface;
(B) be operating surface with said first surface, in said silicon substrate, form a silicon perforating holes;
(C) form the layer that reroutes on one first insulating barrier and in said operating surface, the layer that reroutes on said is formed on said silicon perforating holes and said first insulating barrier, and with said silicon perforating holes electric connection; And
(D) the said silicon perforating holes of linear incision and said on the layer that reroutes become the line part of at least two silicon perforating holes portions independently and a plurality of correspondences thereof.
2. the manufacture method with semiconductor subassembly of silicon perforating holes as claimed in claim 1, its characteristic exists
In: in step (D) afterwards, comprise step (E): be operating surface with the second surface, repeating step (A)-(D), and with said silicon perforating holes and once reroute the layer cut into corresponding to the said silicon perforating holes portion of said first surface and the line part of a plurality of correspondences.
3. the manufacture method with semiconductor subassembly of silicon perforating holes as claimed in claim 1 is characterized in that: in step (D) afterwards, the layer that reroutes on said is gone up and is formed the layer that reroutes on one second.
4. the manufacture method with semiconductor subassembly of silicon perforating holes as claimed in claim 1 is characterized in that: in step (D) afterwards, the layer that reroutes under said is gone up and is formed one second time layer that reroutes.
5. the manufacture method with semiconductor subassembly of silicon perforating holes as claimed in claim 1 is characterized in that: in step (B), comprise:
(a) form one first photoresist layer in the operating surface of said silicon substrate, expose at least one annular section of said operating surface to the open air;
(b) said annular section is carried out dry-etching, at annular groove of operating surface formation of said silicon substrate;
(c) remove said photoresist layer, and insulating material is inserted formation one insulation wall portion in the said annular groove;
(d) form one second photoresist layer in the operating surface of said silicon substrate, expose the border circular areas that said operating surface is centered on by said insulation wall portion to the open air;
(e) said border circular areas is carried out dry-etching, make said silicon substrate at deep hole of the said inboard formation of insulation wall portion; And
(f) remove said second photoresist layer, and metal material is inserted formation one metal column in the said deep hole.
6. semiconductor subassembly with silicon perforating holes is characterized in that: comprise:
One silicon substrate comprises a first surface and a second surface, and said first surface is provided with one first insulating barrier, and said second surface is provided with one second insulating barrier;
One silicon perforating holes is formed in the said silicon substrate, and the two ends of said silicon perforating holes are exposed to first insulating barrier of said first surface and second insulating barrier of said second surface;
The layer that reroutes on one comprises the line part of the said silicon perforating holes of a plurality of electric connections;
The layer that once reroutes comprises the line part of the said silicon perforating holes of a plurality of electric connections; And
At least one cutting groove is cut apart said silicon perforating holes and the said layer that reroutes up and down becomes independently at least two silicon perforating holes portions and corresponding a plurality of line part thereof.
7. the semiconductor subassembly with silicon perforating holes as claimed in claim 6 is characterized in that: comprise the layer that reroutes on one second on the layer that reroutes on said in addition.
8. the semiconductor subassembly with silicon perforating holes as claimed in claim 6 is characterized in that: comprise the layer that reroutes on the layer that reroutes under said in addition one second time.
9. the semiconductor subassembly with silicon perforating holes as claimed in claim 6 is characterized in that: said silicon perforating holes comprises an insulation wall portion and a metal column portion; Or said silicon perforating holes comprises an insulation wall portion, a metal column portion and an insulative core portion.
10. the semiconductor subassembly with silicon perforating holes as claimed in claim 6 is characterized in that: said first insulating barrier is provided with one the 3rd insulating barrier, and said second insulating barrier is provided with one the 4th insulating barrier.
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Cited By (1)
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| CN110867431A (en) * | 2019-11-27 | 2020-03-06 | 西安电子科技大学 | TSV through hole supporting multi-path electric connection |
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Application publication date: 20121017 |