CN102736951B - A method and an apparatus for calling a module - Google Patents
A method and an apparatus for calling a module Download PDFInfo
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- CN102736951B CN102736951B CN201110080904.6A CN201110080904A CN102736951B CN 102736951 B CN102736951 B CN 102736951B CN 201110080904 A CN201110080904 A CN 201110080904A CN 102736951 B CN102736951 B CN 102736951B
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Abstract
The invention relates to the field of a system on chip, and especially relates to a method and an apparatus for calling a module from the system on chip. The method comprises the steps of: configuring a DMA interface module and a hardware accelerator module on a master controller, and setting the hardware accelerator module to adopt DMA starting mode for getting started; sending interruption to an interruption processing module after the hardware accelerator module finishes running; sending a response to a main controller which configures the DMA interface module to output data after the interruption processing module receives the interruption of running-finishing sent by the hardware accelerator module; and receiving an interruption of data-output-finishing of the DMA interface module by the interruption processing module and the call ends. The apparatus comprises a main controller module, an interruption processing module, a DMA interface module and at least one hardware accelerator module. According to the method and the apparatus, the frequency of interruption received by the main controller is minimized, the operation procedures are simplified, and data-processing time of the main controller is reduced.
Description
Technical field
The present invention relates to SOC (system on a chip) field, relate in particular to the method and apparatus that a kind of SOC (system on a chip) module is called
Background technology
SOC (system on a chip) (the SoC of current two-forty, system on chip), there are two kinds of larger developing direction, a kind of is software definition radio frequency (SDR, Software Defined Radio), it,, by its reprogramming and reconfigurable ability, makes equipment can be used in multiple standards, a plurality of frequency band, realize several functions, SDR has increased the dirigibility of software; And another kind of direction increases dedicated hardware accelerators exactly, in conjunction with microprocessor (MCU, Microprogrammed Control Unit) or digital signal processor (DSP, Digital Signal Processor) do simple computation and control, can better consider low power dissipation design.
In the SoC based on hardware accelerator, in general, direct memory access (DMA, Direct Memory Access) be necessary, DMA can complete MCU/DSP to accelerator, accelerator to the data-moving between accelerator, wherein without primary controller, participate in, the speed of system can increase greatly.The interruption that reduces to a certain extent DMA can reduce the processing time of MCU/DSP, greatly increases the processing speed of system, and can further reduce system power dissipation.
The operating process that an existing single module based on hardware accelerator calls is as follows:
Step 1, primary controller configuration DMA input data;
Step 2, interruption processing module judge the DMA after data have been inputted interrupts whether completing, if complete, sends to primary controller carry out step 3, if complete, does not continue to wait for this interruption;
The correlation parameter of the hardware accelerator module that step 3, primary controller configuration will be called;
Whether step 4, interruption processing module judge module move complete interruption and complete, if carry out step 5, continue to wait for if not this interruption;
Step 5, primary controller configuration DMA output data;
Step 6, interruption processing module judge the DMA that data have been exported interrupts whether completing, if complete, carry out step 7, if complete, does not continue to wait for this interruption;
Step 7, this single module call end.
From above description, can find often to call a single module primary controller and all will process twice DMA startup interruption, and repeatedly DMA and hardware accelerator are configured, not only increase the time that system is processed, also increase the complexity of system software; If desired carry out a multimode while calling, often call a module and all can process at least twice DMA and interrupt, the accumulation processor that gets up can progressively increase shared operation time so, and the complexity of primary controller operating process and burden can constantly increase.
Summary of the invention
The invention provides a kind of module call method and device, to reach the problem that solves the minimizing system processing time and reduce software operation flow process complexity.
A kind of module call method provided by the invention, the method comprises:
Primary controller configuration DMA interface module and hardware accelerator module, and hardware accelerator module employing DMA Starting mode is set;
When DMA interface module completes data input, move after operation, send the operation of DMA IE hardware accelerator module;
Hardware accelerator module operation is complete, sends and interrupts to interruption processing module;
Interruption processing module receives the complete interruption of operation that hardware accelerator module sends, and sends response to primary controller, primary controller configuration DMA interface module output data;
After DMA interface module output data, send and interrupt to interruption processing module, interruption processing module receives described interruption, calls end.
Further, said method also has following characteristics:
Described interruption processing module receives in hardware accelerator module or the transmission of DMA interface module and has no progeny, and also comprises interrupt type and interruption times that judgement receives.
Further, said method also has following characteristics:
Described interrupt type comprises the complete interruption of output data of DMA interface module transmission and the complete interruption of operation that hardware accelerator module sends;
Described interruption times refers to the complete interruption of operation of hardware accelerator module transmission and the number of times of the complete interruption of output data that DMA interface module sends that interruption processing module receives.
Further, said method also has following characteristics:
When hardware accelerator module number is greater than one, when interruption processing module receives the complete interruption of operation of hardware accelerator module transmission, also comprises and judge whether described interruption is that last hardware accelerator sends.If send response to primary controller, by primary controller configuration DMA interface module data, exported, otherwise send, interrupt to primary controller, by primary controller, configure next hardware accelerator.
Further, said method also has following characteristics:
When hardware accelerator module call number is greater than one time, when interruption processing module receives the complete interruption of output data of DMA interface module transmission, also comprise and judge whether described interruption times reaches call number, if send response to primary controller, described hardware accelerator module is called end; Otherwise send, interrupt to primary controller, by primary controller, again configure described hardware accelerator.
In order to solve the problems of the technologies described above, the present invention also provides a kind of module calling device, comprises primary controller module, interruption processing module, DMA interface module, at least 1 hardware accelerator module,
Described primary controller module realizes input and output and configuration DMA interface module and the hardware accelerator module of data for the interrupt operation sending according to interruption processing module;
Each look-at-me that described interruption processing module sends for receiving DMA interface module and hardware accelerator module, and the interrupt response being received is to primary controller module;
Described DMA interface module comprises the interface that the data transmission interface, the interruption processing module that are connected with each hardware accelerator module are connected and the control interface being connected with primary controller, for completing each hardware accelerator module data-moving, processes and sends or respond corresponding interruption to interruption processing module; DMA interface module also comprises that DMA interrupts sending module, for sending DMA, interrupts to hardware accelerator module, starts hardware accelerator module operation;
Described hardware accelerator module comprises that interface module, computing module and the DMA of hardware accelerator start module, starts, and send look-at-me to interruption processing module for realizing processing and the DMA of data.
Further, said apparatus can also have following characteristics:
Described interruption processing module also comprises judge module, for receiving having no progeny of hardware accelerator module or the transmission of DMA interface module, interrupt type and interruption times that judgement receives.
Further, said apparatus can also have following characteristics:
Described interrupt type comprises the complete interruption of output data of DMA interface module transmission and the complete interruption of operation that hardware accelerator module sends;
Described interruption times refers to the complete interruption of operation of hardware accelerator module transmission and the number of times of the complete interruption of output data that DMA interface module sends that interruption processing module receives.
Further, said apparatus can also have following characteristics:
Described DMA starts module and comprises that DMA starts interface and DMA interrupts receiving interface, and described DMA starts interface and is connected with primary controller, by primary controller configuration Starting mode; Described DMA interrupts receiving interface and is connected with DMA interrupt module, for the DMA IE hardware accelerator operation sending according to DMA interface module.
Adopt module call method of the present invention and device, go for the realization of all hardware accelerators based on SoC.No matter be that single module calls or multimode is called, the inventive method and device are all only processed a DMA and are interrupted when data are exported, and have greatly reduced the DMA interruption times that primary controller receives, and have simplified operating process, have reduced the time of primary controller deal with data; All modules all can directly start operation by DMA simultaneously, by primary controller, do not start, thereby have reduced the complexity of the operating process of primary controller.
Accompanying drawing explanation
Fig. 1 is a kind of single module single module call method schematic diagram that the embodiment of the present invention provides.
Fig. 2 is a kind of multimode single module call method schematic diagram that the embodiment of the present invention provides.
Fig. 3 is repeatedly module call method schematic diagram of a kind of multimode of providing of the embodiment of the present invention.
Fig. 4 is a kind of module calling device schematic diagram that the embodiment of the present invention provides.
Fig. 5 is repeatedly module calling device schematic diagram of a kind of multimode of providing of the embodiment of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and the embodiments, the method in the present invention and device are described in further detail.
Embodiment of the method:
The concrete operations flow process of single module single call as shown in Figure 1, specifically comprises following steps:
102, primary controller configuration DMA interface module and hardware accelerator module, and hardware accelerator module employing DMA Starting mode is set;
In this step, in primary controller configuration DMA interface module and hardware accelerator module, after hardware accelerator module adopts DMA Starting mode to start, DMA interface module is carried out data-moving, startup hardware accelerator module after completing, hardware accelerator module operation.
104, hardware accelerator module operation is complete, sends the complete interruption of operation to interruption processing module;
106, interruption processing module receives the complete interruption of operation that hardware processing module sends, and sends response to primary controller, primary controller configuration DMA interface module output data;
108, after DMA interface module output data, send and interrupt to interruption processing module, interruption processing module receives the complete interruption of output data that DMA interface module sends, and this calls end.
Wherein, interruption processing module, when receiving interruption, judge that this interruption is that hardware accelerator module is sent or DMA interface module is sent, to send different responses to primary controller.
The concrete operations flow process of multimode single call as shown in Figure 2, take in the present embodiment that to call N hardware accelerator module be example, specifically comprises the following steps:
202, the hardware accelerator module X(1≤X≤N of primary controller configuration DMA interface module and object run), the module of Offered target operation simultaneously X adopts DMA Starting mode;
In this step, with single module invocation step, hardware accelerator module is set and adopts after DMA Starting mode, DMA interface module is carried out data-moving, startup hardware accelerator module after completing, hardware accelerator module operation;
204, interruption processing module is had no progeny in the operation that receives hardware accelerator module X transmission is complete, judge whether described interruption is that hardware accelerator module N sends, if send, interrupt informing that primary controller carry out step 206, otherwise send, interrupt informing that primary controller loops step 202; ,
In this step, whether interruption processing module is had no progeny in the operation that receives hardware processing module X transmission is complete, judge whether receive described interruption is that hardware accelerator module N sends, be the interruption that last hardware accelerator module is sent.Can be counted by the interruption times receiving, the number that whether equals hardware accelerator module realizes, or once interrupts data and successively decrease by often receiving, and determines whether that zero realizes.
206, primary controller configuration DMA interface module output data;
208, interruption processing module receives the complete interruption of output data that DMA interface module sends, and this calls end.
The concrete operations flow process that multimode is repeatedly called as shown in Figure 3, is supposed total N hardware accelerator module in this embodiment, is respectively hardware accelerator module 1-N, and device schematic diagram as shown in Figure 5.In the present embodiment, need these hardware accelerator module to call one by one, wherein call hardware accelerator module 1 once, call hardware accelerator module 2-module M-1 circulation m time, call hardware accelerator M n time altogether, call hardware accelerator M+1-hardware accelerator N circulation 1 time, m and n are greater than 1.Its concrete operations flow process is as follows:
Step 301, primary controller configure hardware accelerator module 1, arrange hardware accelerator module 1 simultaneously and adopt DMA Starting mode to start; DMA interface module is carried out data-moving, startup hardware accelerator module 1 after completing, hardware accelerator module 1 operation;
Step 302, interruption processing module receive the complete interruption of operation that hardware accelerator 1 sends, and send response to primary controller, primary controller configuration DMA interface module output data;
Step 303, interruption processing module receive the complete interruption of output data that DMA interface module sends and carry out steps 304, continue to wait for if not this interruption;
Step 304, primary controller configure hardware accelerator module X(2≤X≤M-1), configure hardware accelerator module X adopts DMA Starting mode to start simultaneously.DMA interface module is carried out data-moving, startup hardware accelerator module X after completing, hardware accelerator module X operation;
Step 305, interruption processing module receive the complete interruption of operation that hardware accelerator X sends, judge whether described interruption is that hardware accelerator module M-1 sends, if send, interrupt informing that primary controller carry out step 306, otherwise send, interrupt informing and carry out the operation of step 304 by primary controller;
Step 306, primary controller configuration DMA interface module output data;
Step 307, interruption processing module receive the complete interruption of output data that DMA interface module sends, judge whether described interruption is that the m time DMA data exported complete interruption, if send interrupt response, inform that primary controller carry out step 308, otherwise send interrupt response, inform that primary controller loops step 305 to step 307;
Step 308, primary controller configure hardware accelerator module M, configure hardware accelerator module M adopts DMA Starting mode to start simultaneously; DMA interface module is carried out data-moving, startup hardware accelerator module M after completing, hardware accelerator module M operation;
Step 309, interruption processing module receive the complete interruption of operation that hardware accelerator M sends, and send and interrupt informing that primary controller carry out step 310;
Step 310, primary controller configuration DMA interface module output data;
Step 311, interruption processing module receive the complete interruption of output data that DMA interface module sends, judge whether described interruption is the complete interruptions of the n time DMA output data, if send interrupt response, inform that primary controller carry out step 312, otherwise send, interrupt informing that primary controller loops step 308 to step 311;
Step 312, primary controller configure hardware accelerator module Y(M+1≤Y≤N), configure hardware accelerator module Y adopts DMA Starting mode to start simultaneously;
Step 313, interruption processing module receive the complete interruption of operation that hardware accelerator Y sends, interruption processing module determines whether that hardware accelerator N sends simultaneously, if send, interrupt informing that primary controller carry out step 314, otherwise send, interrupt informing that primary controller loops the operation of step 312;
Step 314, primary controller configuration DMA interface module output data;
Step 315, interruption processing module receive the complete interruption of output data that DMA interface module sends.This time multimode is repeatedly called end.
In the present embodiment, called hardware accelerator m+n+2 time altogether, reduced the DNA that is sent to primary controller and interrupted m+n+2 time.If the present embodiment is LTE(Long-Term Evolution Long Term Evolution project) in PDSCH(Physical Downlink Share Channel Physical Downlink Shared Channel) single antenna processes the situation of a subframe while receiving, subframe for downlink transfer while supposing two antenna receptions has 7, while processing so a frame (10ms) data, should process so DMA to interrupt being that 14 (m+n+2) are inferior.And often carry out in the present invention module, call and will reduce DMA and interrupt once, according to above step, can processing frame data so, can to reduce DMA interruption 7 (m+n+2) inferior, according to the inventive method, can reduce DMA to the interruption times of primary controller as can be seen here, greatly simplify the call operation to system module on software, reduced complexity on software.
Device embodiment
Device embodiment of the present invention as shown in Figure 4, this device comprises primary controller module, interruption processing module, DMA interface module, at least 1 hardware accelerator module, wherein, primary controller module controls for the interrupt response that configures DMA interface module and hardware accelerator module and send according to interruption processing module the input and output that realize data.Primary controller can be Micro-processor MCV or digital signal processor DSP.
Each look-at-me that interruption processing module sends for receiving DMA interface module and hardware accelerator module, and the interrupt response being received is to primary controller module;
DMA interface module: comprise the data transmission interface being connected with each hardware accelerator module, the interface being connected with interruption processing module and the control interface being connected with primary controller, the data-moving mainly completing between each hardware accelerator module is processed and sends in time or respond corresponding interruption to interruption processing module.
Hardware accelerator module: the interface module, computing module and the DMA that comprise hardware accelerator start module, for realizing the processing operation of data and starting according to DMA Starting mode, and sends look-at-me to interruption processing module.
Further, the device that above-mentioned module is called interruption processing module wherein also comprises judge module, for the described interruption receiving is judged.When receiving an interruption, need to carry out the judgement of interrupt type and the judgement of interruption times, interrupt type comprises the interruption of DMA interface module transmission and the interruption that hardware accelerator module sends; Interruption times refers to the complete interruption of operation of hardware accelerator transmission and the complete interruption times of output data of DMA interface module transmission that interruption processing module receives.
Further, DMA interface module also comprises interruption sending module, for sending DMA, interrupts to hardware accelerator module, starts hardware accelerator module and moves according to DMA Starting mode.
Further, DMA in hardware accelerator starts module and comprises that DMA starts interface and DMA interrupts receiving interface, described DMA starts interface and is connected with primary controller, by primary controller configuration, select Starting mode, can select primary controller to start or DMA startup, select in embodiments of the present invention DMA to start, but primary controller Starting mode that also can be compatible common.DMA interrupts receiving interface and is connected with DMA interface module, for the DMA IE hardware accelerator sending according to DMA interface module.
In the present embodiment, all hardware accelerator module all can directly start operation by DMA interrupt mode, by primary controller, does not start, thereby has reduced the complexity of the operating process of primary controller.
Those of ordinary skill in the art is obviously clear and understand, the method and apparatus of data transmission of the present invention for above embodiment only for the method and apparatus of data transmission of the present invention is described, and be not limited to the method and apparatus of data transmission of the present invention.Although effectively described the method and apparatus of data transmission of the present invention by embodiment, those of ordinary skills know, the method and apparatus of data transmission of the present invention exists many variations and do not depart from spirit of the present invention.In the situation that do not deviate from spirit and the essence thereof of the method and apparatus of data transmission of the present invention; those skilled in the art when can the method according to this invention and device make various corresponding changes or distortion, but these corresponding change or distortion all belongs to claim protection domains of the method and apparatus of data transmission of the present invention.
Claims (9)
1. a module call method, is characterized in that, the method comprises:
Primary controller configuration DMA interface module and hardware accelerator module, and hardware accelerator module employing DMA Starting mode is set;
When DMA interface module completes data input, move after operation, send the operation of DMA IE hardware accelerator module;
Hardware accelerator module operation is complete, sends and interrupts to interruption processing module;
Interruption processing module receives the complete interruption of operation that hardware accelerator module sends, and sends response to primary controller, primary controller configuration DMA interface module output data;
After DMA interface module output data, send and interrupt to interruption processing module, interruption processing module receives described interruption, calls end.
2. module call method as claimed in claim 1, is characterized in that, described interruption processing module receives in hardware accelerator module or the transmission of DMA interface module and has no progeny, and also comprises interrupt type and interruption times that judgement receives.
3. module call method as claimed in claim 2, is characterized in that, described interrupt type comprises the complete interruption of output data of DMA interface module transmission and the complete interruption of operation that hardware accelerator module sends;
Described interruption times is the complete interruption of operation of hardware accelerator module transmission and the number of times of the complete interruption of output data that DMA interface module sends that interruption processing module receives.
4. module call method as claimed in claim 3, it is characterized in that, when hardware accelerator module number is greater than one, when interruption processing module receives the complete interruption of operation of hardware accelerator module transmission, also comprise and judge whether described interruption is that last hardware accelerator module is sent, if send response to primary controller, by primary controller configuration DMA interface module data, exported, otherwise send, interrupt to primary controller, by primary controller, configure next hardware accelerator module.
5. module call method as claimed in claim 3, it is characterized in that, when hardware accelerator module call number is greater than one time, when interruption processing module receives the complete interruption of output data of DMA interface module transmission, also comprise and judge whether described interruption times reaches call number, if send response to primary controller, described hardware accelerator module is called end; Otherwise send, interrupt to primary controller, by primary controller, again configure described hardware accelerator module.
6. a module calling device, comprises primary controller module, interruption processing module, DMA interface module, at least 1 hardware accelerator module, it is characterized in that:
Described primary controller module realizes input and output and configuration DMA interface module and the hardware accelerator module of data for the interrupt operation sending according to interruption processing module;
Each look-at-me that described interruption processing module sends for receiving DMA interface module and hardware accelerator module, and the interrupt response being received is to primary controller module;
Described DMA interface module comprises the interface that the data transmission interface, the interruption processing module that are connected with each hardware accelerator module are connected and the control interface being connected with primary controller, for completing each hardware accelerator module data-moving, processes and sends or respond corresponding interruption to interruption processing module; DMA interface module also comprises that DMA interrupts sending module, for sending DMA, interrupts to hardware accelerator module, starts hardware accelerator module operation;
Described hardware accelerator module comprises that interface module, computing module and the DMA of hardware accelerator start module, starts, and send look-at-me to interruption processing module for realizing processing and the DMA of data.
7. module calling device as claimed in claim 6, is characterized in that, described interruption processing module also comprises judge module, for receiving having no progeny of hardware accelerator module or the transmission of DMA interface module, interrupt type and interruption times that judgement receives.
8. module calling device as claimed in claim 7, is characterized in that, described interrupt type comprises the complete interruption of output data of DMA interface module transmission and the complete interruption of operation that hardware accelerator module sends;
Described interruption times is the complete interruption of operation of hardware accelerator module transmission and the number of times of the complete interruption of output data that DMA interface module sends that interruption processing module receives.
9. module calling device as claimed in claim 6, is characterized in that, described DMA starts module and comprises that DMA starts interface and DMA interrupts receiving interface, and described DMA starts interface and is connected with primary controller, by primary controller configuration Starting mode; Described DMA interrupts receiving interface and is connected with DMA interface module, for the DMA IE hardware accelerator module operation sending according to DMA interface module.
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| CN104836710B (en) * | 2015-02-10 | 2018-06-05 | 数据通信科学技术研究所 | A kind of method and apparatus based on the communication of distributed system one master and multiple slaves |
| CN104778148A (en) * | 2015-04-03 | 2015-07-15 | 哈尔滨工业大学 | Dynamic reconfigurable embedded data co-processing platform based on FPGA (Field-Programmable Gate Array) and data processing method realized by using platform |
| CN109525473B (en) * | 2018-11-28 | 2021-05-04 | 深圳市元征科技股份有限公司 | Method and system for expanding CAN by MCU, MCU and computer medium |
| CN111078619A (en) * | 2019-03-29 | 2020-04-28 | 新华三技术有限公司 | Conversion device, network equipment and data transmission method |
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| CN2886683Y (en) * | 2006-04-17 | 2007-04-04 | 四川大学 | SoC chip with multimedia and network processing function |
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