CN102713875B - 包含组合的选择和数据对齐或数据复制的多级多路复用运算 - Google Patents

包含组合的选择和数据对齐或数据复制的多级多路复用运算 Download PDF

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Publication number
CN102713875B
CN102713875B CN201180005892.9A CN201180005892A CN102713875B CN 102713875 B CN102713875 B CN 102713875B CN 201180005892 A CN201180005892 A CN 201180005892A CN 102713875 B CN102713875 B CN 102713875B
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data
computing
alignment
zero
mux
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Chinese (zh)
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CN102713875A (zh
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阿贾伊·阿南特·英格尔
林任从
拉胡尔·R·托莱
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1678—Details of memory controller using bus width

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
CN201180005892.9A 2010-01-15 2011-01-14 包含组合的选择和数据对齐或数据复制的多级多路复用运算 Active CN102713875B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/688,091 US8356145B2 (en) 2010-01-15 2010-01-15 Multi-stage multiplexing operation including combined selection and data alignment or data replication
US12/688,091 2010-01-15
PCT/US2011/021342 WO2011088351A1 (en) 2010-01-15 2011-01-14 Multi-stage multiplexing operation including combined selection and data alignment or data replication

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CN102713875A CN102713875A (zh) 2012-10-03
CN102713875B true CN102713875B (zh) 2016-01-20

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US (1) US8356145B2 (enExample)
EP (1) EP2524315A1 (enExample)
JP (1) JP5584781B2 (enExample)
CN (1) CN102713875B (enExample)
TW (1) TW201140318A (enExample)
WO (1) WO2011088351A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8484433B2 (en) * 2010-11-19 2013-07-09 Netapp, Inc. Dynamic detection and reduction of unaligned I/O operations
US10423353B2 (en) * 2016-11-11 2019-09-24 Micron Technology, Inc. Apparatuses and methods for memory alignment
US10372452B2 (en) * 2017-03-14 2019-08-06 Samsung Electronics Co., Ltd. Memory load to load fusing

Citations (5)

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EP0695998A2 (en) * 1994-08-02 1996-02-07 Motorola, Inc. Interbus buffer
US5882620A (en) * 1995-06-07 1999-03-16 International Carbitech Industries, Inc. Pyrometallurgical process for forming tungsten carbide
US5907865A (en) * 1995-08-28 1999-05-25 Motorola, Inc. Method and data processing system for dynamically accessing both big-endian and little-endian storage schemes
CN101256546A (zh) * 2007-03-01 2008-09-03 黄新亚 32位微处理器
CN101299185A (zh) * 2003-08-18 2008-11-05 上海海尔集成电路有限公司 一种基于cisc结构的微处理器构架及指令实现方式

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US4583199A (en) * 1982-07-02 1986-04-15 Honeywell Information Systems Inc. Apparatus for aligning and packing a first operand into a second operand of a different character size
JP3181001B2 (ja) * 1993-06-01 2001-07-03 インターナショナル・ビジネス・マシーンズ・コーポレ−ション キャッシュ・メモリ・システム並びにキャッシュ・メモリ・アクセス方法及びシステム
US5627773A (en) * 1995-06-30 1997-05-06 Digital Equipment Corporation Floating point unit data path alignment
US5761469A (en) * 1995-08-15 1998-06-02 Sun Microsystems, Inc. Method and apparatus for optimizing signed and unsigned load processing in a pipelined processor
US5822620A (en) * 1997-08-11 1998-10-13 International Business Machines Corporation System for data alignment by using mask and alignment data just before use of request byte by functional unit
US7197625B1 (en) * 1997-10-09 2007-03-27 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
US6539467B1 (en) * 1999-11-15 2003-03-25 Texas Instruments Incorporated Microprocessor with non-aligned memory access
US6622242B1 (en) * 2000-04-07 2003-09-16 Sun Microsystems, Inc. System and method for performing generalized operations in connection with bits units of a data word
US20030002474A1 (en) * 2001-03-21 2003-01-02 Thomas Alexander Multi-stream merge network for data width conversion and multiplexing
US6877019B2 (en) * 2002-01-08 2005-04-05 3Dsp Corporation Barrel shifter
US7877581B2 (en) * 2002-12-12 2011-01-25 Pmc-Sierra Us, Inc. Networked processor for a pipeline architecture
US20070088772A1 (en) * 2005-10-17 2007-04-19 Freescale Semiconductor, Inc. Fast rotator with embedded masking and method therefor
US8285766B2 (en) * 2007-05-23 2012-10-09 The Trustees Of Princeton University Microprocessor shifter circuits utilizing butterfly and inverse butterfly routing circuits, and control circuits therefor
JP2011516936A (ja) * 2008-01-30 2011-05-26 グーグル・インコーポレーテッド モバイル装置イベントの通知
US8291002B2 (en) * 2009-06-01 2012-10-16 Arm Limited Barrel shifter

Patent Citations (5)

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Publication number Priority date Publication date Assignee Title
EP0695998A2 (en) * 1994-08-02 1996-02-07 Motorola, Inc. Interbus buffer
US5882620A (en) * 1995-06-07 1999-03-16 International Carbitech Industries, Inc. Pyrometallurgical process for forming tungsten carbide
US5907865A (en) * 1995-08-28 1999-05-25 Motorola, Inc. Method and data processing system for dynamically accessing both big-endian and little-endian storage schemes
CN101299185A (zh) * 2003-08-18 2008-11-05 上海海尔集成电路有限公司 一种基于cisc结构的微处理器构架及指令实现方式
CN101256546A (zh) * 2007-03-01 2008-09-03 黄新亚 32位微处理器

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Publication number Publication date
JP5584781B2 (ja) 2014-09-03
CN102713875A (zh) 2012-10-03
US20110179242A1 (en) 2011-07-21
TW201140318A (en) 2011-11-16
EP2524315A1 (en) 2012-11-21
US8356145B2 (en) 2013-01-15
JP2013517576A (ja) 2013-05-16
WO2011088351A1 (en) 2011-07-21

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