CN102684483B - Control circuit of switch-type adjuster and control method thereof - Google Patents
Control circuit of switch-type adjuster and control method thereof Download PDFInfo
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- CN102684483B CN102684483B CN201210151804.2A CN201210151804A CN102684483B CN 102684483 B CN102684483 B CN 102684483B CN 201210151804 A CN201210151804 A CN 201210151804A CN 102684483 B CN102684483 B CN 102684483B
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Abstract
The invention provides a novel control circuit of a switch-type adjuster and a control method thereof. When the load jumping occurs on the switch-type adjuster, the control circuit generates a dynamic control signal to control the state of the switch-type adjuster, so that the output voltage can be quickly restored; and when no load jumping occurs on the switch-type adjuster, the control circuit generates a stable control signal to control the state of the switch-type adjuster so as to maintain the output voltage constant, so that the dynamic response performance of the switch-type adjuster is improved.
Description
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of control circuit and control method thereof of switch type regulator.
Background technology
Prior art breaker in middle type adjuster is widely used in providing stable voltage source to various electric system.In low power-supply device, (as laptop computer, mobile phone etc.) battery management especially needs high efficiency switch type regulator (such as, DC-DC converter).Switch type regulator converts high-frequency voltage to input direct voltage, then high-frequency output voltage is carried out filtering and then converts VD to.Specifically, switch type regulator is made up of power stage circuit and control circuit two parts usually.The function of control circuit is when input voltage, inner parameter and external load change, the turn-on and turn-off time of the switching system in regulating power level circuit, keeps constant to make the output voltage of switch type regulator or output current.Therefore, in the design of switch type regulator, the Choice and design of control circuit or control method for switch type regulator performance be very important.Different detection signals and different control circuits is adopted to have different control effects.
In prior art, the control mode of switch type regulator has a variety of, and basic comprises fixed-frequency control and variable frequency control.Fixed-frequency control and switch periods invariable, carry out regulation output voltage, i.e. pulse width modulation (PWM) by the width of switch conduction in adjustment one-period.Variable frequency control has constant on-time, constant off-time and sluggishness to compare several control modes such as control.
But, when the load generation saltus step of switch type regulator, as load becomes heavy duty from underloading, or become underloading from heavy duty, for the control mode of existing switch type regulator, because control circuit needs an error amplifier to amplify the error between the sampled value of main circuit output voltage and reference voltage level usually, circuit structure is complicated, needs suitable compensating network to ensure the stability of system; Further, dynamic response performance is owing to being subject to the restriction of system bandwidth, and response speed is comparatively slow, needs longer recovery time.
With reference to figure 1, be depicted as the working waveform figure of a kind of switch type regulator when load generation saltus step adopting prior art.Visible, at t
1in the moment, the load transients of switch type regulator becomes heavy duty from underloading, output current I
outmoment is by I
1increase to I
2; Now, still regulate for the on off state of pwm control signal to switch type regulator, inductive current I
lslow rising, output voltage V
outafter the recovery time through one period of long period, at t
2moment slowly returns to normal value.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of control circuit and control method thereof of novel switch type regulator.
According to control circuit and the control method of switch type regulator of the present invention, by the real-time detection to output voltage, not only achieve the judgement to load jump state; And, when there is load jump, replaced the control signal of lower state by the dynamic control signal that another regulating effect is stronger, control the on off state of described switch type regulator, thus enable the output voltage of switch type regulator return to desired value fast.
According to the control circuit of the switch type regulator of one embodiment of the invention, comprise, load jump decision circuitry, steady state control signal circuit for generating and dynamic control signal circuit for generating, wherein,
Described load jump decision circuitry is in order to judge load jump state according to the relation between the output voltage of described switch type regulator detected and the first voltage preset value and the second voltage preset value; When there is load jump, produce a skip signal;
Described steady state control signal circuit for generating is in order to produce a steady state control signal according to the desired output voltage of described output voltage and described switch type regulator;
Described dynamic control signal circuit for generating is in order to produce a dynamic control signal according to described output voltage;
When described switch type regulator generation load jump, described dynamic control signal controls the state of described switch type regulator, to make the fast quick-recovery of described output voltage;
When load jump does not occur described switch type regulator, described steady state control signal controls the state of described switch type regulator, maintains described output voltage constant.
Further, described load jump decision circuitry comprises the first comparator and the second comparator, two inputs of described first comparator receive described output voltage and described first voltage preset value respectively, when described output voltage is less than described first voltage preset value, the saltus step of described switch type regulator generation reverse load;
Two inputs of described second comparator receive described output voltage and described second voltage preset value respectively, when described output voltage is greater than described second voltage preset value, and described switch type regulator generation forward load jump.
Further, described dynamic control signal circuit for generating comprises valley decision circuitry, in order to receive described output voltage, to produce a valley signal when described output voltage arrives valley;
Described dynamic control signal circuit for generating also comprises peak value decision circuitry, in order to receive described output voltage, with at described output voltage to producing a peak signal during peaking.
Described dynamic control signal circuit for generating also comprises a logical circuit, in order to produce described dynamic control signal according to the described skip signal that receives and described valley signal or described peak signal; The effective status interval of described dynamic control signal is the initial time of initial time to the effective status of described valley signal or described peak signal of the effective status of described skip signal.
According to the control method of a kind of switch type regulator of one embodiment of the invention, comprise the following steps:
Step 1: the output voltage detecting described switch type regulator;
Step 2: the load condition judging described switch type regulator according to the relation between described output voltage and the first voltage preset value and the second voltage preset value; When described switch type regulator generation load jump, produce a skip signal;
Step 3-1: when described switch type regulator is in lower state, utilizes a steady state control signal to control the state of described switch type regulator, maintains substantially constant to make the output voltage of described switch type regulator;
Step 3-2: when described switch type regulator generation load jump, utilize a dynamic control signal to control the state of described switch type regulator, to make the fast quick-recovery of the output voltage of described switch type regulator.
Further, described step 2 comprises the following steps:
More described output voltage and described first voltage preset value;
When described output voltage is less than described first voltage preset value, the saltus step of described switch type regulator generation reverse load;
More described output voltage and described second voltage preset value;
When described output voltage is greater than described second voltage preset value, described switch type regulator generation forward load jump;
When described output voltage is greater than described first voltage preset value and is less than described second voltage preset value, described switch type regulator is in lower state.
Further, the generating step of dynamic control signal comprises:
Detect described output voltage, and judge whether output voltage arrives valley or peak value;
When described output voltage arrives valley, produce a valley signal;
According to described valley signal and described skip signal, produce described dynamic control signal;
The valid interval of described dynamic control signal is the initial time of initial time to the effective status of described valley signal of described skip signal effective status;
When described output voltage is to peaking, produce a peak signal;
According to described peak signal and described skip signal, produce described dynamic control signal;
The valid interval of described dynamic control signal is the initial time of initial time to the effective status of described peak signal of described skip signal effective status.
Further, the generating step of dynamic control signal also comprises:
Described output voltage is converted to digital output voltage;
Relatively Contemporary Digital output voltage and the first voltage preset value and the second voltage preset value;
Judge whether Contemporary Digital output voltage is less than the first voltage pre-set limit;
If Contemporary Digital output voltage is less than the first voltage pre-set limit, described dynamic control signal becomes effective status from disarmed state;
Otherwise, continue to detect Contemporary Digital output voltage;
Judge whether Contemporary Digital output voltage is greater than last digit output voltage;
If Contemporary Digital output voltage is greater than last digit output voltage, counter adds one;
If Contemporary Digital output voltage is less than last digit output voltage, counter O reset;
Judge whether the numerical value of counter arrives a preset value;
When the numerical value of counter reaches a preset value, described dynamic control signal becomes disarmed state from effective status;
Otherwise, continue to compare Contemporary Digital output voltage and last digit output voltage;
Judge whether Contemporary Digital output voltage is greater than the second voltage pre-set limit;
If Contemporary Digital output voltage is greater than the second voltage pre-set limit, described dynamic control signal becomes effective status from disarmed state;
Otherwise, continue to compare Contemporary Digital output voltage and the second voltage pre-set limit;
Relatively Contemporary Digital output voltage and last digit output voltage;
If Contemporary Digital output voltage is less than last digit output voltage, counter adds one;
If Contemporary Digital output voltage is greater than last digit output voltage, counter O reset;
Judge whether the numerical value of counter arrives a preset value;
If when the numerical value of counter is greater than a preset value, described dynamic control signal becomes disarmed state from effective status;
Otherwise, continue the numerical value judging counter.
According to control circuit and the control method of switch type regulator of the present invention, do not need complicated sample circuit, logic and sequential, by means of only to the detection of output voltage and judgement, and according to the variation tendency of the output voltage detected and amplitude, produce the switch motion of switch type regulator when the strong dynamic control signal of the more common pwm control signal of a regulating effect carrys out control load saltus step, thus enable the output voltage of switch type regulator return to desired value fast, significantly improve the dynamic responding speed of switch type regulator.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments of the invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to the accompanying drawing provided.
Figure 1 shows that and adopt the working waveform figure of a kind of switch type regulator of prior art when there is load jump;
Figure 2 shows that the theory diagram of the control circuit of a kind of switch type regulator according to first embodiment of the invention;
Fig. 3 A is depicted as the theory diagram according to the dynamic control signal circuit for generating in the control circuit of a kind of switch type regulator of second embodiment of the invention;
Fig. 3 B is depicted as the first operation oscillogram of the dynamic control signal circuit for generating in the control circuit of a kind of switch type regulator of the foundation second embodiment of the invention shown in Fig. 3 A;
Fig. 3 C is depicted as the second operation oscillogram of the dynamic control signal circuit for generating in the control circuit of a kind of switch type regulator of the foundation second embodiment of the invention shown in Fig. 3 A;
Figure 4 shows that the theory diagram according to the valley decision circuitry in the dynamic control signal circuit for generating of one embodiment of the invention;
Figure 5 shows that the theory diagram according to the peak value decision circuitry in the dynamic control signal circuit for generating of one embodiment of the invention;
Figure 6 shows that the theory diagram according to the logical circuit in the dynamic control signal circuit for generating of one embodiment of the invention;
Figure 7 shows that the flow chart of the control method of a kind of switch type regulator according to one embodiment of the invention;
Figure 8 shows that the flow chart of the production method according to the dynamic control signal in the control method of the switch type regulator of the first embodiment of the present invention;
Figure 9 shows that the flow chart of the digital production method according to the dynamic control signal in the control method of the switch type regulator of embodiments of the invention.
Embodiment
Below in conjunction with accompanying drawing, several preferred embodiment of the present invention is described in detail, but the present invention is not restricted to these embodiments.The present invention contain any make on marrow of the present invention and scope substitute, amendment, equivalent method and scheme.To have the present invention to make the public and understand thoroughly, in the following preferred embodiment of the present invention, describe concrete details in detail, and do not have the description of these details also can understand the present invention completely for a person skilled in the art.
With reference to figure 2, be depicted as the theory diagram of the control circuit of a kind of switch type regulator according to first embodiment of the invention.In this embodiment, adopt voltage-dropping type topological structure to be described for the power stage circuit 204 of switch type regulator, power stage circuit 204 comprises power switch tube S
0, rectifier diode D
0, outputting inductance L
0with output capacitance C
0, its connected mode and operation principle same as the prior art, do not repeat them here.The control circuit according to switch type regulator of the present invention shown in Fig. 2 comprises load jump decision circuitry 201, steady state control signal circuit for generating 202 and dynamic control signal circuit for generating 203; Wherein,
Described load jump decision circuitry 201 receives the output voltage V of described power stage circuit 204
out; When saltus step occurs in the load 205 of switch type regulator, described load jump decision circuitry 201 produces a skip signal S
load;
Further, described load jump decision circuitry 201 comprises the first comparator and the second comparator; Two inputs of described first comparator receive described output voltage and the first voltage preset value respectively, and when described output voltage is less than described first voltage preset value, the saltus step of described switch type regulator generation reverse load, produces the first saltus step sub-signal S
load1.Two inputs of described second comparator receive described output voltage and the second voltage preset value respectively, and when described output voltage is greater than described second voltage preset value, described switch type regulator generation forward load jump, produces the second saltus step sub-signal S
load2.First saltus step sub-signal S
load1with the second saltus step sub-signal S
load2characterize the different saltus steps of load, both are jointly as skip signal S
load.When described output voltage is greater than the first voltage preset value and is less than the second voltage preset value, described switch type regulator is in steady state operating conditions.Here, described first preset value can be chosen as 90%-95% of the desired output voltage of described switched mode converter.Described first preset value can be chosen as 105%-110% of the desired output voltage of described switched mode converter.
Described steady state control signal circuit for generating 202 is connected with described load jump decision circuitry 201, to receive described skip signal S
load, output voltage V
outwith a reference voltage V
ref; When there is not load jump in described load 204, i.e. skip signal S
loadtime invalid, described steady state control signal circuit for generating 202 is according to described output voltage V
outwith described reference voltage V
ref, produce a steady state control signal V
ctrl_scontrol the on off state of described power stage circuit 204, to ensure the output voltage V of described power stage circuit 204
outwith described reference voltage V
refequal.
Described dynamic control signal circuit for generating 203 is connected with described load jump decision circuitry 201, searches described skip signal S to connect
loadwith the electric V of output
out; When there is load jump in described load 206, i.e. skip signal S
loadtime effective, described dynamic control signal circuit for generating 203 is according to described output voltage V
outproduce a dynamic control signal V
ctrl_tcontrol the on off state of described power stage circuit 204, to make the output voltage V of described power stage circuit 204
outreturn to described reference voltage V fast
ref; Now, described steady state control signal V
ctrl_sregulable control is not carried out to power stage circuit 204.
The control circuit of the switch type regulator shown in Fig. 2 can also comprise selection circuit 206, and it receives skip signal S respectively
load, steady state control signal V
ctrl_swith dynamic control signal V
ctrl_t; As described skip signal S
loadtime invalid, steady state control signal V
ctrl_sbe passed to power stage circuit 204; As described skip signal S
loadtime effective, dynamic control signal V
ctrl_tbe passed to power stage circuit 204.Those skilled in the art can learn, described selection circuit can be the circuit of any suitable form, as comprise by as described in skip signal S
loadcontrol the first switch S 1 and by described skip signal S
loadnon-signal
the second switch S2 controlled.Described steady state control signal circuit for generating 202 can be pwm control circuit, Time constant control circuit or any suitable control circuit; Described power stage circuit 204 can be voltage-dropping type, booster type, the topological structure of buck-boost or any suitable form.
Visible, adopt the control circuit of the switch type regulator of the foundation one embodiment of the invention shown in Fig. 2, by to the detection of output voltage and judgement, and according to the variation tendency of the output voltage detected and amplitude, produce the switch motion of switch type regulator when the strong dynamic control signal of the more common pwm control signal of a regulating effect carrys out control load saltus step, thus enable the output voltage of switch type regulator return to desired value fast, significantly improve the dynamic responding speed of switch type regulator.
With reference to figure 3A, be depicted as the theory diagram of the dynamic control signal circuit for generating according to one embodiment of the invention.In this embodiment, described dynamic control signal circuit for generating comprises valley decision circuitry 30l, peak value decision circuitry 302 and a logical circuit 303.Wherein,
Valley decision circuitry 30l comprises the first output voltage sampling circuit 304, first capacitance voltage holding circuit 305 and the first comparison circuit 306;
Peak value decision circuitry 302 comprises the second output voltage sampling circuit 307, second capacitance voltage holding circuit 308 and the second comparison circuit 309.
In the course of the work, the output voltage V of the first output voltage sampling circuit 304 receiving key type adjuster
out, to obtain the described output voltage V of a sign
outon the occasion of the first sampled voltage V
samplel; Then the first capacitance voltage holding circuit 305 receives the first sampled voltage V
sample1with skip signal S
load(as the first saltus step sub-signal S
load1), as skip signal S
loadtime effective, described first sampled voltage V
sample1electric capacity in described capacitance voltage holding circuit 305 is charged; As described skip signal S
loadtime invalid, the electric capacity in described capacitance voltage holding circuit 305 discharges, to produce the first capacitance voltage V at the first end of described electric capacity
c1; At skip signal S
loadin effective status interval, the first capacitance voltage V
c1follow the first sampled voltage V
sample1; Therefore, due to the maintenance effect of capacitance versus voltage, as the first sampled voltage V
sample1after arriving valley, the first capacitance voltage V
c1the first sampled voltage V will be greater than
sample1, thus detect the first sampled voltage V
sample1valley, i.e. output voltage V
outvalley;
First comparison circuit 306 receives the first capacitance voltage V respectively
c1with the first sampled voltage V
sample1, at arrival first sampled voltage V
sample1valley after, the output of the first comparison circuit 306 produces valley signal V by an inverter
valley.
Based on substantially identical operation principle, the output voltage V of the second output voltage sampling circuit 307 receiving key type adjuster
out, to obtain the described output voltage V of a sign
outthe second sampled voltage V
sample2; Then the second capacitance voltage holding circuit 308 receives the second sampled voltage V
sample1with skip signal S
load(as the second skip signal S
load2), as skip signal S
loadtime effective, described second sampled voltage V
sample2electric capacity in described capacitance voltage holding circuit 308 is charged; As described skip signal S
loadtime invalid, the electric capacity in capacitance voltage holding circuit 308 discharges, to produce the second capacitance voltage V at the first end of described electric capacity
c2; At skip signal S
loadin effective status interval, the second capacitance voltage V
c2follow the first sampled voltage V
sample2; Therefore, due to the maintenance effect of capacitance versus voltage, as the second sampled voltage V
sample2after peaking, the second capacitance voltage V
c2the second sampled voltage V will be greater than
sample2, thus detect the second sampled voltage V
sample2peak value, i.e. output voltage V
outpeak value;
Second comparison circuit 309 receives the second capacitance voltage V respectively
c2with the second sampled voltage V
sample2, at arrival second sampled voltage V
sample2peak value after, the output of the second comparison circuit 306 is as peak signal V
peak.
Below in conjunction with the second operation oscillogram of the dynamic control signal circuit for generating in the control circuit of the switch type regulator shown in the first operation oscillogram of the dynamic control signal circuit for generating in the control circuit of the switch type regulator shown in Fig. 3 B and Fig. 3 C, describe the operation principle of the switch type regulator adopting the dynamic control signal circuit for generating shown in Fig. 3 A in detail.
In figure 3b, the load of switch type regulator is at t
0moment becomes heavy duty from underloading, namely reverse load saltus step occurs, output current I
outmoment is by I
1rise to I
2; Output voltage V
outstart to decline, when at t
1moment, output voltage V
outdrop to the first voltage preset value V
th1time, skip signal S
load(the first saltus step sub-signal S
load1) become low level from high level, dynamic control signal V
ctrl_thigh level is become, inductive current I from low level
lstart to rise; Now, steady state control signal V
ctrl_sbe failure to actuate; Then output voltage V is judged
outwhen arrive valley; At t
2moment, output voltage V
outreach valley, now, valley signal V
valleyhigh level is become from low level; Dynamic control signal V simultaneously
ctrl_tlow level is become from high level; Steady state control signal V
ctrl_sstart action, output voltage V
outcontinue to rise; At t
3moment, output voltage V
outrise to the first voltage preset value V
th1, skip signal S
loadhigh level is become from low level; Valley signal V simultaneously
valleylow level is become from high level.The operating state of switch type regulator is by dynamically transferring stable state to.
In fig. 3 c, the load of switch type regulator is at t
4moment becomes underloading from heavy duty, namely forward load jump occurs, output current I
outmoment is by I
3drop to I
4; Output voltage V
outstart to rise, when at t
5moment, output voltage V
outrise to the second voltage preset value V
th2time, skip signal S
load(the first saltus step sub-signal S
load1) become low level from high level, dynamic control signal V
ctrlthigh level is become, inductive current I from low level
lstart to decline; Now, steady state control signal V
ctrl_sbe failure to actuate; Then output voltage V is judged
outwhen arrive peaking; At t
6moment, output voltage V
outreach peak value, now, peak signal V
peakhigh level is become from low level; Dynamic control signal V simultaneously
ctrl_tlow level is become from high level; Steady state control signal V
ctrl_sstart action, output voltage V
outcontinuous decrease; At t
7moment, output voltage V
outdrop to the second voltage preset value V
th2, skip signal S
loadhigh level is become from low level; Peak signal V simultaneously
peaklow level is become from high level.The operating state of switch type regulator is by dynamically transferring stable state to.
As can be seen from Fig. 3 B and Fig. 3 C, adopt the control circuit according to switch type regulator of the present invention, when there is load jump, compared to the switch type regulator of prior art, the maximum rate of change of output voltage is by reduction about 30%, and dynamic response time is by reduction about 50%; When the reduction of voltage transformation rate makes load jump occurs, can not overshoot voltage be produced, avoid damaging circuit components, substantially increase the stability of switch type regulator, and dynamic respective performances.
Below in conjunction with specific embodiment, describe the implementation according to the valley decision circuitry in dynamic control signal circuit for generating of the present invention, peak value decision circuitry and logical circuit in detail.
With reference to figure 4, be depicted as the theory diagram according to the peak value decision circuitry in the dynamic control signal circuit for generating of one embodiment of the invention.In this embodiment, the second output voltage sampling circuit is the resistor voltage divider circuit be made up of the resistance R1 be connected in series and resistance R2, and it receives output voltage V
outwith the points of common connection A place's generation second sampled voltage V at resistance R1 and resistance R2
sample2;
Electric capacity C
holdcharging operations by being connected in series in electric capacity C
holdthe switch S 3 of first end and diode D1 control, the switch motion of switch S 3 is by skip signal S
load(the second saltus step sub-signal S
load2) control; With skip signal S
loadlow level effective is example, skip signal S
loadthrough the state of inverter IV1 control switch S3; Electric capacity C
holdcharging operations controlled by the switch S 4 be connected in parallel with it; Here, skip signal S
loadthe state of direct control switch S4;
The in-phase input end of comparator CMP2 is connected to electric capacity C
holdfirst end, inverting input receives the second sampled voltage V
sample2, the output signal of output is as peak signal V
peak.
The operation principle of the peak value decision circuitry shown in Fig. 4 is described in detail below in conjunction with the working waveform figure according to dynamic control signal circuit for generating of the present invention shown in Fig. 3 C.
In the course of the work, when there is reverse saltus step in load, i.e. skip signal S
loadduring for Low level effective, switch S 4 disconnects, and now switch S 3 closes, the second sampled voltage V
sample2by diode D1 and switch S 3 couples of electric capacity C
holdcharge, electric capacity C
holdthe second capacitance voltage V at first end B point place
c2follow the second sampled voltage V
sample2;
At output voltage V
outduring to peaking, due to the maintenance effect of capacitance versus voltage, and the clamping action of diode, make the second capacitance voltage V at B point place
c2remain a peak value, and input to the in-phase input end of comparator CMP2; And the input signal V of the inverting input of comparator CMP2
sample2follow output voltage, therefore, at time interval t
6-t
7in, the second sampled voltage V
sample2be less than the second capacitance voltage V
c2, the output signal of comparator CMP2 remains high level in this time interval; As skip signal S
loadat t
7moment, when becoming high level, switch S 3 disconnected, and switch S 4 closes, electric capacity C
holddischarged by switch S 4, the second sampled voltage V
sample2be greater than the second capacitance voltage V
c2, peak signal V
peaklow level is become from high level.
Those skilled in the art are according to instruction of the present invention, based on identical inventive principle, can learn that peak value decision circuitry of the present invention is not limited to the specific embodiment shown in Fig. 4, the peak value decision circuitry of any suitable form is all applicable to switch type regulator of the present invention.
With reference to figure 5, be depicted as the theory diagram according to the valley decision circuitry in the dynamic control signal circuit for generating of one embodiment of the invention.In this embodiment, the first output voltage sampling circuit comprises an operational amplification circuit, with the output voltage V by change on a declining curve
outbe converted to the first sampled voltage V of corresponding change in rising trend
sample1; Described operational amplification circuit comprises operational amplifier EA1; Resistance R5 and resistance R6 is connected in series in a voltage source V
ref1with between ground, the points of common connection C of resistance R5 and resistance R6 is connected to the in-phase input end of operational amplifier EA1; Resistance R7 and resistance R8 is connected in series in output voltage V
outwith between the output of operational amplifier EA1, the points of common connection D of resistance R7 and resistance R8 is connected to the inverting input of operational amplifier EA1.
Electric capacity C
hold1charging operations by being connected in series in electric capacity C
hold1the switch T1 of first end and diode D2 control, the switch motion of switch T1 is by skip signal S
load(the first saltus step sub-signal S
load1) control; With skip signal S
loadlow level effective is example, skip signal S
loadthrough the state of inverter IV2 control switch T1; Electric capacity C
hold1charging operations controlled by the switch T2 be connected in parallel with it; Here, skip signal S
loadthe state of direct control switch T2;
The in-phase input end of comparator CMP3 is connected to electric capacity C
hold1first end, inverting input receives the first sampled voltage V
sample1, the output signal of output is using as valley signal V
valley.
The operation principle of the valley decision circuitry shown in Fig. 5 is described in detail below in conjunction with the working waveform figure according to dynamic control signal circuit for generating of the present invention shown in Fig. 3 B.
In the course of the work, when there is reverse saltus step in load, i.e. skip signal S
loadduring for Low level effective, switch T2 disconnects, and now switch T1 closes, the first sampled voltage V
sample1by diode D2 and switch T1 to electric capacity C
hold1charge, electric capacity C
hold1the first capacitance voltage V at first end E point place
c1follow the first sampled voltage V
sample1;
At output voltage V
outwhen arriving valley, due to the maintenance effect of capacitance versus voltage, and the clamping action of diode, make the first capacitance voltage V at E point place
c1remain the peak value of a correspondence, and input to the in-phase input end of comparator CMP3; And the input signal V of the inverting input of comparator CMP3
sample1follow output voltage, therefore, at time interval t
3-t
4in, the first sampled voltage V
sample1be less than the first capacitance voltage V
c1, the output signal of comparator CMP3 remains high level in this time interval; As skip signal S
loadat t
4moment, when becoming high level, switch T1 disconnected, and switch T2 closes, electric capacity C
hold1discharged by switch T2, the first sampled voltage V
sample1be greater than the first capacitance voltage V
c1, valley signal V
valleylow level is become from high level.
Those skilled in the art are according to instruction of the present invention, based on identical inventive principle, can learn that valley decision circuitry of the present invention is not limited to the specific embodiment shown in Fig. 5, the valley decision circuitry of any suitable form is all applicable to switch type regulator of the present invention.
With reference to figure 6, be depicted as the theory diagram according to the logical circuit in the dynamic control signal circuit for generating of one embodiment of the invention.In this embodiment, logical circuit comprises skip signal receiving circuit 607, peak value and valley signal receiving circuit 608 and logical circuit 606; Wherein,
Skip signal receiving circuit 607 comprises or door 601, inverter 602 and pulse circuit for generating 603; Or two of door 601 inputs receive the first saltus step sub-signal S
load1with the second saltus step sub-signal S
load2;
Peak value and valley signal receiving circuit 608 comprise or door 604 and pulse circuit for generating 605; Or two of door 604 inputs receive peak signal V respectively
peakwith valley signal V
valley;
Logical circuit comprises a rest-set flip-flop 606, and its set end is connected to pulse circuit for generating 603, and reset terminal is connected to pulse circuit for generating 605;
It is effectively example when taking skip signal as low level, when skip signal is effective, by the set end of inverter 602 and pulse circuit for generating 603 set rest-set flip-flop 606, output Q becomes high level from low level, and continues to the initial time of the effective status of peak signal or valley signal always; Peak signal or valley signal to be resetted rest-set flip-flop 606 by pulse circuit for generating 605, and output Q becomes low level from high level, thus obtains dynamic control signal V at output Q
ctrl_t.
Those skilled in the art are according to instruction of the present invention, and based on identical inventive principle, can learn that logical circuit of the present invention is not limited to the specific embodiment shown in Fig. 6, the logic of any suitable form is all applicable to switch type regulator of the present invention.In this embodiment, peak signal and valley signal share a logical circuit, but equally also can utilize a logical circuit respectively.
And, the control circuit of switch type regulator of the present invention is not limited to above-mentioned logic and sequential relationship, effective status as skip signal can be high level etc., those skilled in the art can learn, for different logical relations, only need corresponding to peak value decision circuitry, valley decision circuitry and logical circuit are changed accordingly.
More than describe the analog circuit implementation of the control circuit of the switch type regulator according to inventive principle of the present invention in detail, those skilled in the art can learn, according to instruction of the present invention, the digital circuit mode based on same principle can realize the present invention equally.The part such as analog to digital converter and digital processing unit can be comprised according to dynamic control signal circuit for generating of the present invention as what adopt digital circuit.Analog to digital converter receives output voltage and is converted into digital output voltage, and the process then through digital processing unit produces dynamic control signal.
The control method according to switch type regulator of the present invention is described in detail below in conjunction with specific embodiment.
With reference to figure 7, be depicted as the flow chart of the control method of the switch type regulator according to one embodiment of the invention.In this embodiment, the control method of switch type regulator comprises the following steps:
S701: the output voltage of sense switch type adjuster;
S702: according to described output voltage and the first voltage preset value and the second voltage preset value, judge whether described switch type regulator load jump occurs; When described switch type regulator generation load jump, produce a skip signal;
Its deterministic process can be following steps:
More described output voltage and the first voltage preset value;
When described output voltage is less than described first voltage preset value, the saltus step of described switch type regulator generation reverse load;
More described output voltage and the second voltage preset value;
When described output voltage is greater than described second voltage preset value, described switch type regulator generation forward load jump;
When described output voltage is greater than described first voltage preset value and is less than described second voltage preset value, described switch type regulator is in lower state.
S703-1: when described switch type regulator is in lower state, utilizes a steady state control signal to control the state of described switch type regulator, maintains substantially constant to make the output voltage of described switch type regulator;
S703-2: when described switch type regulator generation load jump, utilize a dynamic control signal to control the state of described switch type regulator, to make the fast quick-recovery of the output voltage of described switch type regulator.
Wherein, the step producing steady state control signal comprises:
Described steady state control signal is produced according to the error between described output voltage and the desired output voltage of described switch type regulator.
Described steady state control signal can be pwm control signal.
Wherein, produce the step of dynamic control signal as shown in Figure 8, it comprises the following steps:
S801: the output voltage of sense switch type adjuster, and judge whether output voltage reaches valley or peak value;
S802: when described output voltage arrives valley, produce a valley signal;
S803: according to described valley signal and described skip signal, produce described dynamic control signal;
The valid interval of described dynamic control signal is the initial time of initial time to the effective status of described valley signal of described skip signal effective status;
S804: when described output voltage is to peaking, produce a peak signal;
S805: according to described peak signal and described skip signal, produce described dynamic control signal;
The valid interval of described dynamic control signal is the initial time of initial time to the effective status of described peak signal of described skip signal effective status.
Further, the generating step of described dynamic control signal also comprises:
The first single pulse signal is produced at the initial time of the effective status of described skip signal;
The second single pulse signal is produced at the initial time of the effective status of described peak signal or valley signal;
The set termination of one rest-set flip-flop receives described first single pulse signal, and reset terminal receives described second single pulse signal, and the output signal of described rest-set flip-flop is as described dynamic control signal.
Further, the generation step of described valley signal comprises:
To sample described output voltage, with produce one on the occasion of sampled voltage;
When described skip signal is effective, described sampled voltage is utilized to charge to an electric capacity;
When described skip signal is invalid, described electric capacity discharges, to produce a capacitance voltage at the first end of described electric capacity;
More described capacitance voltage and described sampled voltage, comparative result is as described valley signal.
Further, the generation step of described peak signal comprises:
To sample described output voltage, to produce a sampled voltage;
When described skip signal is effective, described sampled voltage is utilized to charge to an electric capacity;
When described skip signal is invalid, described electric capacity discharges, to produce a capacitance voltage at the first end of described electric capacity;
More described capacitance voltage and described sampled voltage, comparative result is as described peak signal.
With reference to figure 9, be depicted as the Digital Implementation method flow diagram according to the dynamic control signal circuit for generating in switch type regulator of the present invention, it comprises the following steps:
S901: described output voltage is converted to digital output voltage;
S902: compare Contemporary Digital output voltage and the first voltage preset value and the second voltage preset value;
S903: judge whether Contemporary Digital output voltage is less than the first voltage pre-set limit;
S904: if Contemporary Digital output voltage is less than the first voltage pre-set limit, described dynamic control signal becomes effective status from disarmed state;
Such as can for become low level signal from high level signal;
Otherwise, continue to detect Contemporary Digital output voltage;
S905: judge whether Contemporary Digital output voltage is greater than last digit output voltage;
S906: if Contemporary Digital output voltage is greater than last digit output voltage, counter adds one;
S907: if Contemporary Digital output voltage is less than last digit output voltage, counter O reset;
S908: judge whether the numerical value of counter arrives a preset value;
S909: when the numerical value of counter reaches a preset value, described dynamic control signal becomes disarmed state from effective status;
Such as can become high level signal from low level signal;
Otherwise, continue to compare Contemporary Digital output voltage and last digit output voltage;
S910: judge whether Contemporary Digital output voltage is greater than the second voltage pre-set limit;
S911: if Contemporary Digital output voltage is greater than the second voltage pre-set limit, described dynamic control signal becomes effective status from disarmed state;
Such as can for become low level signal from high level signal;
Otherwise, continue to compare Contemporary Digital output voltage and the second voltage pre-set limit;
S912: compare Contemporary Digital output voltage and last digit output voltage;
S913: if Contemporary Digital output voltage is less than last digit output voltage, counter adds one;
S914: if Contemporary Digital output voltage is greater than last digit output voltage, counter O reset;
S915: judge whether the numerical value of counter arrives a preset value;
S916: if when the numerical value of counter is greater than a preset value, described dynamic control signal becomes disarmed state from effective status;
Such as can for become high level signal from low level signal;
Otherwise, continue the numerical value judging counter.
Wherein, described preset value can be 3 or other suitable numerical value, ensures valley or peak value fully to be detected, avoids error detection.
Those skilled in the art can learn, according to instruction of the present invention, can realize the present invention equally based on other suitable digital control methods of general principle of the present invention.
In sum, carried out detailed description to according to the control circuit of switch type regulator of embodiments of the invention and control method above, those of ordinary skill in the art can know other technologies or structure and circuit layout, element etc. accordingly by inference and all can be applicable to described embodiment.Steady state control signal can be pwm control signal or other suitable control signals, as Time constant control signal etc.; Sequential relationship and logical relation can be not limited to embodiments of the invention, and any suitable logical relation all goes for the present invention.Logical circuit or capacitance voltage holding circuit can come to utilize for peak signal or valley signal, or merge into respectively a single circuit to share for peak signal or valley signal for independently two circuit.
Between each embodiment in this specification identical similar part mutually see, what each embodiment stressed is the difference with other embodiments.Some or all of module wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.Those of ordinary skill in the art, when not paying creative work, are namely appreciated that and implement.
According to embodiments of the invention as described above, these embodiments do not have all details of detailed descriptionthe, do not limit the specific embodiment that this invention is only described yet.Obviously, according to above description, can make many modifications and variations.This specification is chosen and is specifically described these embodiments, is to explain principle of the present invention and practical application better, thus makes art technical staff that the present invention and the amendment on basis of the present invention can be utilized well to use.The present invention is only subject to the restriction of claims and four corner and equivalent.
Claims (9)
1. a control circuit for switch type regulator, is applied in a switch type regulator, it is characterized in that, comprises load jump decision circuitry, steady state control signal circuit for generating and dynamic control signal circuit for generating, wherein,
Described load jump decision circuitry is in order to judge load jump state according to the relation between the output voltage of described switch type regulator detected and the first voltage preset value and the second voltage preset value;
When described output voltage is less than described first voltage preset value or is greater than described second voltage preset value when described output voltage, described switch type regulator generation load jump, to produce a skip signal;
Described steady state control signal circuit for generating is in order to produce a steady state control signal according to the desired output voltage of described output voltage and described switch type regulator;
Described dynamic control signal circuit for generating is in order to produce a dynamic control signal according to described output voltage;
Described dynamic control signal circuit for generating comprises valley decision circuitry, in order to receive described output voltage, to produce a valley signal when described output voltage arrives valley;
Described dynamic control signal circuit for generating also comprises peak value decision circuitry, in order to receive described output voltage, with at described output voltage to producing a peak signal during peaking;
Described dynamic control signal circuit for generating also comprises a logical circuit, in order to produce described dynamic control signal according to the described skip signal that receives and described valley signal or described peak signal; The effective status interval of described dynamic control signal is the initial time of initial time to the effective status of described valley signal or described peak signal of the effective status of described skip signal;
When described switch type regulator generation load jump, described dynamic control signal controls the state of described switch type regulator, to make the fast quick-recovery of described output voltage;
When load jump does not occur described switch type regulator, described steady state control signal controls the state of described switch type regulator, maintains described output voltage constant.
2. control circuit according to claim 1, is characterized in that, described valley decision circuitry comprises the first sample circuit, the first capacitance voltage holding circuit and the first comparison circuit; Wherein,
Described first sample circuit in order to described output voltage of sampling, and is converted into a positive sampled voltage;
Described first capacitance voltage holding circuit is in order to receive described sampled voltage and described skip signal, and when described skip signal is effective, described sampled voltage charges to the electric capacity in described first capacitance voltage holding circuit; When described skip signal is invalid, the electric capacity in described first capacitance voltage holding circuit discharges, to produce a capacitance voltage at the first end of described electric capacity;
Described first comparison circuit receives described capacitance voltage and described sampled voltage respectively, and the output of described first comparison circuit produces described valley signal by an inverter.
3. control circuit according to claim 1, is characterized in that, described peak value decision circuitry comprises the second sample circuit, the second capacitance voltage holding circuit and the second comparison circuit; Wherein,
Described second sample circuit in order to described output voltage of sampling, and is converted into a sampled voltage;
Described second capacitance voltage holding circuit is in order to receive described sampled voltage and described skip signal, and when described skip signal is effective, described sampled voltage charges to the electric capacity in described second capacitance voltage holding circuit; When described skip signal is invalid, the electric capacity in described second capacitance voltage holding circuit discharges, to produce a capacitance voltage at the first end of described electric capacity;
Described second comparison circuit receives described capacitance voltage and described sampled voltage respectively, and the output of described second comparison circuit is as described peak signal.
4. control circuit according to claim 1, is characterized in that, described dynamic control signal circuit for generating comprises an analog to digital converter and a digital processing unit, wherein,
Described analog to digital converter is in order to be converted to a digital output voltage by the output voltage received;
Described digital processing unit receives described digital output voltage, with when described digital output voltage arrives valley or peak value, produces described dynamic control signal.
5. control circuit according to claim 1, is characterized in that, described switch type regulator is voltage-dropping type, booster type or boosting one voltage-dropping type topological structure.
6. a control method for switch type regulator, is characterized in that, comprises the following steps:
Step 1: the output voltage detecting described switch type regulator;
Step 2: the load condition judging described switch type regulator according to the relation between described output voltage and the first voltage preset value and the second voltage preset value;
When described output voltage is less than described first voltage preset value, there is reverse load jump in described switch type regulator;
When described output voltage is greater than described second voltage preset value, the load jump of described switch type regulator generation forward;
When described output voltage is greater than described first voltage preset value and is less than described second voltage preset value, described switch type regulator is in lower state;
Further, when described switch type regulator generation load jump, a skip signal is produced;
Step 3-1: when described switch type regulator is in lower state, utilizes a steady state control signal to control the state of described switch type regulator, maintains substantially constant to make the output voltage of described switch type regulator;
Step 3-2: when described switch type regulator generation load jump,
Judge whether output voltage arrives valley or peak value;
When described output voltage arrives valley, produce a valley signal;
According to described valley signal and described skip signal, produce a dynamic control signal; The valid interval of described dynamic control signal is the initial time of initial time to the effective status of described valley signal of described skip signal effective status;
When described output voltage is to peaking, produce a peak signal;
According to described peak signal and described skip signal, produce described dynamic control signal; The valid interval of described dynamic control signal is the initial time of initial time to the effective status of described peak signal of described skip signal effective status;
Described dynamic control signal is utilized to control the state of described switch type regulator, to make the fast quick-recovery of the output voltage of described switch type regulator.
7. control method according to claim 6, is characterized in that, the generation step of described valley signal comprises:
To sample described output voltage, with produce one on the occasion of sampled voltage;
When described skip signal is effective, described sampled voltage is utilized to charge to an electric capacity;
When described skip signal is invalid, described electric capacity discharges, to produce a capacitance voltage at the first end of described electric capacity;
More described capacitance voltage and described sampled voltage, comparative result is as described valley signal.
8. control method according to claim 6, is characterized in that, the generation step of described peak signal comprises:
To sample described output voltage, to produce a sampled voltage;
When described skip signal is effective, described sampled voltage is utilized to charge to an electric capacity;
When described skip signal is invalid, described electric capacity discharges, to produce a capacitance voltage at the first end of described electric capacity;
More described capacitance voltage and described sampled voltage, comparative result is as described peak signal.
9. control method according to claim 6, is characterized in that, the generation step of described dynamic control signal comprises:
Described output voltage is converted to digital output voltage;
Relatively Contemporary Digital output voltage and described first voltage preset value and described second voltage preset value;
Judge whether Contemporary Digital output voltage is less than described first voltage pre-set limit;
If Contemporary Digital output voltage is less than described first voltage pre-set limit, described dynamic control signal becomes effective status from disarmed state;
Otherwise, continue to detect Contemporary Digital output voltage;
Judge whether Contemporary Digital output voltage is greater than last digit output voltage;
If Contemporary Digital output voltage is greater than last digit output voltage, counter adds one;
If Contemporary Digital output voltage is less than last digit output voltage, counter O reset;
Judge whether the numerical value of counter arrives a preset value;
When the numerical value of counter reaches a preset value, described dynamic control signal becomes disarmed state from effective status;
Otherwise, continue to compare Contemporary Digital output voltage and last digit output voltage;
Judge whether Contemporary Digital output voltage is greater than the second voltage pre-set limit;
If Contemporary Digital output voltage is greater than the second voltage pre-set limit, described dynamic control signal becomes effective status from disarmed state;
Otherwise, continue to compare Contemporary Digital output voltage and the second voltage pre-set limit;
Relatively Contemporary Digital output voltage and last digit output voltage;
If Contemporary Digital output voltage is less than last digit output voltage, counter adds one;
If Contemporary Digital output voltage is greater than last digit output voltage, counter O reset;
Judge whether the numerical value of counter arrives a preset value;
If when the numerical value of counter is greater than a preset value, described dynamic control signal becomes disarmed state from effective status;
Otherwise, continue the numerical value judging counter.
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| CN103179750A (en) * | 2013-04-21 | 2013-06-26 | 杭州乐图光电科技有限公司 | Adjustable-color-temperature dimmable LED (light emitting diode) driving circuit |
| CN106100342B (en) * | 2016-06-22 | 2018-08-28 | 成都启臣微电子股份有限公司 | A kind of output dynamic load fast-response control circuit and main control chip with the circuit |
| CN106533168A (en) * | 2016-12-12 | 2017-03-22 | 北京新能源汽车股份有限公司 | Control method and device of DC-DC conversion circuit |
| CN110474521B (en) * | 2019-07-04 | 2020-12-29 | 哈尔滨工程大学 | Direct current voltage reduction power supply based on energy control |
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