CN103095129A - Switch frequency hopping synchronous voltage reduction circuit - Google Patents
Switch frequency hopping synchronous voltage reduction circuit Download PDFInfo
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- CN103095129A CN103095129A CN 201210568101 CN201210568101A CN103095129A CN 103095129 A CN103095129 A CN 103095129A CN 201210568101 CN201210568101 CN 201210568101 CN 201210568101 A CN201210568101 A CN 201210568101A CN 103095129 A CN103095129 A CN 103095129A
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Abstract
The invention discloses a switch frequency hopping synchronous voltage reduction circuit which solves the problem that an existing synchronous voltage reduction circuit is low in efficiency under a light load state. The switch frequency hopping synchronous voltage reduction circuit comprises an input port, an output port, an upper power switch, a lower power switch, an output electric inductor, an output electric capacitor, a feedback assembly, a voltage comparer, a selective switch, a frequency comparer, a sawtooth wave generator and a control and driving circuit. The switch frequency hopping synchronous voltage reduction circuit can improve the efficiency of a synchronous voltage reduction circuit in a light load state.
Description
Technical field
The present invention relates to electronic technology field, particularly a kind of synchronous buck circuit of switching frequency saltus step.
Background technology
The synchronous buck circuit is applied to usually when the required voltage occasion lower than the voltage of power supply.The representative synchronization reduction voltage circuit comprises upper power switch S1, lower power switch S2, output inductor L and the output capacitor Co that couples as shown in Figure 1.The switch periods of existing synchronous buck circuit is triggered by the clock signal of fixed frequency usually, and namely its switching frequency is the clock frequency of fixed numbers.Under heavy condition, fixing switching frequency can make the synchronous buck circuit keep high efficiency.Yet under light condition, if the switching frequency under switching frequency or heavy condition can make the Efficiency Decreasing of synchronous buck circuit.
Summary of the invention
The present invention proposes a kind of synchronous buck circuit of switching frequency saltus step, has solved existing synchronous buck circuit inefficient problem under light condition.
Technical scheme of the present invention is achieved in that
A kind of synchronous buck circuit of switching frequency saltus step comprises: input port receives input voltage; Output port provides output voltage; Upper power switch and lower power switch are coupled in series in input port and with reference between ground; Output inductor is coupled between the coupled in series node and output port of power switch and lower power switch; Output capacitor is coupled in output port and with reference between ground; Feedback component is coupled to output port and receives output voltage, and produces the feedback voltage of reflection output voltage; Voltage comparator has in-phase input end, inverting input and lead-out terminal, and its inverting input threshold level voltage, its in-phase input end are coupled to feedback component and receive feedback voltage, and its lead-out terminal produces voltage comparison signal; Selector switch, have the first terminal, the second terminal, the 3rd terminal and control terminal, its the first terminal couples the first frequency signal, its second terminal couples the second frequency signal, its control terminal is coupled to the lead-out terminal receiver voltage comparison signal of voltage comparator, and its 3rd terminal provides frequency reference signal according to voltage comparison signal; Frequency comparator has in-phase input end, inverting input and lead-out terminal, and its inverting input is coupled to the 3rd terminal receive frequency reference signal of selector switch, and its lead-out terminal provides clock signal; Sawtooth generator is coupled to the lead-out terminal receive clock signal of frequency comparator, and provides the in-phase input end of sawtooth signal to frequency comparator based on clock signal; Control and drive circuit, be coupled to the lead-out terminal receive clock signal of frequency comparator, and based on clock signal, produce double switch and drive signal, to control the break-make of upper power switch and lower power switch.
Alternatively, described feedback component comprises and is coupled in series in output port and with reference to the first resistance between ground and the second resistance, and wherein feedback voltage produces at the coupled in series Nodes of the first resistance and the second resistance.
Alternatively, greater than threshold voltage, the 3rd terminal of described selector switch is connected to its first terminal when feedback voltage, makes the inverting input of frequency comparator receive the first frequency signal; Less than threshold voltage, the 3rd terminal of described selector switch is connected to its second terminal when feedback voltage, makes the inverting input of frequency comparator receive the second frequency signal.
Alternatively, described first frequency signal is greater than the second frequency signal.
Alternatively, described sawtooth generator comprises: charging current source, charging capacitor and reset switch, three's coupled in parallel at the in-phase input end of frequency comparator with reference to ground between, wherein said reset switch further comprises control terminal, and described control terminal is coupled to the lead-out terminal receive clock signal of frequency comparator.
The invention has the beneficial effects as follows: can improve the efficient of synchronous buck circuit under light condition.
Description of drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or description of the Prior Art, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the typical circuit structural representation of existing synchronous buck circuit;
Fig. 2 is the electrical block diagram of the synchronous buck circuit 100 of a kind of switching frequency saltus step of the present invention;
Fig. 3 is the timing waveform signal of clock signal clk, sawtooth signal Vsw, frequency reference signal Vfr and output voltage V o in the synchronous buck circuit 100 of switching frequency saltus step shown in Figure 2.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills belong to the scope of protection of the invention not paying the every other embodiment that obtains under the creative work prerequisite.
As shown in Figure 2, the synchronous buck circuit 100 of switching frequency saltus step of the present invention comprises: input port 101 receives input voltage vin; Output port 102 provides output voltage V o; Upper power switch 103 and lower power switch 104 are coupled in series in input port 101 and with reference between ground; Output inductor 105 is coupled between the coupled in series node and output port 102 of power switch 103 and lower power switch 104; Output capacitor 106 is coupled in output port 102 and with reference between ground; Feedback component 107 is coupled to output port 102 and receives output voltage V o, and produces the feedback voltage Vfb of reflection output voltage V o; Voltage comparator 108 has in-phase input end, inverting input and lead-out terminal, and its inverting input threshold level voltage Vth, its in-phase input end are coupled to feedback component 107 and receive feedback voltage Vfb, and its lead-out terminal produces voltage comparison signal; Selector switch 109, have the first terminal, the second terminal, the 3rd terminal and control terminal, its the first terminal couples first frequency signal Vf1, its second terminal couples second frequency signal Vf2, its control terminal is coupled to the lead-out terminal receiver voltage comparison signal of voltage comparator 108, and its 3rd terminal provides frequency reference signal Vfr according to voltage comparison signal; Frequency comparator 110 has in-phase input end, inverting input and lead-out terminal, and its inverting input is coupled to the 3rd terminal receive frequency reference signal Vfr of selector switch 109, and its lead-out terminal provides clock signal clk; Sawtooth generator 111 is coupled to the lead-out terminal receive clock signal CLK of frequency comparator 110, and provides the in-phase input end of sawtooth signal Vsw to frequency comparator 110 based on clock signal clk; Control and drive circuit 114, be coupled to the lead-out terminal receive clock signal CLK of frequency comparator 110, and based on clock signal clk, produce double switch and drive signal, to control the break-make of upper power switch 103 and lower power switch 104.
Preferably, described sawtooth generator 111 comprises: charging current source 11, charging capacitor 12 and reset switch 13, three's coupled in parallel at the in-phase input end of frequency comparator 110 with reference to ground between, wherein said reset switch 13 further comprises control terminal, and described control terminal is coupled to the lead-out terminal receive clock signal CLK of frequency comparator 110.When clock signal clk is low level, reset switch 13 is disconnected, charging current source 11 gives charging capacitor 12 chargings, the voltage linear at charging capacitor 12 two ends increases, when it increased to the magnitude of voltage of frequency reference signal Vfr of frequency comparator 110 inverting inputs, the clock signal clk of frequency comparator 110 outputs became high level.Correspondingly, reset switch 13 is closed.So charging capacitor 12 is pulled to ground, the voltage at its two ends is reset to rapidly zero, and namely the voltage of frequency comparator 110 in-phase input ends is reset to zero.Subsequently, clock signal clk becomes low level, reset switch 13 is disconnected, charging current source 11 restarts to charging capacitor 12 charging, until charging capacitor 12 both end voltage again reach frequency comparator 110 inverting inputs frequency reference signal Vfr magnitude of voltage and trigger clock signal clk and become high level.Sawtooth generator 111 and frequency comparator 110 are worked as previously mentioned again and again, thereby produce periodically variable sawtooth signal Vsw and clock signal clk.The timing waveform schematic diagram of clock signal clk, sawtooth signal Vsw, frequency reference signal Vfr and output voltage V o is referring to Fig. 3.
Preferably, feedback component 107 comprises and is coupled in series in output port 102 and with reference to the first resistance between ground and the second resistance, and wherein feedback voltage Vfb produces at the series connection node place of the first resistance and the second resistance.
Preferably, greater than threshold voltage Vth, when namely voltage comparison signal was high level, the 3rd terminal of selector switch 109 was connected to its first terminal in feedback voltage Vfb, and making frequency reference signal Vfr is first frequency signal Vf1; Less than threshold voltage Vth, when namely voltage comparison signal was low level, the 3rd terminal of selector switch 109 was connected to its second terminal in feedback voltage Vfb, and making frequency reference signal Vfr is second frequency signal Vf2.
Preferably, first frequency signal Vf1 is greater than second frequency signal Vf2.
When the synchronous buck circuit 100 normal operation of switching frequency saltus step, when clock signal clk output high level signal, the double switch of control and drive circuit 114 outputs drives power switch 103 conductings on signal controlling, lower power switch 104 disconnects, and input voltage vin is transmitted and is converted into output voltage V o via upper power switch 103, output inductor 105 and output capacitor 106.
When the load of the synchronous buck circuit 100 of switching frequency saltus step is relatively heavier, output voltage V o less, also less of feedback voltage Vfb.Feedback voltage Vfb is less than threshold voltage Vth at this moment, and the voltage comparison signal of voltage comparator 108 outputs is low level.The 3rd terminal of selector switch 109 is connected to its second terminal, and this moment, frequency reference signal Vfr was second frequency signal Vf2.Namely under heavy condition, the magnitude of voltage of frequency reference signal Vfr is less.Sawtooth signal Vsw can early reach its peak value, and makes clock signal clk be converted to earlier high level, has dwindled the cycle of clock signal clk, and also namely the switching frequency of this moment is higher.As shown in Figure 3, the cycle of clock signal clk is T2 at this moment.
When the load of the synchronous buck circuit 100 of switching frequency saltus step was relatively light, output voltage V o was relatively large, and feedback voltage Vfb is also relatively large.Feedback voltage Vfb is greater than threshold voltage Vth at this moment, and the voltage comparison signal of voltage comparator 108 outputs is high level.The 3rd terminal of selector switch 109 is connected to its first terminal, and this moment, frequency reference signal Vfr was first frequency signal Vf1.Namely under light condition, the magnitude of voltage of frequency reference signal Vfr is larger.Sawtooth signal Vsw reaches its peak value more lately, and makes clock signal clk be converted to high level more lately, has extended the cycle of clock signal clk, and also namely the switching frequency of this moment is lower.As shown in Figure 3, the cycle of clock signal clk is T1 at this moment.T2<T1 as seen from Figure 3, corresponding, the switching frequency of synchronous buck circuit 100 under heavy condition of switching frequency saltus step is greater than its switching frequency under light condition.
Therefore the synchronous buck circuit 100 of switching frequency saltus step is under light condition, and switching frequency is reduced, and has therefore reduced the loss under its light condition.
The above is only preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, is equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (5)
1. the synchronous buck circuit of a switching frequency saltus step, is characterized in that, comprising:
Input port receives input voltage;
Output port provides output voltage;
Upper power switch and lower power switch are coupled in series in input port and with reference between ground;
Output inductor is coupled between the coupled in series node and output port of power switch and lower power switch;
Output capacitor is coupled in output port and with reference between ground;
Feedback component is coupled to output port and receives output voltage, and produces the feedback voltage of reflection output voltage;
Voltage comparator has in-phase input end, inverting input and lead-out terminal, and its inverting input threshold level voltage, its in-phase input end are coupled to feedback component and receive feedback voltage, and its lead-out terminal produces voltage comparison signal;
Selector switch, have the first terminal, the second terminal, the 3rd terminal and control terminal, its the first terminal couples the first frequency signal, its second terminal couples the second frequency signal, its control terminal is coupled to the lead-out terminal receiver voltage comparison signal of voltage comparator, and its 3rd terminal provides frequency reference signal according to voltage comparison signal;
Frequency comparator has in-phase input end, inverting input and lead-out terminal, and its inverting input is coupled to the 3rd terminal receive frequency reference signal of selector switch, and its lead-out terminal provides clock signal;
Sawtooth generator is coupled to the lead-out terminal receive clock signal of frequency comparator, and provides the in-phase input end of sawtooth signal to frequency comparator based on clock signal;
Control and drive circuit, be coupled to the lead-out terminal receive clock signal of frequency comparator, and based on clock signal, produce double switch and drive signal, to control the break-make of upper power switch and lower power switch.
2. the synchronous buck circuit of switching frequency saltus step as claimed in claim 1, is characterized in that, wherein
Greater than threshold voltage, the 3rd terminal of described selector switch is connected to its first terminal when feedback voltage, makes the inverting input of frequency comparator receive the first frequency signal;
Less than threshold voltage, the 3rd terminal of described selector switch is connected to its second terminal when feedback voltage, makes the inverting input of frequency comparator receive the second frequency signal.
3. the synchronous buck circuit of switching frequency saltus step as claimed in claim 1, is characterized in that, wherein said first frequency signal is greater than the second frequency signal.
4. the synchronous buck circuit of switching frequency saltus step as claimed in claim 1, it is characterized in that, described feedback component comprises and is coupled in series in output port and with reference to the first resistance between ground and the second resistance, and wherein feedback voltage produces at the coupled in series Nodes of the first resistance and the second resistance.
5. the synchronous buck circuit of switching frequency saltus step as claimed in claim 1, is characterized in that, described sawtooth generator comprises:
Charging current source, charging capacitor and reset switch, three's coupled in parallel at the in-phase input end of frequency comparator with reference to ground between, wherein
Described reset switch further comprises control terminal, and described control terminal is coupled to the lead-out terminal receive clock signal of frequency comparator.
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CN105486395A (en) * | 2015-12-20 | 2016-04-13 | 青岛海特新蓝生物科技有限公司 | Weighing instrument |
CN105395064A (en) * | 2015-12-25 | 2016-03-16 | 青岛朝阳华泰管理咨询服务有限公司 | High-precision milk powder preparing machine |
CN105472520A (en) * | 2015-12-25 | 2016-04-06 | 青岛北斗星云通信科技有限公司 | Electronic hearing aid device |
CN105466535A (en) * | 2015-12-25 | 2016-04-06 | 青岛北斗星云通信科技有限公司 | Weight detection device |
CN105471067A (en) * | 2015-12-25 | 2016-04-06 | 青岛朝阳华泰管理咨询服务有限公司 | Multi-redundant power generation equipment |
CN105472522A (en) * | 2015-12-25 | 2016-04-06 | 青岛北斗星云通信科技有限公司 | Ear barrier hearing aid device |
CN105529806A (en) * | 2015-12-25 | 2016-04-27 | 青岛海特新蓝生物科技有限公司 | Multi-redundant power generation equipment |
CN105553076A (en) * | 2015-12-25 | 2016-05-04 | 青岛朝阳华泰管理咨询服务有限公司 | Versatile power generation device |
CN105615654A (en) * | 2015-12-25 | 2016-06-01 | 青岛朝阳华泰管理咨询服务有限公司 | Full-automatic milk powder mixing equipment |
CN105662152A (en) * | 2015-12-29 | 2016-06-15 | 青岛北斗星云通信科技有限公司 | Intelligent milk powder mixer |
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Application publication date: 20130508 |