CN102683180B - Recess etch method and method, semi-conductor device manufacturing method - Google Patents

Recess etch method and method, semi-conductor device manufacturing method Download PDF

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Publication number
CN102683180B
CN102683180B CN201210191423.7A CN201210191423A CN102683180B CN 102683180 B CN102683180 B CN 102683180B CN 201210191423 A CN201210191423 A CN 201210191423A CN 102683180 B CN102683180 B CN 102683180B
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photoresist
recess etch
groove
layer
thickness
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CN102683180A (en
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邓咏桢
陈莹莹
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention provides a kind of recess etch method and method, semi-conductor device manufacturing method.Included according to the recess etch method of the present invention:Photoresist of the coating with specific thickness on silicon chip;Form the pattern for being used to etch groove of the photoresist;And using figuratum photoresist is formed, perform plasma etching;Wherein, the etching energy during the specific thickness and plasma etching of photoresist is controlled, so that the silicon chip that plasma runs out of the photoresist and etched into below photoresist.The characteristics of using photoetching glue residua is etched, according to the present invention it is possible to which the corner contours that top is formed in the case where not performing boron-phosphorosilicate glass backflow are formed as the groove of circular shape, so as to simplify processing step, process costs are reduced, and shorten the process time.

Description

Recess etch method and method, semi-conductor device manufacturing method
Technical field
The present invention relates to field of semiconductor manufacture, it is more particularly related to a kind of recess etch method, Yi Jiqi In the method, semi-conductor device manufacturing method of groove is manufactured by the recess etch method.
Background technology
Etching technics is the technique commonly used in fabrication of semiconductor device.In the manufacturing process of semiconductor integrated circuit In, etching is exactly the process for selectively removing unwanted material from silicon chip surface using chemically or physically method.From work Distinguished in skill, etching can be divided into wet etching and dry etching.Wherein, the isotropism that is mainly characterized by of wet etching is carved Erosion;Dry etching is to carry out anisotropic etching using plasma, strictly vertical and horizontal can be controlled to etch.
For power device, the groove in etched features(Particular without the groove for being not filled with tungsten plug)When, sometimes It can it is expected that the corner contours on the top of groove are formed as circular shape, as shown in Figure 3.
Therefore, in order to form the groove that the corner contours on top are formed as circular shape, in the recess etch side of prior art In method, as shown in figure 1, first, forming n-type doping layer 2 on substrate 1, silicon dioxide layer 3 is formed in n-type doping layer 2, Tetraethyl orthosilicate is formed in silicon dioxide layer 3(TEOS)Layer 4, boron-phosphorosilicate glass is formed on teos layer 4(boro- Phospho-silicate-glass, BPSG)Layer 5.Hereafter, photoresist PR1 is coated in borophosphosilicate glass layer 5, and forms light The photoresist PR1 pattern for being used to etch groove, resulting structure is as shown in Figure 1.
Hereafter, using figuratum photoresist execution plasma etching is formed, so that in borophosphosilicate glass layer 5, positive silicic acid The pattern of the groove is formed in methacrylate layer 4 and silicon dioxide layer 3;Hereafter photoresist PR1, resulting structure such as Fig. 2 are removed It is shown.
But, now, the corner contours on the top of the groove of formation are usually rectangular shaped(Such as Fig. 2)In reference number Shown in CT1), without being formed as circular shape.Therefore, in order to form the groove that the corner contours on top are formed as circular shape, It is follow-up also to perform boron-phosphorosilicate glass backflow(reflow)Step, thus could form the horn ring profile on top as shown in Figure 3 Groove as circular shape(As shown in the reference number CT2 in Fig. 3).
As can be seen that the foregoing corner contours in order to form top are formed as the prior art of the groove of circular shape Recess etch method be cumbersome.Accordingly, it is desirable to be able to propose a kind of to form top in simplified method Corner contours are formed as the groove of circular shape.
The content of the invention
The technical problems to be solved by the invention are can be with letter there is provided one kind for there is drawbacks described above in the prior art The method of change come formed the corner contours on top be formed as circular shape groove recess etch method and wherein by described Recess etch method manufactures the method, semi-conductor device manufacturing method of groove.
According to the first aspect of the invention there is provided a kind of recess etch method, it includes:Coating has tool on silicon chip The photoresist of body thickness;Form the pattern for being used to etch groove of the photoresist;And utilization forms figuratum photoetching Glue, performs plasma etching;Wherein, the etching energy during the specific thickness and plasma etching of photoresist is entered Row control, so that the silicon chip that plasma can run out of the photoresist and etch into below the photoresist.
Preferably, the specific thickness of the photoresist is in the range of 3000A-4000A.
Preferably, the scope of plasma etching energy during plasma etching is 1500-1700W.
Preferably, include from top to bottom in the silicon chip:Borophosphosilicate glass layer, teos layer, silicon dioxide layer, N Type doped layer and substrate layer.
Preferably, the thickness of the n-type doping layer can be in the range of 800-1500A.
Preferably, the thickness of the silicon dioxide layer can be in the range of 50-200A.
Preferably, the thickness of silester layer can be in the range of 2000-3000A.
Preferably, the thickness of the borophosphosilicate glass layer can be in the range of 2500-3500A.
There is provided a kind of manufacture method of the semiconductor devices comprising groove, its feature according to the second aspect of the invention It is to employ recess etch method described according to a first aspect of the present invention to manufacture the groove.
According to the present invention it is possible to which the corner contours that top is formed in the case where not performing boron-phosphorosilicate glass backflow are formed as round The groove of arc shape, so as to simplify processing step, reduces process costs, and shorten the process time.
Brief description of the drawings
With reference to accompanying drawing, and by reference to following detailed description, it will more easily have more complete understanding to the present invention And its adjoint advantages and features is more easily understood, wherein:
Fig. 1 to Fig. 3 schematically shows the recess etch method according to prior art.
Fig. 4 to Fig. 5 schematically shows recess etch method according to embodiments of the present invention.
Fig. 6 shows the groove that recess etch method according to embodiments of the present invention is made.
It should be noted that accompanying drawing is used to illustrate the present invention, it is not intended to limit the present invention.Note, represent that the accompanying drawing of structure can It can be not necessarily drawn to scale.Also, in accompanying drawing, same or similar element indicates same or similar label.
Embodiment
In order that present disclosure is more clear and understandable, with reference to specific embodiments and the drawings in the present invention Appearance is described in detail.
Fig. 4 to Fig. 5 schematically shows recess etch method according to embodiments of the present invention.
As shown in Figure 4 and Figure 5, recess etch method according to embodiments of the present invention includes:
N-type doping layer 2 is formed on substrate 1;
Silicon dioxide layer 3 is formed in n-type doping layer 2;
Teos layer 4 is formed in silicon dioxide layer 3;
Borophosphosilicate glass layer 5 is formed on teos layer 4;
Hereafter, on silicon chip(More specifically, in the present embodiment, it is on borophosphosilicate glass layer 5)Coat photoresist PR2, and the photoresist PR2 pattern for being used to etch groove is formed, resulting structure is as shown in Figure 4.
In this step, unlike the prior art, in the prior art, photoresist PR1 thickness is h1, and at this In inventive embodiments, photoresist PR2 thickness is h2.In the case of other process conditions identicals, photoresist PR2 thickness h 2 Thickness h 1 less than photoresist PR1, will be described in greater detail hereinafter the detail of photoresist thickness.
Hereafter, using figuratum photoresist PR2 execution plasma etching is formed, so that in borophosphosilicate glass layer 5, positive silicon The pattern of the groove is formed in ethyl acetate layer 4 and silicon dioxide layer 3(As shown in the reference number CT3 in Fig. 5);Hereafter remove Photoresist PR2, resulting structure is as shown in Figure 5.
More specifically, in the prior art, photoresist PR1 thickness h 1 causes during plasma etching, for Region covered with photoresist PR1, plasma only enters photoresist PR1, and the layer of glue PR1 coverings is photo-etched without entering In so that be not photo-etched glue PR1 covering region be etched away, and be photo-etched glue PR1 covering region be protected from by Etching.
Unlike the prior art, the thickness h 2 for the photoresist PR2 that the recess etch method of the embodiment of the present invention is used It is less than photoresist PR1 thickness h 1 in the case of other process conditions identicals, is selected according to the depth of recess etch and material Photoresist PR2 thickness h 2, so that during plasma etching, even being photo-etched the region of glue PR2 coverings(Side Edge point)Also it can be etched.
In other words, in recess etch method according to embodiments of the present invention, thickness h 2 to photoresist PR2 and wait from The etching energy of son is controlled, and plasma is run out of the photoresist and is etched into below photoresist PR2 Silicon chip(It is borophosphosilicate glass layer 5 in the present embodiment)In, so that being photo-etched the region of glue PR2 coverings(Marginal portion) Still etched by plasma.
Also, the characteristics of due to plasma etching photoetching glue residua, the photoresist in the region at groove pattern edge(Such as Fig. 4 In dotted ellipse frame shown in region)It is consumed earlier completely, hence in so that being easier to be carved at the recess edge of lower floor Erosion, and the region for being photo-etched the remote groove of glue PR2 coverings is not readily susceptible to the etching of plasma, so as to effectively only lead to Cross groove plasma etching step and be formed the corner contours on top and be formed as the groove of circular shape.
As shown in figure 5, by using recess etch method according to embodiments of the present invention, boron phosphorus silicon glass can not performed Glass forms top corner contours in the case of flowing back are formed as the groove of circular shape, so as to simplify processing step, reduce Process costs, and shorten the process time.
It should be noted that above-described embodiment is though it is shown that in borophosphosilicate glass layer 5, teos layer 4 and dioxy The example of groove pattern is formed in SiClx layer 3, but the present invention is not limited thereto.In fact, forming recessed using photoetching agent pattern The material and the number of plies of the layer of groove are not limited, but can form groove in any quantity and any suitable material.
In a specific example of the embodiment of the present invention, it is preferable that the thickness of n-type doping layer 2 can be between 800-1500A In the range of, the thickness of silicon dioxide layer 3 can be in the range of 50-200A, and the thickness of teos layer 4 can be between 2000- In the range of 3000A, the thickness of borophosphosilicate glass layer 5 can be in the range of 2500-3500A, and photoresist PR2 thickness h 2 can In the range of 3000-4000A;Correspondingly, the scope of plasma etching energy during plasma etching is 1500-1700W. In above-mentioned specific example, by using above-mentioned thickness and energy range, the effect of the present invention can be best implemented with.Certainly, Though it is shown that specific thickness and energy range, but the present invention is not limited to the thickness and energy range.
Fig. 6 shows the groove that the recess etch method according to embodiments of the present invention that actual test is obtained is made.Such as Fig. 6 It is shown, it should be apparent that the corner contours that the recess etch method of the embodiment of the present invention can be effectively formed top are formed For the groove of circular shape.
According to another preferred embodiment of the invention, above-mentioned recess etch method is employed present invention also offers a kind of Method, semi-conductor device manufacturing method.
According to another preferred embodiment of the invention, present invention also offers a kind of semiconductor devices for including groove, its Described in groove be by above-mentioned recess etch method formation.Certainly, these grooves in semiconductor devices can be filled out subsequently Fill or be not filled with conduction or nonconducting dielectric material.
Although it is understood that the present invention is disclosed as above with preferred embodiment, but above-described embodiment and being not used to Limit the present invention.For any those skilled in the art, without departing from the scope of the technical proposal of the invention, Many possible variations and modification are all made to technical solution of the present invention using the technology contents of the disclosure above, or are revised as With the equivalent embodiment of change.Therefore, every content without departing from technical solution of the present invention, the technical spirit pair according to the present invention Any simple modifications, equivalents, and modifications made for any of the above embodiments, still fall within the scope of technical solution of the present invention protection It is interior.

Claims (9)

1. a kind of recess etch method, it is characterised in that including:
Photoresist of the coating with specific thickness on silicon chip;
Form the pattern for being used to etch groove of the photoresist;And
Using figuratum photoresist is formed, plasma etching is performed;
Wherein, the etching energy during the specific thickness and plasma etching of photoresist is controlled, makes to have The fringe region of the photoresist of groove pattern than the photoresist with groove pattern intermediate region being etched earlier, So that the silicon chip that plasma runs out of the photoresist and etched into below the photoresist.
2. recess etch method according to claim 1, it is characterised in that the specific thickness of the photoresist between In the range of 3000A-4000A.
3. recess etch method according to claim 1 or 2, it is characterised in that plasma during plasma etching is carved The scope for losing energy is 1500-1700W.
4. recess etch method according to claim 1 or 2, it is characterised in that include from top to bottom in the silicon chip:Boron Phosphorosilicate glass layer, teos layer, silicon dioxide layer, n-type doping layer and substrate layer.
5. recess etch method according to claim 4, it is characterised in that the thickness of the n-type doping layer can be between In the range of 800-1200A.
6. recess etch method according to claim 4, it is characterised in that the thickness of the silicon dioxide layer can be between In the range of 50-200A.
7. recess etch method according to claim 4, it is characterised in that the thickness of silester layer can be between 2000- In the range of 3000A.
8. recess etch method according to claim 4, it is characterised in that the thickness of the borophosphosilicate glass layer can be between In the range of 2500-3500A.
9. a kind of manufacture method of the semiconductor devices comprising groove, it is characterised in that employ according to one of claim 1 to 8 Described recess etch method manufactures the groove.
CN201210191423.7A 2012-06-11 2012-06-11 Recess etch method and method, semi-conductor device manufacturing method Active CN102683180B (en)

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CN103178014B (en) 2013-03-14 2016-01-27 上海华力微电子有限公司 A kind of manufacture method of U-shaped groove

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1767165A (en) * 2004-10-25 2006-05-03 海力士半导体有限公司 Method of forming an isolation layer in a semiconductor device
CN101436566A (en) * 2007-11-13 2009-05-20 上海华虹Nec电子有限公司 Method for preparing shallow plow groove isolation

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010087650A (en) * 2000-03-08 2001-09-21 박종섭 Method for fabricating micro trench

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1767165A (en) * 2004-10-25 2006-05-03 海力士半导体有限公司 Method of forming an isolation layer in a semiconductor device
CN101436566A (en) * 2007-11-13 2009-05-20 上海华虹Nec电子有限公司 Method for preparing shallow plow groove isolation

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