CN102652304B - 预测并避免乱序微处理器中的操作数-存储-比较冒险 - Google Patents

预测并避免乱序微处理器中的操作数-存储-比较冒险 Download PDF

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Publication number
CN102652304B
CN102652304B CN201080056309.2A CN201080056309A CN102652304B CN 102652304 B CN102652304 B CN 102652304B CN 201080056309 A CN201080056309 A CN 201080056309A CN 102652304 B CN102652304 B CN 102652304B
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China
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instruction
storage
risk
load instructions
entry
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CN201080056309.2A
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Chinese (zh)
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CN102652304A (zh
Inventor
C.雅各比
B.W.汤姆托
G.W.亚历山大
K.J.亚历山大
B.W.柯伦
J.R.米切尔
J.T.塞
B.R.普拉斯基
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International Business Machines Corp
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
CN201080056309.2A 2009-12-22 2010-12-13 预测并避免乱序微处理器中的操作数-存储-比较冒险 Expired - Fee Related CN102652304B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US12/644,923 2009-12-22
US12/644,923 US8468325B2 (en) 2009-12-22 2009-12-22 Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors
US12/822,960 2010-06-24
US12/822,960 US8521992B2 (en) 2009-12-22 2010-06-24 Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors
PCT/EP2010/069496 WO2011076602A1 (en) 2009-12-22 2010-12-13 Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors

Publications (2)

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CN102652304A CN102652304A (zh) 2012-08-29
CN102652304B true CN102652304B (zh) 2015-04-15

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CN201080056309.2A Expired - Fee Related CN102652304B (zh) 2009-12-22 2010-12-13 预测并避免乱序微处理器中的操作数-存储-比较冒险

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Country Link
US (2) US8521992B2 (enExample)
JP (2) JP5850532B2 (enExample)
CN (1) CN102652304B (enExample)
DE (1) DE112010004322T5 (enExample)
GB (1) GB2486155B (enExample)
WO (1) WO2011076602A1 (enExample)

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US10606590B2 (en) 2017-10-06 2020-03-31 International Business Machines Corporation Effective address based load store unit in out of order processors
US10572256B2 (en) 2017-10-06 2020-02-25 International Business Machines Corporation Handling effective address synonyms in a load-store unit that operates without address translation
US10564979B2 (en) * 2017-11-30 2020-02-18 International Business Machines Corporation Coalescing global completion table entries in an out-of-order processor
US10572264B2 (en) 2017-11-30 2020-02-25 International Business Machines Corporation Completing coalesced global completion table entries in an out-of-order processor
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CN108519906B (zh) * 2018-03-20 2022-03-22 东南大学 超标量乱序处理器稳定状态指令吞吐率建模方法
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CN111221579B (zh) * 2018-11-27 2022-04-26 展讯通信（上海）有限公司 预测Load指令执行延迟的方法及系统
JP7151439B2 (ja) * 2018-12-06 2022-10-12 富士通株式会社 演算処理装置および演算処理装置の制御方法
US10977040B2 (en) 2019-02-19 2021-04-13 International Business Machines Corporation Heuristic invalidation of non-useful entries in an array
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Publication number Publication date
US20110153986A1 (en) 2011-06-23
GB201206367D0 (en) 2012-05-23
US9430235B2 (en) 2016-08-30
GB2486155A (en) 2012-06-06
CN102652304A (zh) 2012-08-29
JP5850532B2 (ja) 2016-02-03
DE112010004322T5 (de) 2012-08-23
JP6143306B2 (ja) 2017-06-07
US20130318330A1 (en) 2013-11-28
JP2015228237A (ja) 2015-12-17
GB2486155B (en) 2017-04-19
JP2013515306A (ja) 2013-05-02
US8521992B2 (en) 2013-08-27
WO2011076602A1 (en) 2011-06-30

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