CN102651605A

CN102651605A - Method for preventing large current impact during electrification

Info

Publication number: CN102651605A
Application number: CN2012100845583A
Authority: CN
Inventors: 廖序
Original assignee: SHENZHEN LANGKE ELECTRICAL APPLIANCE CO Ltd
Current assignee: SHENZHEN LANGKE ELECTRICAL APPLIANCE CO Ltd
Priority date: 2012-03-27
Filing date: 2012-03-27
Publication date: 2012-08-29

Abstract

The invention provides a method for preventing large current impact during electrification. The method comprises the following steps of: step 1, a rectification module, an electrification delay control module, a filtering capacitor and a field-effect transistor are provided; step 2, a power supply of the rectification module is switched on, the rectification module carries out rectification so as to obtain a direct current voltage, and the direct current voltage is supplied to the electrification delay control module; step 3, the electrification delay control module charges slowly and outputs a control level to the grid electrode of the field-effect transistor, so that the voltage at the grid electrode of the field-effect transistor increases slowly; and step 4, when the voltage at the grid electrode of the field-effect transistor increases to a certain value, the field-effect transistor is slowly turned into a conduction state from a shutoff state, and during the process, the filtering capacitor charges slowly, so as to restrict the large current impact during electrification, and after electrification is finished, a load primary function circuit also operates normally.

Description

Prevent the method for powered on moment heavy current impact

Technical field

The present invention relates to a kind of protective circuit, relate in particular to a kind of powered on moment heavy current impact guard method that prevents.

Background technology

As shown in Figure 1; In general bridge rectifier, the electrochemical capacitor E of a larger capacity is all arranged, in the moment of energized; Because the initial voltage on this electric capacity E is zero; Just being equivalent to electric capacity is a kind of " short circuit " state, at this moment on circuit, will produce a very big moment impact electric current, can reach more than tens peaces.Will produce a very big impact and influence to other power consumption equipment on electrical network and the electrical network like this, also can produce very big influence, the hidden danger of damage might occur device is produced the electronic component on the current circuit of self.

So; Generally can be at current-limiting resistance R of circuit loop the inside serial connection; Limit the issuable impulse current of powered on moment, as shown in Figure 2, simultaneously after the completion that powers on; Come this current-limiting resistance of short circuit R with a relay J again, thereby remove because other negative effect that this current-limiting resistance R brings.This relay J and current-limiting resistance R will increase circuit power consumption etc., and this will cause energy waste, and the contact of relay J contact the time can produce spark, and reduce useful life relatively, has certain potential safety hazard.

Summary of the invention

The object of the present invention is to provide a kind of method that prevents the powered on moment heavy current impact; Adopt a kind of protection device of FET, simplify circuit, do not have mechanical action as restricting circuits powered on moment heavy current impact; No-spark produces; Long service life, and it is low to drive the FET power demand, saves the energy.

For realizing above-mentioned purpose, the present invention provides a kind of method that prevents the powered on moment heavy current impact, may further comprise the steps:

Step 1, rectification module is provided, power on the time-delay control module, filter capacitor and FET; The said time-delay control module that powers on is electrically connected at rectification module; The grid of said FET is electrically connected at the said time-delay control module that powers on; The source electrode of said FET is electrically connected at said rectification module, and said filter capacitor anode is electrically connected at rectification module, and said filter capacitor negative electrode is electrically connected at the drain electrode of said FET;

The power supply of step 2, connection rectification module after the rectification module rectification, obtains direct voltage and supplies with the time-delay control module that powers on;

Step 3, the said time-delay control module that powers on are slowly charged, and export the grid that control level is given FET, and the voltage on the said fet gate slowly raises;

Step 4, when the voltage on the field effect tube grid is raised to certain value; FET slowly transfers conducting to by turn-offing; Filter capacitor slowly charges in this process, thereby has limited the heavy current impact of powered on moment, and the completion back loading primary function circuit that powers on has also got into operate as normal.

In the said step 3, the time-delay control module that powers on is handled this direct voltage, and this time-delay control module output voltage that powers on slowly rises, and exports the grid of FET to.

The said time-delay control module output voltage rise time that powers on is 0.5-5 second.

In the said step 4, said fet gate voltage slowly changes from low to high, and FET then slowly changes to complete conducting by turn-offing fully, causes filter capacitor slowly to charge, thus the generation of restriction powered on moment heavy current impact.

Said rectification module is a bridge rectifier.

Beneficial effect of the present invention: the method that prevents the powered on moment heavy current impact provided by the invention, it adopts contactless semiconductor device FET, substitutes the protective circuit scheme that powers on that existing current-limiting resistance adds relay, utilizes RC element time-delay control; The voltage of control fet gate slowly raises, thereby the slow conducting of control FET has realized that filter capacitor slowly charges; Simplified circuit, saved device, FET is a noncontacting switch; Do not have mechanical action, no-spark produces, long service life; Improve fail safe, and it is low to drive the required power of FET, saves the energy.

In order further to understand characteristic of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing, yet accompanying drawing only provide reference and the explanation usefulness, be not to be used for the present invention is limited.

Description of drawings

Below in conjunction with accompanying drawing, describe in detail through specific embodiments of the invention, will make technical scheme of the present invention and other beneficial effect obvious.

In the accompanying drawing,

Fig. 1 is existing conventional current rectifying and wave filtering circuit figure;

Fig. 2 is the existing circuit diagram that adds current-limiting resistance and relay protection;

Fig. 3 prevents the schematic flow sheet of the method for powered on moment heavy current impact for the present invention;

Fig. 4 prevents the circuit module figure of the method for powered on moment heavy current impact for the present invention;

Fig. 5 prevents the circuit diagram of a preferred embodiment of the method for powered on moment heavy current impact for the present invention.

Embodiment

Technological means and the effect thereof taked for further setting forth the present invention are described in detail below in conjunction with the preferred embodiments of the present invention and accompanying drawing thereof.

See also Fig. 3 to 5, the present invention provides a kind of method that prevents the powered on moment heavy current impact, and it may further comprise the steps:

Step 1, rectification module 10 is provided, power on the time-delay control module 20, filter capacitor E1 and FET Q1; The said time-delay control module 20 that powers on is electrically connected at rectification module 10; The grid G of said FET Q1 is electrically connected at the said time-delay control module 20 that powers on; The source S of said FET Q1 is electrically connected at said rectification module 10, and said filter capacitor E1 anode is electrically connected at rectification module 10, and said filter capacitor E1 negative electrode is electrically connected at the drain D of said FET Q1;

Load primary function circuit 30 is electrically connected at drain D and the rectification module 1 of FET Q1 in the circuit.

In the present embodiment; The said time-delay control module 20 that powers on comprises: diode D1, voltage-stabiliser tube ZD1, first capacitor C 1, second capacitor C 2, first resistance R 1, second resistance R 2 and the 3rd resistance R 3; Connect with second capacitor C 2 back and said second resistance R 2, voltage-stabiliser tube ZD1 and first capacitor C 1 of said the 3rd resistance R 3 is parallelly connected; The negative electrode of said diode D1 is electrically connected at the anode of voltage-stabiliser tube ZD1; The anode of said diode D1 is electrically connected at rectification module 10 through first resistance R 1, and the negative electrode of said voltage-stabiliser tube ZD1 is electrically connected at rectification module 10.

The bridge rectifier of said rectification module 10 for being made up of 4 diodes, the puncture voltage of said voltage-stabiliser tube ZD1 is preferably 15V less than the ceiling voltage of FET Q1 grid G.

The power supply of step 2, connection rectification module 10 after rectification module 10 rectifications, obtains direct voltage and supplies with the time-delay control module 20 that powers on;

Connect 10 power supply moments of rectification module; This moment, first capacitor C, 1 voltage V1 and second capacitor C, 2 voltage V2 all also had little time to rise; V1 and V2 are 0V; The grid G of FET Q1 is in 0V control down, and FET Q1 is in complete off state, and this moment, filter capacitor E1 did not have electric current to flow through.

Step 3, the said time-delay control module 20 that powers on are slowly charged, and export the grid G that control level is given FET Q1, and the voltage on the said FET Q1 grid G slowly raises;

The said time-delay control module 20 that powers on is slowly charged, and its output voltage also slowly rises, and the rise time is 0.5-5 second.

In the present embodiment; Along with the charging of first capacitor C 1, the voltage V1 at its two ends can slowly rise, because the capacitance-resistance effect of the 3rd resistance R 3 and second capacitor C 2; The voltage V2 at second capacitor C, 2 two ends can rise with slower speed, and the control level of exporting to FET Q1 grid G also slowly rises.

Step 4, when the voltage on the field effect pipe Q1 grid G is raised to certain value; FET Q1 slowly transfers conducting to by turn-offing; Filter capacitor E1 slowly charges in this process, thereby has limited the heavy current impact of powered on moment, and the completion back loading primary function circuit 30 that powers on has also got into operate as normal.

Along with the charging of second capacitor C 2, its voltage V2 slowly rises, when rising to 15V; FET Q1 slowly transfers complete conducting state to by off state; Load primary function circuit 30 conducting operate as normal, in this process, the electric current I of filter capacitor E1 can progressively slowly be risen by 0A; Progressively slowly descend again then; Get into a kind of steady-state current (steady-state current of the last entering of said filter capacitor E1 depends on load current) at last, thereby avoided occurring on the powered on moment filter capacitor E1 generation of heavy current impact situation.

The voltage at said second capacitor C 2 two ends is raised to the puncture voltage that 15V depends on this voltage-stabiliser tube ZD1 at last.Through regulating the size of first capacitor C 1 and second capacitor C 2, the delay duration that can the regulating circuit time-delay drives.

In whole said process, electric current through rectification module 10, filter capacitor E1, FET Q1, flow back into rectification module 10 via the electrical network input again, flows back to electrical network then.Because the existence of FET Q1, the electric current on the filter capacitor E1 will receive the control of FET Q1, has realized slow charging, has avoided the situation of heavy current impact to take place.

In sum, the method that prevents the powered on moment heavy current impact provided by the invention, it adopts contactless semiconductor device FET, substitutes the protective circuit scheme that powers on that existing current-limiting resistance adds relay; Utilize RC element time-delay control, the voltage of control fet gate slowly raises, thereby the slow conducting of control FET has realized that filter capacitor slowly charges; Simplified circuit, saved device, FET is a noncontacting switch; Do not have mechanical action, no-spark produces, long service life; Improve fail safe, and it is low to drive the required power of FET, saves the energy.

The above for the person of ordinary skill of the art, can make other various corresponding changes and distortion according to technical scheme of the present invention and technical conceive, and all these changes and distortion all should belong to the protection range of claim of the present invention.

Claims

1. a method that prevents the powered on moment heavy current impact is characterized in that, may further comprise the steps:

2. the method that prevents the powered on moment heavy current impact as claimed in claim 1; It is characterized in that in the said step 3, the time-delay control module that powers on is handled this direct voltage; This time-delay control module output voltage that powers on slowly rises, and exports the grid of FET to.

3. the method that prevents the powered on moment heavy current impact as claimed in claim 2 is characterized in that, the said time-delay control module output voltage rise time that powers on is 0.5-5 second.

4. the method that prevents the powered on moment heavy current impact as claimed in claim 1; It is characterized in that; In the said step 4, said fet gate voltage slowly changes from low to high, and FET then slowly changes to complete conducting by turn-offing fully; Cause filter capacitor slowly to charge, thus the generation of restriction powered on moment heavy current impact.

5. the method that prevents the powered on moment heavy current impact as claimed in claim 1 is characterized in that, said rectification module is a bridge rectifier.