CN102651339A - TFT (Thin Film Transistor) array substrate and manufacturing method and display device of TFT array substrate - Google Patents
TFT (Thin Film Transistor) array substrate and manufacturing method and display device of TFT array substrate Download PDFInfo
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- CN102651339A CN102651339A CN2011102944038A CN201110294403A CN102651339A CN 102651339 A CN102651339 A CN 102651339A CN 2011102944038 A CN2011102944038 A CN 2011102944038A CN 201110294403 A CN201110294403 A CN 201110294403A CN 102651339 A CN102651339 A CN 102651339A
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- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
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- C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
- C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
- C03C17/36—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
- C03C17/3602—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
- C03C17/3644—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the metal being silver
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- C—CHEMISTRY; METALLURGY
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- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
- C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
- C03C17/3411—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions with at least two coatings of inorganic materials
- C03C17/3429—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions with at least two coatings of inorganic materials at least one of the coatings being a non-oxide coating
- C03C17/3441—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions with at least two coatings of inorganic materials at least one of the coatings being a non-oxide coating comprising carbon, a carbide or oxycarbide
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- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
- C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
- C03C17/36—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
- C03C17/3602—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
- C03C17/3668—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the multilayer coating having electrical properties
- C03C17/3671—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the multilayer coating having electrical properties specially adapted for use as electrodes
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- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C2217/00—Coatings on glass
- C03C2217/90—Other aspects of coatings
- C03C2217/94—Transparent conductive oxide layers [TCO] being part of a multilayer coating
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Abstract
The invention provides a TFT (Thin Film Transistor) array substrate, a manufacturing method and a display device of the TFT array substrate. The invention relates to the display technical field, and the carrier mobility of the active layer of a TFT semiconductor is increased. The manufacturing method of the TFT array substrate comprises the following steps: a graphene layer is formed on the substrate, and a semiconductor active layer formed by graphene is obtained through the first time layout fabrication processing and hydrotreating; a source electrode and a drain electrode are obtained on the graphene layer; a gate insulation layer above the semiconductor active layer is obtained; a gate electrode is formed on the gate insulation layer; then a protective layer, a source electrode lead, a drain electrode lead, a pixel electrode and a data cable are formed; and a passivation layer is formed. The invention is applicable to manufacturing TFT array substrates.
Description
Technical field
The present invention relates to the Display Technique field, relate in particular to a kind of tft array substrate and manufacturing approach thereof and display unit.
Background technology
AMOLED (Active Matrix/Organic Light Emitting Diode; The active matrix organic light-emitting diode display floater) is the variation that utilizes the current strength that is arranged on EL sheet two plate electrodes generation up and down; Change the illumination effect of electroluminescence layer, thereby control the luminous display image that changes.In general, a complete AMOLED display floater comprises OLED member and TFT (Thin Film Transistor, thin-film transistor) array.Wherein, the TFT switch comprises grid, source electrode, drain electrode and active layer; Gate electrode connects the metal electrode of OLED, and the source electrode connects data wire, and drain electrode connects the OLED pixel electrode, and active layer is formed between source electrode and drain electrode and the gate electrode.
Its LTPS (low temperature polycrystalline silicon) technologies that adopt of existing AMOLED TFT manufacturing process realize TFT semiconductor active layer at a high speed more; But because LTPS adopts the preparation of ELA (quasi-molecule annealing) technology more; Uniformity and the characteristic of the TFT of preparation often have very big-difference like this, and the carrier mobility of semiconductor active layer is lower.Tft array substrate among the AMOLED also can be used for common liquid crystal panel, how to improve the uniformity of TFT and the carrier mobility problem of its semiconductor active layer, is the major issue that the tft array substrate manufacturing faces.
Summary of the invention
Embodiments of the invention provide a kind of tft array substrate and manufacturing approach and display unit, have improved the carrier mobility of TFT semiconductor active layer.
For achieving the above object, embodiments of the invention adopt following technical scheme:
On the one hand, a kind of tft array substrate manufacturing approach is provided, comprises:
On substrate, form graphene layer,, obtain the semiconductor active layer that constitutes by Graphene through the first time composition PROCESS FOR TREATMENT and hydrogenation treatment;
On said graphene layer through the second time composition PROCESS FOR TREATMENT obtain source electrode, drain electrode; Wherein, said source electrode contacts with said semiconductor active layer, and said drain electrode contacts with said semiconductor active layer;
In said source electrode, semiconductor active layer, drain electrode, be coated with insulating layer coating, obtain being positioned at the gate insulation layer of said semiconductor active layer top through composition PROCESS FOR TREATMENT for the third time;
On said gate insulation layer, form metal level, obtain being positioned at the grid of said semiconductor active layer top through the 4th composition PROCESS FOR TREATMENT;
On said substrate, form protective layer, obtain being positioned at first via hole of said source electrode top through the 5th composition PROCESS FOR TREATMENT, and second via hole that is positioned at said drain electrode top, said source electrode, drain electrode exposed;
Deposition tin indium oxide or graphene layer on said protective layer form source lead, drain lead, pixel electrode and data wire through the 6th composition PROCESS FOR TREATMENT; Wherein said source lead is connected with said source electrode through said first via hole; Said drain lead one end is connected with said drain electrode through said second via hole, and the other end is connected with said pixel electrode.
Further, also comprise:
On said data wire, pixel electrode, source lead, drain lead, form passivation layer, expose said pixel electrode through the 7th composition PROCESS FOR TREATMENT;
Above said passivation layer, form electroluminescence layer, said electroluminescence layer is connected with said pixel electrode;
Above said electroluminescence layer, form metallic cathode.
On the other hand, a kind of tft array substrate is provided, comprises:
Substrate;
Be formed with the source electrode, drain electrode and the semiconductor active layer that form by Graphene on the said substrate; Wherein, said source electrode contacts with said semiconductor active layer, and said drain electrode contacts with said semiconductor active layer;
Be formed with gate insulation layer on the said semiconductor active layer;
Be formed with grid on the said gate insulation layer;
Said source electrode, drain and gate top are formed with protective layer; Be formed with first via hole that exposes said source electrode and second via hole that exposes said drain electrode on the said protective layer;
Said protective layer top is formed with data wire, pixel electrode, and the source lead that is connected with said source electrode, data wire through said first via hole, with the drain lead that is connected with said drain electrode, pixel electrode through said second via hole.
Further, also comprise:
Said data wire, pixel electrode, source lead, drain lead top are formed with passivation layer;
Said passivation layer top is formed with electroluminescence layer, and said electroluminescence layer is connected with said pixel electrode;
Said electroluminescence layer top is formed with metallic cathode.
On the one hand, the embodiment of the invention also provides a kind of display unit, comprises above-mentioned tft array substrate again.
Tft array substrate that the embodiment of the invention provides and manufacturing approach thereof and display unit adopt the semiconductor layer active layer of hydrogenation Graphene as TFT, have improved carrier mobility, and then have improved the pixel electrode charge rate, have reduced the response time.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The schematic flow sheet of the tft array substrate manufacturing approach that Fig. 1 provides for the embodiment of the invention;
Board structure sketch map one in the tft array substrate manufacturing approach process that Fig. 2 provides for the embodiment of the invention;
Board structure sketch map two in the tft array substrate manufacturing approach process that Fig. 3 provides for the embodiment of the invention;
Board structure sketch map three in the tft array substrate manufacturing approach process that Fig. 4 provides for the embodiment of the invention;
Board structure sketch map four in the tft array substrate manufacturing approach process that Fig. 5 provides for the embodiment of the invention;
Board structure sketch map five in the tft array substrate manufacturing approach process that Fig. 6 provides for the embodiment of the invention;
Board structure sketch map six in the tft array substrate manufacturing approach process that Fig. 7 provides for the embodiment of the invention;
Board structure sketch map seven in the tft array substrate manufacturing approach process that Fig. 8 provides for the embodiment of the invention;
Board structure sketch map eight in the tft array substrate manufacturing approach process that Fig. 9 provides for the embodiment of the invention;
Board structure sketch map nine in the tft array substrate manufacturing approach process that Figure 10 provides for the embodiment of the invention;
Board structure sketch map ten in the tft array substrate manufacturing approach process that Figure 11 provides for the embodiment of the invention;
Board structure sketch map 11 in the tft array substrate manufacturing approach process that Figure 12 embodiment of the invention provides;
Board structure sketch map 12 in the tft array substrate manufacturing approach process that Figure 13 embodiment of the invention provides.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
Embodiment one
The tft array substrate manufacturing approach that the embodiment of the invention provides, as shown in Figure 1, its step comprises:
S101, on substrate, form graphene layer,, obtain the semiconductor active layer that constitutes by Graphene through the first time composition PROCESS FOR TREATMENT and hydrogenation treatment.
As shown in Figure 2; On substrate 201; (perhaps water-soluble individual layer of spin coating one deck or multi-layer graphene material form graphene layer 221 for Plasma Enhanced Chemical Vapor Deposition, PECVD) deposition one deck grapheme material to utilize the plasma enhanced chemical vapor deposition method.
Then, as shown in Figure 3, on graphene layer 221, apply photoresist 222, after overexposure, development, expose the Graphene 207 of channel region, utilize H again
2, or H
2And Ar
2Mist the Graphene 207 of channel region is carried out hydrogenation treatment.
Afterwards, as shown in Figure 4, peel off remaining photoresist, on glass substrate 201, obtain the Graphene semiconductor active layer 207 after hydrogenation treatment.
Need to prove; Graphene has zero forbidden band characteristic, even at room temperature mean free path and the coherence length of charge carrier in Graphene also can reach micron order, simultaneously; Graphene also has more than the high carrier mobility of silicon, so it is a kind of semi-conducting material of excellent performance.
S102, on graphene layer through the second time composition PROCESS FOR TREATMENT obtain source electrode, drain electrode; Wherein, source electrode contacts with semiconductor active layer, and drain electrode contacts with semiconductor active layer.
As shown in Figure 5, through the second time composition technology Graphene of periphery is removed, on glass substrate 201, obtain the semiconductor active layer 207 that source electrode 206, drain electrode 205 and hydrogenation Graphene that Graphene constitutes constitute.
S103, in source electrode, semiconductor active layer, drain electrode, be coated with insulating layer coating, obtain being positioned at the gate insulation layer of semiconductor active layer top through composition PROCESS FOR TREATMENT for the third time.
Exemplary; Can utilize chemical vapor deposition method deposit thickness on glass substrate to be the insulating barrier of
to
; On insulating barrier, be coated with the last layer photoresist then; Above semiconducting insulation layer 207, obtain one deck gate insulation layer 203 through mask, exposure, development, etching, after peeling off, as shown in Figure 6.In the present embodiment, the material of gate insulation layer can be a silicon nitride, also can use silica and silicon oxynitride etc.
S104, on gate insulation layer, form metal level, obtain being positioned at the grid of semiconductor active layer top through the 4th composition PROCESS FOR TREATMENT.
Exemplary; Can use magnetically controlled sputter method, preparation one layer thickness is at
metal film layer to
on glass substrate 201.Metal material can adopt metals such as molybdenum, aluminium, alumel, molybdenum and tungsten alloy, chromium or copper usually, also can use the combining structure of above-mentioned different materials film.Then, with mask through exposure, development, etching, the composition PROCESS FOR TREATMENT such as peel off, on semiconductor active layer 207, gate insulation layer 203, form grid 202, as shown in Figure 7.
S105, on substrate, form protective layer, obtain being positioned at first via hole of source electrode top through the 5th composition PROCESS FOR TREATMENT, and second via hole that is positioned at the drain electrode top, source electrode, drain electrode exposed.
At first; As shown in Figure 8; On whole glass substrate 201, apply the protective layer 210 that a layer thickness arrives
at
; Its material can be the oxide of silicon such as silicon dioxide, this moment grid 202, source electrode 206 and drain and all be coated with protective layer above 205.
Then, on protective layer 210, apply photoresist, utilize mask, through overexposure, development, etching, the composition PROCESS FOR TREATMENT such as peel off, above source electrode 206, form first via hole 214, above drain electrode 205, form second via hole 215, as shown in Figure 9.
S106, on protective layer deposition tin indium oxide or graphene layer, form source lead, drain lead, pixel electrode and data wire through the 6th composition PROCESS FOR TREATMENT; Wherein source lead is connected with source electrode through first via hole; Drain lead one end is connected with drain electrode through second via hole, and the other end is connected with pixel electrode.
Exemplary; Deposition one deck ITO (Indium Tin Oxides on the passivation layer 210 of whole glass substrate 201; Tin indium oxide) or Graphene, thickness is between
to
.Then, on ITO or the Graphene of deposition, apply one deck photoresist, use mask, make public, develop, etching, the composition PROCESS FOR TREATMENT such as peel off, form data wire (representing among Figure 10), pixel electrode 204, source lead 209, drain lead 208; Wherein, source lead 209 is connected with source electrode 206 through first via hole, and drain lead 208 1 ends are connected with drain electrode 205 through second via hole, and the other end is connected with pixel electrode 204, and is as shown in Figure 8.
Above step S101～S106 has accomplished the manufacturing to the most basic tft array substrate.The above-mentioned tft array substrate of accomplishing can be used in the manufacturing of display devices such as liquid crystal panel, Electronic Paper.Further, can also on the above-mentioned steps basis, increase processing step, realization is used for the manufacturing of the tft array substrate of AMOLED.
In order to make the tft array substrate that is used for AMOLED, can also comprise the steps:
S107, on data wire, pixel electrode, source lead, drain lead, form passivation layer, expose this pixel electrode through the 7th composition PROCESS FOR TREATMENT.
Exemplary; Shown in figure 11; On whole glass substrate 201, apply the passivation layer 211 that a layer thickness arrives
at
; Its material can be silicon nitride or transparent organic resin material; Through the composition PROCESS FOR TREATMENT passivation layer of pixel electrode 204 tops is removed then, exposed pixel electrode 204.This step forms passivation, is mainly used in when follow-up formation electroluminescence layer, to isolate electroluminescence layer and data wire, source lead, drain lead.Certainly, being used for common TFT also can increase this step, is used for protected data line and source lead, drain lead etc.
S108, above passivation layer, form electroluminescence layer, this electroluminescence layer contacts with pixel electrode.
Exemplary; Shown in figure 12; Place vacuum chamber vapor deposition multilayer organic material film above passivation layer 211 and pixel electrode 204 to form electroluminescence layer 212 glass substrate 201; The uniformity of film comprises for
organic film material: ground floor is a hole transmission layer, and material commonly used is fragrant diamine such as TPD, TAD etc.; The second layer is an electron transfer layer, and material commonly used is oxine aluminium (Alq3), oxine zinc (Znq2) etc.
S109, above electroluminescence layer, form metallic cathode.
Exemplary, shown in figure 13, glass substrate 201 is placed vacuum chamber, adopt the metal evaporation method on the electroluminescence layer 212 of substrate, to form layer of metal negative electrode 213.Metallic cathode material commonly used has Mg, Ag, Li, Al or magnadure etc.
The tft array substrate manufacturing approach that the embodiment of the invention provides adopts the semiconductor layer active layer of hydrogenation Graphene as TFT, has improved carrier mobility, and then has improved the pixel electrode charge rate, has reduced the response time.
Embodiment two
The tft array substrate that the embodiment of the invention provides, shown in figure 13, comprising: substrate 201; Be formed with the source electrode 206, drain electrode 205 and the semiconductor active layer 207 that form by Graphene on the substrate 201; Wherein, source electrode 206 contacts with semiconductor active layer 207, and drain electrode 205 contacts with semiconductor active layer 207; Be formed with gate insulation layer 203 on the semiconductor active layer 207; Be formed with grid 202 on the gate insulation layer 203; Source electrode 206, drain electrode 205 and grid 202 tops are formed with protective layer 210; Be formed with first via hole 214 that exposes source electrode 206 on the protective layer 210 and expose second via hole 215 of drain electrode 205; Protective layer 210 tops are formed with data wire, pixel electrode 204, and pass through the source lead 209 that first via hole 214 is connected with source electrode 206, data wire, with the drain lead 208 that is connected with drain electrode 205, pixel electrode 204 through second via hole 215.Above-mentioned tft array substrate can be used to make display devices such as liquid crystal panel, Electronic Paper.
Further, can also change, be formed for the tft array substrate of AMOLED above-mentioned tft array substrate.On the basis of above-mentioned tft array substrate, also comprise: data wire, pixel electrode 204, source lead 209, drain lead 208 tops are formed with passivation layer 211; Passivation layer 211 tops are formed with electroluminescence layer 212, and electroluminescence layer 212 is connected with pixel electrode 204; Electroluminescence layer 212 tops are formed with metallic cathode 213.
In the present embodiment, the Graphene of semiconductor active layer 207 is through the graphene layer after the hydrogenation treatment.In addition, data wire, pixel electrode 204, source lead 209, drain lead 208 can be made up of tin indium oxide or Graphene in the present embodiment.
Need to prove that because Graphene is a kind of two-dimensional material, its characteristic is between semiconductor and conductor, during eigenstate; Owing to can be with overlapping, its conductivity has metallic character, and conductivity can reach 20000cm2/V.S; Can be used as the source-drain electrode material of TFT, when with hydrogen or argon gas, perhaps after both mixture gas treatment; Produce the hydrogenation Graphene, band gap increases, and can be used as semi-conducting material.
The tft array substrate that the embodiment of the invention provides adopts the semiconductor layer active layer of hydrogenation Graphene as TFT, has improved carrier mobility, and then has improved the pixel electrode charge rate, has reduced the response time.
Embodiment three
The embodiment of the invention provides a kind of display unit, has used above-mentioned array base palte.Described display unit can be liquid crystal panel, AMOLED panel, Electronic Paper, television set, notebook, mobile phone, navigator etc.Owing to used above-mentioned tft array substrate, adopt the semiconductor layer active layer of hydrogenation Graphene as TFT, improve carrier mobility, and then improved the pixel electrode charge rate, reduced the response time.
The above; Be merely embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; Can expect easily changing or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of said claim.
Claims (8)
1. a tft array substrate manufacturing approach is characterized in that, comprising:
On substrate, form graphene layer,, obtain the semiconductor active layer that constitutes by Graphene through the first time composition PROCESS FOR TREATMENT and hydrogenation treatment;
On said graphene layer through the second time composition PROCESS FOR TREATMENT obtain source electrode, drain electrode; Wherein, said source electrode contacts with said semiconductor active layer, and said drain electrode contacts with said semiconductor active layer;
In said source electrode, semiconductor active layer, drain electrode, be coated with insulating layer coating, obtain being positioned at the gate insulation layer of said semiconductor active layer top through composition PROCESS FOR TREATMENT for the third time;
On said gate insulation layer, form metal level, obtain being positioned at the grid of said semiconductor active layer top through the 4th composition PROCESS FOR TREATMENT;
On said substrate, form protective layer, obtain being positioned at first via hole of said source electrode top through the 5th composition PROCESS FOR TREATMENT, and second via hole that is positioned at said drain electrode top, said source electrode, drain electrode exposed;
Deposition tin indium oxide or graphene layer on said protective layer form source lead, drain lead, pixel electrode and data wire through the 6th composition PROCESS FOR TREATMENT; Wherein said source lead is connected with said source electrode through said first via hole; Said drain lead one end is connected with said drain electrode through said second via hole, and the other end is connected with said pixel electrode.
2. tft array substrate manufacturing approach according to claim 1 is characterized in that, also comprises:
On said data wire, pixel electrode, source lead, drain lead, form passivation layer, expose said pixel electrode through the 7th composition PROCESS FOR TREATMENT;
Above said passivation layer, form electroluminescence layer, said electroluminescence layer contacts with said pixel electrode;
Above said electroluminescence layer, form metallic cathode.
3. tft array substrate manufacturing approach according to claim 1 is characterized in that, on substrate, forms graphene layer, through the first time composition PROCESS FOR TREATMENT and hydrogenation treatment, obtains being comprised by the semiconductor active layer that Graphene constitutes:
On substrate, utilize plasma enhanced chemical vapor deposition method deposition one deck grapheme material, perhaps water-soluble individual layer of spin coating one deck or multi-layer graphene material;
On said grapheme material, apply photoresist, after overexposure, development, expose the Graphene of channel region;
Utilize H
2, or H
2And Ar
2Mist the Graphene of said channel region is carried out hydrogenation treatment;
Peel off remaining photoresist, obtain the semiconductor active layer that constitutes by Graphene.
4. a tft array substrate is characterized in that, comprising:
Substrate;
Be formed with the source electrode, drain electrode and the semiconductor active layer that form by Graphene on the said substrate; Wherein, said source electrode contacts with said semiconductor active layer, and said drain electrode contacts with said semiconductor active layer;
Be formed with gate insulation layer on the said semiconductor active layer;
Be formed with grid on the said gate insulation layer;
Said source electrode, drain and gate top are formed with protective layer; Be formed with first via hole that exposes said source electrode and second via hole that exposes said drain electrode on the said protective layer;
Said protective layer top is formed with data wire, pixel electrode, and the source lead that is connected with said source electrode, data wire through said first via hole, with the drain lead that is connected with said drain electrode, pixel electrode through said second via hole.
5. tft array substrate according to claim 4 is characterized in that, also comprises:
Said data wire, pixel electrode, source lead, drain lead top are formed with passivation layer;
Said passivation layer top is formed with electroluminescence layer, and said electroluminescence layer is connected with said pixel electrode;
Said electroluminescence layer top is formed with metallic cathode.
6. tft array substrate according to claim 4 is characterized in that, the Graphene of said semiconductor active layer is through the graphene layer after the hydrogenation treatment.
7. tft array substrate according to claim 4 is characterized in that, said data wire, pixel electrode, source lead, drain lead are made up of tin indium oxide or Graphene.
8. a display unit is characterized in that, comprises the described tft array substrate of claim 4～7.
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Cited By (11)
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|---|---|---|---|---|
| WO2013127220A1 (en) * | 2012-02-27 | 2013-09-06 | 京东方科技集团股份有限公司 | Array substrate, preparation method for array substrate, and display device |
| CN103928401A (en) * | 2014-04-01 | 2014-07-16 | 京东方科技集团股份有限公司 | Array substrate, preparing method thereof and display device |
| CN104282769A (en) * | 2014-09-16 | 2015-01-14 | 京东方科技集团股份有限公司 | Thin film transistor, manufacturing method of thin film transistor, array substrate, manufacturing method of array substrate and display device |
| CN104485363A (en) * | 2014-12-30 | 2015-04-01 | 京东方科技集团股份有限公司 | Thin film transistor and preparation method, array substrate and preparation method as well as display device |
| CN106782271A (en) * | 2017-01-11 | 2017-05-31 | 京东方科技集团股份有限公司 | A kind of image element circuit, display panel and display device |
| WO2017088284A1 (en) * | 2015-11-24 | 2017-06-01 | 深圳市华星光电技术有限公司 | Graphene display and display driving method thereof |
| CN107154408A (en) * | 2017-05-22 | 2017-09-12 | 深圳市华星光电技术有限公司 | A kind of array base palte and preparation method thereof |
| CN107946245A (en) * | 2017-11-22 | 2018-04-20 | 深圳市华星光电半导体显示技术有限公司 | A kind of array base palte and preparation method thereof |
| WO2018072103A1 (en) * | 2016-10-18 | 2018-04-26 | 广东东邦科技有限公司 | Tft structure based on flexible multilayer graphene quantum carbon substrate material and manufacturing method |
| CN109148476A (en) * | 2018-07-09 | 2019-01-04 | 深圳市华星光电半导体显示技术有限公司 | Tft array substrate and preparation method thereof |
| CN109860287A (en) * | 2018-11-29 | 2019-06-07 | 清华大学 | Field-effect tube and preparation method thereof |
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