CN102645628A - Fixed-high and fixed-low fault injecting circuit and method for online test of digital circuit board - Google Patents
Fixed-high and fixed-low fault injecting circuit and method for online test of digital circuit board Download PDFInfo
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- CN102645628A CN102645628A CN2012101162803A CN201210116280A CN102645628A CN 102645628 A CN102645628 A CN 102645628A CN 2012101162803 A CN2012101162803 A CN 2012101162803A CN 201210116280 A CN201210116280 A CN 201210116280A CN 102645628 A CN102645628 A CN 102645628A
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Abstract
The invention discloses a fixed-high and fixed-low fault injecting circuit and method for an online test of a digital circuit board. The circuit comprises variable resistors R1 and R2, a cable assembly M, a lead wire group L, a switch K, a selection switch K1 and probes T, T1 and T2, wherein the selection switch K1 selects the variable resistor R1 or R2 to be electrically connected with a power supply pin or a grounded pin of a digital circuit chip, is communicated with the probe T through the controlling of the switch K and then is connected with an input signal pin of the digital circuit chip, so that the variable resistor R1 or R2 is electrically connected with a line between the input signal pin of the digital circuit chip and the power supply pin or the grounded pin of the digital circuit chip; the resistance value of the variable resistor R1 or R2 is adjusted from big to small until the input signal pin has the fixed-high or fixed-low fault; and then, the adjustment of the resistors is stopped and the fault injection is successful. The fixed-high and fixed-low fault injecting circuit and method for the online test of the digital circuit board can realize single-path or multi-path continuous or discontinuous fixed-high or fixed-low fault injection of the input signal pin of the digital circuit chip and meet the technical requirements of testability experiments.
Description
Technical field
The present invention relates to testability experimental technique field, specifically, is a kind of low admittedly fault injection circuit of solid height and method of digital circuit board on-line testing.
Background technology
It is the key link of electronic system testability experimental technique that fault is injected; Be under the prerequisite that guarantees electronic system safety; According to selected in advance fault model; Adopt certain strategy artificially fault to be injected the target electronic system with built-in testing (BIT) function,, can required qualitative or quantitative evaluation result be provided for test through observing and the response of evaluating objects electronic system built-in testing under fault injection situation.
At present, the Failure Injection Technique to electronic system mainly is categorized as: the fault injection of line, the fault injection on the digital circuit board between the digital circuit board in the fault injection of electronic system external bus, the electronic system.Wherein, In kind to the digital circuit board of duty, the transient fault implantttion technique based on the reverse drive technology is arranged at present, this technology is to inject the level that big electric current comes forcibly changing digital circuit board chip pin through constant current source moment; But easily chip is caused damage; And can not realize the injection that continues, injection length normally between microsecond and millisecond, is difficult to use in the check to digital circuit board built-in testing function.Therefore, how in kind to the digital circuit board of duty, the low admittedly fault of the solid height that continues is injected and is still a still unsolved difficult problem.
So the fault filling method when how a kind of on-line testing of digital circuit board safely and effectively is provided solves the problem that prior art is difficult to verify the electronic system testability, is a very valuable research.
Summary of the invention
In order to address the above problem; The low admittedly fault injection circuit of solid height and the method that the purpose of this invention is to provide a kind of digital circuit board on-line testing; Can be when electronic system be worked; Digital circuit board chip single channel in the electronic system or multichannel pin are continued or be interrupted and inject solid high solid low fault; Verify the built-in testing ability of digital circuit board and target electronic system, satisfy the technical need of testability test, solved prior art and be difficult to the digital circuit board material object of duty is carried out the problem that fault is injected.
The low admittedly fault injection circuit of the solid height of a kind of digital circuit board on-line testing of the present invention comprises variohm R1, R2, CA cable assembly M, lead wire set L, K switch, SS K1 and probe T, T1, T2.
Wherein, CA cable assembly M is made up of n bar cable, n >=1; Every cable one end links to each other with a probe T, probe T be used for the digital circuit board chip in the input signal pin link to each other; Every cable other end connects lead wire set L through a K switch, and K switch is used for controlling the connection line break-make of probe T of linking to each other with cable; Lead wire set L is connected with variohm R1, R2 one end respectively through SS K1, and the other end of variohm R1, R2 is connected with probe T1, T2 respectively, and probe T1, T2 are used for connecting the power pins and the grounding pin of digital circuit board chip respectively; SS K1 is used for selecting the electric connection with digital circuit board chip power pin or grounding pin; Be used for regulating from probe T1, through variohm R1, SS K1, lead wire set L, K switch, CA cable assembly M, to the resistance value of the connection line of probe T; Variohm R2 is used for regulating from probe T2, through variohm R2, SS K1, lead wire set L, K switch, CA cable assembly M, to the resistance value of the connection line of probe T.
Based on the solid height of the above-mentioned digital circuit board on-line testing fault filling method of low fault injection circuit admittedly, accomplish through following step:
Step 1: the digital circuit board pin of chip is selected;
Through the digital circuit board chip pin schematic diagram that the need fault is injected, find power pins, grounding pin and the input signal pin of the digital circuit board chip that needs the fault injection.
Step 2: circuit connects;
Probe T1, T2 are linked to each other with a grounding pin with a power pins of digital circuit board chip respectively; The input signal pin of one or m need fault injection of the digital circuit board that or m probe T and need fault are injected links to each other, and with insulating gel probe T1, T2 and T gluing is fixed on this digital circuit board; Digital circuit board is reinstalled the target electronic system, and power up the operational objective electronic system; Above-mentioned m >=2.
Step 3: fault is injected;
1) the solid high fault of the single channel of digital circuit board or multichannel continues to inject: electrically connect between control SS K1 and digital circuit board chip power pin; After the initial resistance of variohm R1 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R1 resistance value, solid high fault appears in the input signal pin that is connected to probe T, and stop to regulate resistance this moment, and single channel or the solid high fault of multichannel of promptly accomplishing digital circuit board continue to inject.
2) the low admittedly fault of the single channel of digital circuit board or multichannel continues to inject: electrically connect between control SS K1 and digital circuit board chip grounding pin; After the initial resistance of variohm R2 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R2 resistance value, low admittedly fault appears in the input signal pin that is connected to probe T, and stop to regulate resistance this moment, and single channel or the low admittedly fault of multichannel of promptly having accomplished digital circuit board continue to inject.
3) the solid high fault of the single channel of digital circuit board or multichannel is interrupted injection: electrically connect between control SS K1 and digital circuit board chip power pin; After the initial resistance of variohm R1 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R1 resistance value, solid high fault appears in the input signal pin that is connected to probe T, stops to regulate resistance this moment; Cut-off switch K needs to guarantee that digital circuit board can recover normal subsequently; Electronic system requirement according to target; Through the single channel of K switch control probe T connection or the make-and-break time and the frequency of multi-path line; This input signal pin should repeat to occur solid high fault accordingly, has promptly accomplished the single channel or the solid high fault of multichannel of digital circuit board and has been interrupted injection.
4) the low admittedly fault of the single channel of digital circuit board or multichannel is interrupted injection: electrically connect between control selector switch K1 and digital circuit board chip grounding pin; After the initial resistance of variable resistance R2 was adjusted to maximum, the control by K switch kept the single channel that probe T connects or the connection of multi-path line; By descending adjusting variable resistance R2 resistance value,, stop to regulate resistance this moment to the low admittedly fault of this input signal pin appearance; Cut-off switch K needs to guarantee that digital circuit board can recover normal again; Electronic system requirement according to target; By the single channel of K switch control probe T connection or the make-and-break time and the frequency of multi-path line; The input signal pin that probe T links to each other should repeat low admittedly fault accordingly, has promptly accomplished the single channel or the low admittedly fault of multichannel of digital circuit board and has been interrupted injection.
The invention has the advantages that:
1, fault injection circuit of the present invention is realized the injection of solid high fault through between the input signal pin of digital circuit board chip and power pins, increasing variohm;
2, fault injection circuit of the present invention is realized the injection of low fault admittedly through between the input signal pin of digital circuit board chip and grounding pin, increasing variohm;
3, fault filling method of the present invention can be through from big to small adjusting digital circuit board chip input signal pin and the variohm between power pins or grounding pin, the matching value of searching variohm, thus can not cause damage to the digital circuit board chip;
4, fault injection circuit middle probe of the present invention contacts with chip pin that to adopt the insulating gel gluing method to realize fixing, and probe draws through the conduction flexible cord, greatly reduces the probe stationary requisite space, is applicable to that the fault of cramped construction electronic system is injected;
5, the present invention adopts in the fault filling method and carries out fault injection control through switch, can realize the sustained fault injection and be interrupted the fault injection;
6, fault injection circuit of the present invention adopts passive design, does not need external power supply, can guarantee the test safety of target electronic system;
7, fault injection circuit of the present invention can disposable each pin that a plurality of probes is linked into the digital circuit board chip respectively; Control the connection line break-make of each probe T thus respectively through switch; Realize the injection of single channel or multichannel fault, and can be, realize solid height or hang down the injection of fault admittedly through being connected of switch selection and power pins or grounding pin; Need not repeatedly disassemblerassembler, improved work efficiency.
Description of drawings
Fig. 1 is a digital circuit board on-line testing fault injection circuit structural representation of the present invention;
Fig. 2 is a fault filling method process flow diagram of the present invention;
When the solid high fault of single channel or multichannel that Fig. 3 carries out digital circuit board for the present invention continues to inject, the connected mode synoptic diagram of fault injection circuit and digital circuit board chip chamber;
When the low admittedly fault of single channel or multichannel that Fig. 4 carries out digital circuit board for the present invention continues to inject, the connected mode synoptic diagram of fault injection circuit and digital circuit board chip chamber;
The solid high fault of single channel or multichannel that Fig. 5 carries out digital circuit board for the present invention is interrupted when injecting, the connected mode synoptic diagram of fault injection circuit and digital circuit board chip chamber;
The low admittedly fault of single channel or multichannel that Fig. 6 carries out digital circuit board for the present invention is interrupted when injecting, the connected mode synoptic diagram of fault injection circuit and digital circuit board chip chamber;
Fig. 7 when injecting through the single channel fault of switch on and off control carrying out digital circuit board among the present invention, the connected mode synoptic diagram of fault injection circuit and digital circuit board chip chamber;
Fig. 8 when injecting through the multichannel fault of switch on and off control carrying out digital circuit board among the present invention, the connected mode synoptic diagram of fault injection circuit and digital circuit board chip chamber.
Embodiment
Come the present invention is further specified below in conjunction with accompanying drawing.
The low admittedly fault injection circuit of the solid height of digital circuit board on-line testing of the present invention comprises variohm R1, R2, CA cable assembly M, lead wire set L, K switch, SS K1 and the external probe T, T1, the T2, as shown in Figure 1 that are integrated on the circuit board.
Wherein, CA cable assembly M is made up of n bar cable, n >=1; Every cable one end can link to each other with a probe T through the conduction flexible cord, probe T be used for the digital circuit board chip in the input signal pin link to each other; Every the cable other end connects lead wire set L through a K switch; K switch is used for controlling the connection line break-make of probe T of linking to each other with cable; Link to each other through one or more input signal pins in one or more probe T and the digital circuit board chip thus; Realize that the single channel or the multichannel fault of input signal pin in the digital circuit board chip inject, and be communicated with and break off, realize continuing or being interrupted the fault injection of input signal pin in the digital circuit board chip through the K switch that links to each other with probe T.Lead wire set L is connected with variohm R1, R2 one end respectively through SS K1; The other end of variohm R1, R2 is connected with probe T1, T2 respectively, and probe T1, T2 are used for connecting the power pins VDD and the grounding pin GND of digital circuit board chip respectively; SS K1 is used for selecting the electric connection with digital circuit board chip power pin VDD or grounding pin GND, thereby realizes respectively that through probe T1, T2 the solid high or low admittedly fault of digital circuit board chip injects.Said variohm R1 is used for regulating the probe T1 that links to each other with the power pins VDD of digital circuit board chip; Through SS K1, lead wire set L, CA cable assembly M, K switch, to probe T that the input signal pin of digital circuit board chip links to each other between the resistance of electric connection path; Variohm R2 is used for regulating the probe T2 that links to each other with the grounding pin GND of digital circuit board chip; Through SS K1, lead wire set L, CA cable assembly M, K switch, to probe T that the input signal pin of digital circuit board chip links to each other between the resistance of electric connection path; The adjusting of variohm resistance value needs descending resistance of slowly regulating R1 or R2 evenly, prevents that the digital circuit board chip current is excessive, the infringement circuit board.
The variohm R1 that adopts among the present invention, the maximum adjustable resistance of R2 satisfy
Requirement, wherein | U|
MaxThe upper limit driving voltage value that the input signal pin that is connected for probe T allows, | I|
MinThe required non-zero lower limit driving current value of input signal pin that is connected for probe T.
When regulating the resistance value of variohm R1, R2, should satisfy the minimum adjustable electric resistance of variohm R1, R2 among the present invention
Requirement, wherein | U|
MaxThe upper limit driving voltage value that the input signal pin that links to each other for probe T allows, | I
i|
MaxThe higher limit that each the road drive current that is connected for the input signal pin that is connected with probe T allows, min{|I
i|
MaxIt is a road minimum non-zero upper limit driving current value of higher limit in each road drive current.The drive current of the input signal pin that obvious probe T links to each other satisfies | I|
Min＜| I
i|
MaxRequirement, so R is arranged
Min＜R
MaxInject build-out resistor value R when the fault of variohm R1, R2 and satisfy R
Min＜R＜R
MaxThe time, in the time of can guaranteeing the resistance of descending adjusting variohm R1 or R2, each road drive current of the input signal pin that probe T links to each other can not surpass the higher limit that allows, and has guaranteed each route road electric current safety that fault links to each other with probe T when injecting.
Admittedly hang down the fault filling method of fault injection circuit based on the solid height of above-mentioned a kind of digital circuit board on-line testing; Can realize that the single channel of digital circuit board or the solid high fault of multichannel are continued the low admittedly fault of injection, single channel or multichannel to be continued the solid high fault of injection, single channel or multichannel and be interrupted the low admittedly fault of injection and single channel or multichannel and be interrupted injection; As shown in Figure 2, specifically accomplish through following step:
Step 1: the digital circuit board pin of chip is selected;
Through the digital circuit board chip pin schematic diagram that the need fault is injected, find power pins, grounding pin and the input signal pin of the digital circuit board chip that needs the fault injection;
Step 2: circuit connects;
Probe T1, T2 is glued fixing with a power pins VDD and a grounding pin GND employing insulating gel of digital circuit board chip respectively; The input signal pin that needs fault to inject one or m probe T and the digital circuit board that needs fault to inject one or m (m >=2) links to each other, and with insulating gel probe T1, T2 and T gluing is fixed on the digital circuit board; Digital circuit board is reinstalled the target electronic system, and power up the operational objective electronic system;
Step 3: fault is injected;
1) the solid high fault of the single channel of digital circuit board or multichannel continues to inject: electrically connect between control SS K1 and digital circuit board chip power pin VDD; Like Fig. 3, shown in Figure 4; After the initial resistance of variohm R1 was adjusted to maximal value, the K switch of retentive control probe T connection line was communicated with; Through descending adjusting variohm R1 resistance value, solid high fault appears in the input signal pin that is connected up to probe T, stops to regulate resistance this moment, accomplishes fault and injects, and realizes that thus the solid high fault of digital circuit board single channel or multichannel continues to inject; In said process, through inserting oscillograph, thereby indicate through observing system failure condition and oscillograph between the input signal pin that injects fault and grounding pin GND, find the build-out resistor value of fault injection circuit.
Through observing and the behavior of evaluating objects electronic system after fault is injected, can verify when the solid high fault of single channel or multichannel continues injection the ability of the cycle BIT of target electronic system during to this digital circuit board on-line operation.
Through corresponding operating, and the behavior of observation and evaluating objects electronic system, can verify when the solid high fault of single channel or multichannel continues to inject the ability of the maintenance BIT of target electronic system during to this digital circuit board on-line operation to the target electronic system.
Then system closing is restarted; Through observing and the behavior of startup operation once more after fault is injected of evaluating objects electronic system; Can verify when the solid high fault of single channel or multichannel continues to inject the ability of the power on BIT of target electronic system during to this digital circuit board on-line operation.
2) the low admittedly fault of the single channel of digital circuit board or multichannel continues to inject: electrically connect between control SS K1 and digital circuit board chip grounding pin GND; Like Fig. 5, shown in Figure 6; After the initial resistance of variohm R2 was adjusted to maximal value, the K switch of retentive control probe T connection line was communicated with; Through descending adjusting variohm R2 resistance value, low admittedly fault appears in the input signal pin that is connected up to probe T, stops to regulate resistance this moment, accomplishes fault and injects, and realizes that thus the low admittedly fault of digital circuit board single channel or multichannel continues to inject; In said process, through inserting oscillograph, thereby indicate through observing system failure condition and oscillograph between the input signal pin that injects fault and grounding pin GND, find the build-out resistor value of fault injection circuit.
Through observing and the behavior of evaluating objects electronic system after fault is injected, can verify when the low admittedly fault of single channel or multichannel continues injection the ability of the cycle BIT of target electronic system during to this digital circuit board on-line operation.
Through corresponding operating, and the behavior of observation and evaluating objects electronic system, can verify when the low admittedly fault of single channel or multichannel continues to inject the ability of the maintenance BIT of target electronic system during to this digital circuit board on-line operation to the target electronic system.
Then system closing is restarted; Through observing and the behavior of startup operation once more after fault is injected of evaluating objects electronic system; Can verify when the low admittedly fault of single channel or multichannel continues to inject the ability of the power on BIT of target electronic system during to this digital circuit board on-line operation.
3) the solid high fault of the single channel of digital circuit board or multichannel is interrupted injection: electrically connect between control SS K1 and digital circuit board chip power pin VDD; Like Fig. 3, shown in Figure 4; After the initial resistance of variohm R1 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R1 resistance value, solid high fault appears in the input signal pin that links to each other up to probe T, stops to regulate resistance this moment; Cut-off switch K needs to guarantee that digital circuit board can recover normal again; Electronic system requirement according to target; Through the single channel of K switch control probe T connection or the make-and-break time and the frequency of multi-path line; The input signal pin that probe T is connected should repeat to occur solid high fault accordingly; The completion fault is injected, and realizes that thus the solid high fault of digital circuit board single channel or multichannel is interrupted injection; In said process, through inserting oscillograph, thereby indicate through observing system failure condition and oscillograph between the input signal pin that injects fault and grounding pin GND, find the build-out resistor value of fault injection circuit.
Through observing and the behavior of evaluating objects electronic system after fault is injected, can verify when the solid high fault of single channel or multichannel is interrupted injection the ability of the cycle BIT of target electronic system during to this digital circuit board on-line operation.
Through corresponding operating, and the behavior of observation and evaluating objects electronic system, can verify that the solid high fault of single channel or multichannel is interrupted when injecting, the ability of the maintenance BIT of target electronic system during to this digital circuit board on-line operation to the target electronic system.
Then system closing is restarted; Through observing and the behavior of startup operation once more after fault is injected of evaluating objects electronic system; Can verify that the solid high fault of single channel or multichannel is interrupted when injecting, the ability of the power on BIT of target electronic system during to this digital circuit board on-line operation.
4) the low admittedly fault of the single channel of digital circuit board or multichannel is interrupted injection: electrically connect between control SS K1 and digital circuit board chip grounding pin GND; Like Fig. 5, shown in Figure 6; After the initial resistance of variohm R1 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R2 resistance value, low admittedly fault appears in the input signal pin that links to each other up to probe T, stops to regulate resistance this moment; Cut-off switch K needs to guarantee that digital circuit board can recover normal again; Electronic system requirement according to target; Through the single channel of K switch control probe T connection or the make-and-break time and the frequency of multi-path line; The input signal pin that probe T is connected should repeat to occur low admittedly fault accordingly; The completion fault is injected, and realizes that thus the low admittedly fault of digital circuit board single channel or multichannel is interrupted injection.In said process, through inserting oscillograph, thereby indicate through observing system failure condition and oscillograph between the input signal pin that injects fault and grounding pin GND, find the build-out resistor value of fault injection circuit.
Through observing and the behavior of evaluating objects electronic system after fault is injected, can verify when the low admittedly fault of single channel or multichannel is interrupted injection the ability of the cycle BIT of target electronic system during to this digital circuit board on-line operation.
Through corresponding operating, and the behavior of observation and evaluating objects electronic system, can verify that the low admittedly fault of single channel or multichannel is interrupted when injecting, the ability of the maintenance BIT of target electronic system during to this digital circuit board on-line operation to the target electronic system.
Then system closing is restarted; Through observing and the behavior of startup operation once more after fault is injected of evaluating objects electronic system; Can verify that the low admittedly fault of single channel or multichannel is interrupted when injecting, the ability of the power on BIT of target electronic system during to this digital circuit board on-line operation.
The solid height of above-mentioned a kind of digital circuit board on-line testing hangs down in the fault filling method of fault injection circuit admittedly; When single channel of carrying out digital circuit board or the injection of multichannel fault; Make the total quantity of probe T equate with the input signal pin number that the digital circuit board chip need inject fault; Therefore can each probe T be linked into each input signal pin that the digital circuit board chip need inject fault respectively; Control the connection line break-make of each probe T thus through K switch respectively, realize the single channel or the injection of multichannel fault of digital circuit board.As: as shown in Figure 7; In the time of need carrying out the injection of input signal pin 1 single channel fault; The connection line of controlling the probe T that links to each other with pin 1 through K switch is communicated with; The connection line of the probe T that links to each other with other input signal pins breaks off through K switch, realizes that thus the single channel fault of input signal pin 1 is injected; In like manner; As shown in Figure 8; In the time of need carrying out the multichannel fault injection of input signal pin 2,3; The connection line of controlling the probe T that links to each other with input signal pin 2,3 through K switch is communicated with, and the connection line of the probe T that links to each other with input signal pin 1 breaks off through K switch, realizes that thus the multichannel fault of input signal pin 2,3 is injected.
Thus; Low admittedly fault injection circuit of the solid height of digital circuit board on-line testing of the present invention and method; Can verify the various built-in testing abilities of digital circuit board,, solve prior art and be difficult to truly the problem of carrying out the testability test digital circuit board with method cleverly, the operation of safety and lower cost; Satisfy the demand of people, have high practical value the test of electronic system testability.
Claims (5)
1. the low admittedly fault injection circuit of the solid height of a digital circuit board on-line testing is characterized in that: comprise variohm R1, R2, CA cable assembly M, lead wire set L, K switch, SS K1 and probe T, T1, T2;
Wherein, CA cable assembly M is made up of n bar cable, n >=1; Every cable one end links to each other with a probe T, probe T be used for the digital circuit board chip in the input signal pin link to each other; Every cable other end connects lead wire set L through a K switch, and K switch is used for controlling the connection line break-make of probe T of linking to each other with cable; Lead wire set L is connected with variohm R1, R2 one end respectively through SS K1, and the other end of variohm R1, R2 is connected with probe T1, T2 respectively, and probe T1, T2 are used for connecting the power pins and the grounding pin of digital circuit board chip respectively; SS K1 is used for selecting the electric connection with digital circuit board chip power pin or grounding pin; Said variohm R1 is used for regulating from probe T1, through variohm R1, SS K1, lead wire set L, K switch, CA cable assembly M, to the resistance value of the connection line of probe T; Variohm R2 is used for regulating from probe T2, through variohm R2, SS K1, lead wire set L, K switch, CA cable assembly M, to the resistance value of the connection line of probe T.
2. a kind of according to claim 1 solid height of digital circuit board on-line testing hangs down the fault injection circuit admittedly, and it is characterized in that: the maximum adjustable resistance is satisfied in the selection of said variohm R1, R2
Requirement, wherein | U|
MaxThe upper limit driving voltage value that the input signal pin that is connected for probe T allows, | I|
MinThe required non-zero lower limit driving current value of input signal pin that is connected for probe T.
3. a kind of according to claim 1 solid height of digital circuit board on-line testing hangs down the fault injection circuit admittedly, it is characterized in that: said every cable one end links to each other with a probe T through the conduction flexible cord.
4. hang down the fault filling method of fault injection circuit based on the solid height of the described digital circuit board on-line testing of claim 1 admittedly, accomplish through following step:
Step 1: the digital circuit board pin of chip is selected;
Through the digital circuit board chip pin schematic diagram that the need fault is injected, find power pins, grounding pin and the input signal pin of the digital circuit board chip that needs the fault injection;
Step 2: circuit connects;
Probe T1, T2 are linked to each other with a grounding pin with a power pins of digital circuit board chip respectively; The input signal pin of one or m need fault injection of the digital circuit board that or m probe T and need fault are injected links to each other, and with insulating gel probe T1, T2 and T gluing is fixed on the digital circuit board; Digital circuit board is reinstalled the target electronic system, and power up the operational objective electronic system; Above-mentioned m >=2;
Step 3: fault is injected;
1) the solid high fault of the single channel of digital circuit board or multichannel continues to inject: electrically connect between control SS K1 and digital circuit board chip power pin; After the initial resistance of variohm R1 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R1 resistance value, solid high fault appears in the input signal pin that is connected to probe T, stops to regulate resistance this moment;
2) the low admittedly fault of the single channel of digital circuit board or multichannel continues to inject: electrically connect between control SS K1 and digital circuit board chip grounding pin; After the initial resistance of variohm R2 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R2 resistance value, low admittedly fault appears in the input signal pin that is connected to probe T, stops to regulate resistance this moment;
3) the solid high fault of the single channel of digital circuit board or multichannel is interrupted injection: electrically connect between control SS K1 and digital circuit board chip power pin; After the initial resistance of variohm R1 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R1 resistance value, solid high fault appears in the input signal pin that is connected to probe T, stops to regulate resistance this moment; Through the single channel of K switch control probe T connection or the make-and-break time and the frequency of multi-path line;
4) the low admittedly fault of the single channel of digital circuit board or multichannel is interrupted injection: electrically connect between control SS K1 and digital circuit board chip grounding pin; After the initial resistance of variohm R2 was adjusted to maximal value, the control through K switch kept the single channel that probe T connects or the connection of multi-path line; Through descending adjusting variohm R2 resistance value, low admittedly fault appears in the input signal pin that is connected to probe T, stops to regulate resistance this moment; Through the single channel of K switch control probe T connection or the make-and-break time and the frequency of multi-path line.
5. fault filling method as claimed in claim 3; It is characterized in that: said step 2 middle probe T1, T2 adopt power pins of insulating gel and digital circuit board chip and a grounding pin glued fixing respectively, and the input signal pin gluing that or m probe T also adopt insulating gel and the digital circuit board that needs fault to inject or m need fault to inject is fixed.
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| CN201210116280.3A CN102645628B (en) | 2012-04-19 | 2012-04-19 | Fixed-high and fixed-low fault injecting circuit and method for online test of digital circuit board |
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| CN201210116280.3A CN102645628B (en) | 2012-04-19 | 2012-04-19 | Fixed-high and fixed-low fault injecting circuit and method for online test of digital circuit board |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103913701A (en) * | 2014-04-18 | 2014-07-09 | 北京航空航天大学 | Method for manufacturing testability experiment circuit board for supporting direct fault injection |
| CN106407846A (en) * | 2016-10-08 | 2017-02-15 | 中国人民解放军军械工程学院 | Hardware Trojan horse detection system and detection method thereof |
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| CN107356853A (en) * | 2017-06-26 | 2017-11-17 | 上海华岭集成电路技术股份有限公司 | Change the method for probe card probe impedance value |
| CN109633420A (en) * | 2018-12-23 | 2019-04-16 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of probe-type direct fault location board |
| WO2020087863A1 (en) * | 2018-11-01 | 2020-05-07 | 深圳市崧盛电子股份有限公司 | Resistance dimmer for testing dimming performance of led driving power supply |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103913701A (en) * | 2014-04-18 | 2014-07-09 | 北京航空航天大学 | Method for manufacturing testability experiment circuit board for supporting direct fault injection |
| CN103913701B (en) * | 2014-04-18 | 2016-05-18 | 北京航空航天大学 | A kind of testability hookup board manufacturing method of supporting that fault is directly injected |
| CN106407846A (en) * | 2016-10-08 | 2017-02-15 | 中国人民解放军军械工程学院 | Hardware Trojan horse detection system and detection method thereof |
| CN106407846B (en) * | 2016-10-08 | 2019-06-25 | 中国人民解放军军械工程学院 | A kind of hardware Trojan horse detection system and its detection method |
| CN106596604A (en) * | 2016-11-29 | 2017-04-26 | 国网辽宁省电力有限公司沈阳供电公司 | High voltage cable non-destructive testing device based on novel reflection electron diffraction technology |
| CN107356853A (en) * | 2017-06-26 | 2017-11-17 | 上海华岭集成电路技术股份有限公司 | Change the method for probe card probe impedance value |
| WO2020087863A1 (en) * | 2018-11-01 | 2020-05-07 | 深圳市崧盛电子股份有限公司 | Resistance dimmer for testing dimming performance of led driving power supply |
| CN109633420A (en) * | 2018-12-23 | 2019-04-16 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of probe-type direct fault location board |
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