CN102637576A

CN102637576A - Semiconductor structure and preparation method thereof

Info

Publication number: CN102637576A
Application number: CN201110035886XA
Authority: CN
Inventors: 吕函庭; 萧逸璇
Original assignee: Macronix International Co Ltd
Current assignee: Macronix International Co Ltd
Priority date: 2011-02-10
Filing date: 2011-02-10
Publication date: 2012-08-15
Anticipated expiration: 2031-02-10
Also published as: CN102637576B

Abstract

The invention discloses a semiconductor structure and a preparation method thereof. The preparation method comprises the following steps of: forming a first silicon-containing conducting material on a substrate; forming a second silicon-containing conducting material on the first silicon-containing conducting material, wherein the first and second silicon-containing conducting materials have different doping conditions; and thermally oxidizing the first and second silicon-containing conducting materials to convert the whole first silicon-containing conducting material to an insulation oxide structure and convert the second silicon-containing conducting material to a silicon-containing conducting structure and an insulation oxide layer.

Description

Semiconductor structure and manufacturing approach thereof

Technical field

The present invention relates to semiconductor structure and manufacturing approach thereof, particularly relate to characteristic is good and size is little semiconductor structure and manufacturing approach thereof.

Background technology

Storage device is used among many products, for example in the memory element of MP3 player, digital camera, computer archive or the like.Along with the increase of using, also tend to less size, bigger memory capacity for the demand of storage device.In response to this demand, need to make the storage device of high component density.

Designers develop a kind of method that improves density of memory devices and are to use three-dimensional stacked storage device, are used to reach higher memory capacity, reduce the cost of each bit simultaneously.Yet the micro limit of the memory cell size of this kind storage device is difficult to great breakthrough still greater than 50nm at present.The element material that the usefulness of storage device can also can be used and to some extent the restriction.

Summary of the invention

The objective of the invention is to a kind of semiconductor structure and manufacturing approach thereof, can form the semiconductor structure that characteristic is good and size is little.

For reaching above-mentioned purpose, the present invention provides a kind of manufacturing approach of semiconductor structure.Its method may further comprise the steps.In substrate, form the first siliceous electric conducting material.On the first siliceous electric conducting material, form the second siliceous electric conducting material.The first siliceous electric conducting material has different doping conditions with the second siliceous electric conducting material.The thermal oxidation first siliceous electric conducting material and the second siliceous electric conducting material, so that the first siliceous electric conducting material all is transformed into the insulating oxide structure, the second siliceous electric conducting material is transformed into siliceous conductive structure and insulating oxide.

A kind of semiconductor structure is provided.Semiconductor structure comprises substrate, insulating oxide structure, siliceous conductive structure and insulating oxide.The insulating oxide structure is formed in the substrate.Siliceous conductive structure and insulating oxide are formed on the insulating oxide structure.Insulating oxide structure and insulating oxide have one of at least the beak profile.。

Hereinafter is special lifts preferred embodiment, and cooperates appended accompanying drawing, elaborates as follows:

Description of drawings

Fig. 1 to Fig. 4 is the manufacturing approach of semiconductor structure in one embodiment of the invention;

Fig. 5 is the semiconductor device of one embodiment of the invention.

The main element symbol description

2: substrate

4: the first siliceous electric conducting materials

6: the second siliceous electric conducting materials

8,22,122: stacked structure

16: the insulating oxide structure

18,118: siliceous conductive structure

20: insulating oxide

124: dielectric element

126: conductor wire

128,130,132: dielectric layer

D: the width of stacked structure

W: the distance between the stacked structure

Embodiment

Fig. 1 to Fig. 4 illustrates the manufacturing approach of semiconductor structure among the embodiment.Please, in substrate 2, pile up the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 with reference to Fig. 1.The second siliceous electric conducting material 6 is separated from each other through the first siliceous electric conducting material 4.For instance, the thickness T 1 of the first siliceous electric conducting material 4 is about 20nm.The thickness T 2 of the second siliceous electric conducting material 6 is about 40nm.

Please with reference to Fig. 1, in one embodiment, substrate 2 is a monocrystalline silicon, and the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 are from the formed monocrystalline silicon of substrate 2 epitaxial growths.For instance, substrate 2 is a monocrystalline silicon; The first siliceous electric conducting material 4 is from the formed monocrystalline silicon of substrate 2 epitaxial growths; The second siliceous electric conducting material 6 is from the formed monocrystalline silicon of first siliceous electric conducting material 4 epitaxial growths; The first siliceous electric conducting material 4 is again from the formed monocrystalline silicon of second siliceous electric conducting material 6 epitaxial growths.Therefore the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 can have the very good monocrystalline silicon of structure.This monocrystalline silicon has the favorable conductive characteristic again, therefore can promote the usefulness of semiconductor structure.

The patterning first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 are to form stacked structure as shown in Figure 28.Please with reference to Fig. 2, each of stacked structure 8 is to comprise the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 that is staggeredly stacked.The method of patterning comprises the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 that utilizes etching process to remove part.In one embodiment, the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 are for example silicon of similar material, so etching process is identical to the first siliceous electric conducting material 4 with the etch-rate of the second siliceous electric conducting material 6 haply.So etching process can accurately be controlled the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 has meticulous profile or high depth-width ratio (aspect ratio) behind patterning.For instance, the width W of stacked structure 8 is about 20nm.Distance B between two adjoining stacked structures 8 is about 130nm.

Each the first siliceous electric conducting material 4 (Fig. 2) of thermal oxidation and the second siliceous electric conducting material 6; So that the first siliceous electric conducting material 4 all is transformed into insulating oxide structure 16; The second siliceous electric conducting material 6 is transformed into siliceous conductive structure 18 and insulating oxide 20; Wherein insulating oxide 20 is to be positioned on the surface of siliceous conductive structure 18 and with siliceous conductive structure 18 to contact, and is as shown in Figure 3.Please with reference to Fig. 3, insulating oxide structure 16 has the beak profile with insulating oxide 20.For instance; Thermal-oxidative production process comprises the first siliceous electric conducting material 4 (Fig. 2) and the second siliceous electric conducting material 6 be placed on and carries out heat in the oxygenous environment, and oxygen is got into and reaction generation oxide isolated material silica for example from the diffusion into the surface of the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6.

In an embodiment; The first siliceous electric conducting material 4 (Fig. 2) has different doping conditions with the second siliceous electric conducting material 6; Therefore in the thermal oxidation process of the same terms; Perhaps in the process of the while thermal oxidation first siliceous electric conducting material 4 and the second siliceous electric conducting material 6, the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 can have the different oxidation diffusion rate.In an embodiment, the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 doping with variable concentrations and same conductivity.For instance; The first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 all have N type doping; And the doping concentration of N type of the first siliceous electric conducting material 4 is greater than the doping concentration of N type of the second siliceous electric conducting material 6; For example differ 2 grade to 3 grades, therefore the oxide-diffused speed of the first siliceous electric conducting material 4 is greater than the oxide-diffused speed of the second siliceous electric conducting material 6.N type doping comprises 5A (VA) family elements such as P, As.Perhaps, the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 all have P type doping, and the doping concentration of P type of the first siliceous electric conducting material 4 is different from the doping concentration of P type of the second siliceous electric conducting material 6.P type doping comprises 3A such as B (IIIA) family element.The oxidation situation of the first siliceous electric conducting material 4 and the second siliceous electric conducting material 6 also can for example heating-up temperature, heating time or the like suitably control through the parameter of modulation oxidation manufacture craft.

Remove insulating oxide 20, to form stacked structure as shown in Figure 4 22.In an embodiment; Be to use the etching process that insulation oxide (for example silica) and siliceous conducting objects (for example monocrystalline silicon) are had an etching selectivity to remove insulating oxide 20; Therefore in the process that removes insulating oxide 20, also can remove the insulating oxide structure 16 of part simultaneously; Make the size decreases of insulating oxide structure 16, and can not damage siliceous conductive structure 18 haply.Etching process comprises for example dry-etching and Wet-type etching.

Fig. 5 illustrates the semiconductor device of an embodiment.Please with reference to Fig. 5; In an embodiment; Be on the stacked structure 122 similar, to form dielectric element 124 with the stacked structure of Fig. 4 22; And on dielectric element 124, form conductor wire 126, to form three-dimensional perpendicular grid storage device (3D vertical gate memory device), for example comprise anti-and grid (NAND) type flash body or anti-fuse memory bank or the like.For instance, in the stacked structure 22 the siliceous conductive structure 118 of different levels respectively as the bit line (BL) of different memory planes.Conductor wire 126 comprises for example polysilicon.Conductor wire 126 can be used as word line (WL), ground connection selection wire (GSL) or tandem selection wire (SSL).Dielectric element 124 can have sandwich construction, for example is ONO composite bed or ONONO composite bed or BE-SONOS composite bed (its structure can with reference to U. S. application case number 11/419,977, the patent No. 7414889), or comprises for example dielectric layer 128,130,132.In one embodiment, dielectric layer 128 is a silica, and dielectric layer 130 is a silicon nitride, and dielectric layer 132 is a silica.In other embodiments, dielectric element 124 is simple layer dielectric material (not shown)s, comprises silicon nitride or silica for example silicon dioxide, silicon oxynitride.

Though disclosed the present invention in conjunction with above preferred embodiment; Yet it is not in order to limiting the present invention, anyly is familiar with this operator, is not breaking away from the spirit and scope of the present invention; Can do a little change and retouching, thus protection scope of the present invention should with enclose claim was defined is as the criterion.

Claims

1. the manufacturing approach of a semiconductor structure comprises:

In a substrate, form one first siliceous electric conducting material;

On this first siliceous electric conducting material, form one second siliceous electric conducting material, wherein this first siliceous electric conducting material has different doping conditions with this second siliceous electric conducting material; And

This first siliceous electric conducting material of thermal oxidation and this second siliceous electric conducting material, so that this first siliceous electric conducting material all is transformed into an insulating oxide structure, this second siliceous electric conducting material is transformed into a siliceous conductive structure and an insulating oxide.

2. the manufacturing approach of semiconductor structure as claimed in claim 1, wherein this first siliceous electric conducting material and this second siliceous electric conducting material doping with variable concentrations and same conductivity.

3. the manufacturing approach of semiconductor structure as claimed in claim 1, wherein this insulating oxide structure has the beak profile.

4. the manufacturing approach of semiconductor structure as claimed in claim 1, wherein this first siliceous electric conducting material and this second siliceous electric conducting material thermal oxidation simultaneously.

5. the manufacturing approach of semiconductor structure as claimed in claim 1, wherein in the process of thermal oxidation, the oxide-diffused speed of this first siliceous electric conducting material is greater than the oxide-diffused speed of this second siliceous electric conducting material.

6. the manufacturing approach of semiconductor structure as claimed in claim 1, wherein this substrate is a monocrystalline silicon, this first siliceous electric conducting material is from the formed monocrystalline silicon of this substrate epitaxial growth.

7. the manufacturing approach of semiconductor structure as claimed in claim 1, wherein this first siliceous electric conducting material and this second siliceous electric conducting material are all silicon, and the manufacturing approach of this semiconductor structure also comprises:

Before this first siliceous electric conducting material of thermal oxidation and this second siliceous electric conducting material, this of etching part first siliceous electric conducting material and this second siliceous electric conducting material are with this first siliceous electric conducting material of patterning and this second siliceous electric conducting material.

8. the manufacturing approach of semiconductor structure as claimed in claim 1 wherein forms most these first siliceous electric conducting materials and most these second siliceous electric conducting materials, and those second siliceous electric conducting materials are separated from each other through those first siliceous electric conducting materials.

9. semiconductor structure comprises:

Substrate;

The insulating oxide structure is formed in this substrate; And

A siliceous conductive structure and an insulating oxide are formed on this insulating oxide structure, and wherein this insulating oxide structure and this insulating oxide have one of at least the beak profile.

10. semiconductor structure as claimed in claim 9, wherein this insulating oxide structure and this insulating oxide all have the beak profile.