CN102636929A - Liquid crystal display panel, liquid crystal display device and manufacturing method for array substrate - Google Patents
Liquid crystal display panel, liquid crystal display device and manufacturing method for array substrate Download PDFInfo
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- CN102636929A CN102636929A CN2012101187514A CN201210118751A CN102636929A CN 102636929 A CN102636929 A CN 102636929A CN 2012101187514 A CN2012101187514 A CN 2012101187514A CN 201210118751 A CN201210118751 A CN 201210118751A CN 102636929 A CN102636929 A CN 102636929A
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- via hole
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- hole
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/133707—Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/133753—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers with different alignment orientations or pretilt angles on a same surface, e.g. for grey scale or improved viewing angle
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/137—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
- G02F1/139—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering based on orientation effects in which the liquid crystal remains transparent
- G02F1/1393—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering based on orientation effects in which the liquid crystal remains transparent the birefringence of the liquid crystal being electrically controlled, e.g. ECB-, DAP-, HAN-, PI-LC cells
Abstract
The invention discloses a liquid crystal display panel, a liquid crystal display device, and a manufacturing method for an array substrate. The liquid crystal display panel comprises a color light filter substrate and an array substrate which are arranged at an interval, wherein a plurality of pixel units are arranged on the surface of the array substrate, close to the color light filter substrate; each pixel unit comprises a thin film transistor, a pixel electrode and a through hole for electrically connecting the thin film transistor with the pixel electrode; and at least one auxiliary hole is formed among the pixel units or in each pixel unit and is formed together with the through hole according to a detecting etching end-point mode etching method. By adopting a manner, a detecting voltage can be amplified by the liquid crystal display panel disclosed by the invention, so that a forming process of the through hole is accurately and reliably monitored and the manufacturing quality of the through hole is ensured.
Description
Technical field
The present invention relates to the display technique field, particularly relate to the method for making of a kind of liquid crystal panel, liquid crystal indicator and array base palte thereof.
Background technology
At present, LCD becomes the main flow that shows product on the market day by day, and liquid crystal panel is the chief component of LCD.In the manufacturing process of liquid crystal panel, need on array base palte, form gate metal layer, active layer, source metal, through hole (VIA) and pixel electrode layer successively.
In the processing procedure of the source electrode that connects thin film transistor (TFT) and the through hole of pixel electrode, be through lithographic method formation through hole.And the time control of etching formation through hole is bigger to the influence of making precision, and prior art adopts the mode that provides certain etching time in advance to form through hole.
But through hole forms needed true etching period, influenced by the thickness that early stage, processing procedure obtained.Early stage, the thickness of processing procedure was difficult to control, so make through hole form needed true etching period be difficult to predetermined accurately.In this case, just there is the too short or long problem of etching time that provides in advance.
Summary of the invention
The technical matters that the present invention mainly solves provides the method for making of a kind of liquid crystal panel, liquid crystal indicator and array base palte thereof; Can be at detecting etching end point (End Point Detector mode; EPD) in the technology; Amplify the forming process of detecting voltage and then can more accurately monitoring through hole reliably, guarantee the fabricating quality of through hole.
For solving the problems of the technologies described above, the technical scheme that the present invention adopts is: a kind of liquid crystal panel is provided, and liquid crystal panel comprises colored optical filtering substrates and the array base palte that is provided with at interval; The surface of the contiguous colored optical filtering substrates of array base palte is provided with some pixel cells, and pixel cell comprises thin film transistor (TFT), pixel electrode and the through hole that is electrically connected thin film transistor (TFT) and pixel electrode; Wherein, the via hole that at least one and through hole together adopt detecting etching end point pattern etching method to form is set between the pixel cell or in the pixel cell.
Wherein, the surface of the contiguous array base palte of colored optical filtering substrates is provided with black matrix", and black matrix" blocks via hole.
Wherein, array base palte is the array base palte of pixel segmentation homeotropic liquid crystal display, an end setting of via hole neighborhood pixels electrode.
For solving the problems of the technologies described above; Another technical scheme that the present invention adopts is: a kind of liquid crystal indicator is provided; Liquid crystal indicator comprises liquid crystal panel and module backlight, and module backlight is that liquid crystal panel provides light source, and liquid crystal panel comprises colored optical filtering substrates and the array base palte that is provided with at interval; The surface of the contiguous colored optical filtering substrates of array base palte is provided with some pixel cells, and pixel cell comprises thin film transistor (TFT), pixel electrode and the through hole that is electrically connected thin film transistor (TFT) and pixel electrode; Wherein, the via hole that at least one and through hole together adopt detecting etching end point pattern etching method to form is set between the pixel cell or in the pixel cell.
Wherein, the surface of the contiguous array base palte of colored optical filtering substrates is provided with black matrix", and black matrix" blocks via hole.
For solving the problems of the technologies described above; Another technical scheme that the present invention adopts is: the method for making that a kind of array base palte is provided; Comprise: on glass substrate, form thin film transistor (TFT) as a pixel cell part; Pixel cell is formed in the first area of glass substrate, and the first area is corresponding to the minimum cut panel unit of glass substrate, and definition has at least two first areas that are provided with at interval on the glass substrate; Zone definitions is a second area between the first area on the glass substrate, and the neighboring area outside all first areas on the glass substrate is defined as the 3rd zone; Adopt detecting etching end point pattern etching method on glass substrate, to form through hole; Through hole is electrically connected formed pixel electrode in thin film transistor (TFT) and the subsequent etch processing procedure; In detecting etching end point pattern etching process; Form via hole at least one zone in first area, second area and the 3rd zone simultaneously; And the etchant in the dry ecthing environment of the method for testing of utilizing detecting etching end point pattern when forming through hole with via hole and the concentration of product are detected the formation detecting data; After forming detecting data, change detecting data into detecting voltage.
Wherein, form the step of via hole, comprising: the position that via hole is formed at the black matrix" of corresponding colored optical filtering substrates on the glass substrate.
Wherein, the step that forms via hole comprises: form via hole, and make an end setting of via hole neighborhood pixels electrode.
Wherein, via hole is arranged at the less relatively position of electronic circuit in second area or the 3rd zone.
Wherein, comprise the 4th zone and remaining the 5th zone that only has insulation course on the array base palte, via hole is arranged at the 4th zone.
The invention has the beneficial effects as follows: the situation that is different from prior art; The present invention is provided with the via hole that together forms with through hole in pixel cell; Through setting up the mode of non-functional via hole, be equal to the object of the detecting that has increased EPD pattern etching method, and then can effectively amplify the corresponding detecting change in voltage of detecting data; The feasible forming process that can more accurately monitor through hole reliably, the fabricating quality of assurance through hole.
Description of drawings
Fig. 1 is the schematic cross-section of liquid crystal panel embodiment of the present invention;
Fig. 2 is the floor map of the present invention's pixel cell as shown in Figure 1;
Fig. 3 is the schematic cross-section along the AB direction of via hole shown in Figure 2;
Fig. 4 is the process flow diagram of method for making first embodiment of array base palte of the present invention;
Fig. 5 is the floor map that via hole shown in Figure 4 forms the array base palte that produces in the step;
Fig. 6 is the process flow diagram of method for making second embodiment of array base palte of the present invention;
Fig. 7 is detecting voltage and the dry etching time chart that uses EPD pattern etching method in the prior art;
Fig. 8 is detecting voltage and the dry etching time chart that uses EPD pattern etching method among the array base palte method for making embodiment of the present invention.
Embodiment
Below, array base palte of the present invention and method of testing embodiment thereof are specifically described, with clearer details of the present invention and the spirit of disclosing.
See also Fig. 1 and Fig. 2, liquid crystal panel embodiment comprises array base palte 1 and colored optical filtering substrates 2.Wherein, array base palte 1 comprises glass substrate 10 and pixel cell 20, and colored optical filtering substrates comprises black matrix" 30 and glass substrate 40.
This array base palte 1 is provided with colored optical filtering substrates 2 at interval, and the surface of glass substrate 10 contiguous colored optical filtering substrates 2 is provided with some pixel cells 20, and pixel cell 20 can be arranged.
See also Fig. 3, Fig. 3 is the schematic cross-section along the AB direction of via hole shown in Figure 2.The formation of the formation of via hole 203 and through hole 202 is carried out synchronously, and the rete on the glass substrate 10 is carried out etching, until etching into glass substrate 10 surfaces.For example, glass substrate 10 surperficial insulation course 1001 and protective seams 1002 are etched via hole 203, be the upper surface of glass substrate 10 at the bottom of the hole of via hole 203.
The embodiment of the invention; The via hole 203 that together forms with through hole 202 is set in pixel cell 20; Through setting up the mode of non-functional via hole 203, be equal to the object of the detecting that has increased EPD pattern etching method, and then can effectively amplify the corresponding detecting change in voltage of detecting data; The feasible forming process that can more accurately monitor through hole reliably, the fabricating quality of assurance through hole.
In addition, the present invention also provides a kind of liquid crystal indicator, and said liquid crystal indicator comprises module backlight (figure does not show) and like the described liquid crystal panel of above-mentioned embodiment, this module backlight is that liquid crystal panel provides light source.
The present invention also provides a kind of method for making embodiment of array base palte, and is as shown in Figure 4, and please combine Fig. 1, Fig. 2 and Fig. 5, and method for making first embodiment of array base palte of the present invention comprises the steps:
Step S401; On glass substrate 10, form thin film transistor (TFT) 200 as pixel cell 20 parts; Pixel cell 20 is formed in the first area of glass substrate 10 100; This first area 100 is corresponding to the minimum cut panel unit of glass substrate 10; Definition has at least two first areas 100 that are provided with at interval on the glass substrate 10, and zone definitions is a second area 101 between the first area 100 on the glass substrate 10, and the neighboring area outside all first areas 100 on the glass substrate 10 is defined as the 3rd zone 102;
Step S402; Adopt EPD pattern etching method on glass substrate 10, to form through hole 202; This through hole 202 is electrically connected the pixel electrode 201 that forms in thin film transistor (TFT) 200 and the subsequent etch processing procedure; In EPD pattern etching process; Simultaneously form via hole 203 at least one zone in first area 100, second area 101 and the 3rd zone 102, and the etchant in the dry ecthing environment of the method for testing of utilizing EPD pattern etching method when forming through hole 202 with via hole 203 and the concentration of product detects, form detecting data; After forming detecting data, change detecting data into detecting voltage.
Particularly, consult Fig. 6, Fig. 6 is the process flow diagram of method for making second embodiment of array base palte of the present invention, and please combine Fig. 1, Fig. 2 and Fig. 5, above-mentionedly can specifically comprise following substep like the described step of Fig. 4:
Step S601 forms the thin film transistor (TFT) 200 as pixel cell 20 parts on glass substrate 10.
This glass substrate 10 comprises: first area 100, second area 101 and the 3rd zone 102.
The pairing liquid crystal panel number of on glass substrate 10, once can making public is one or more.After forming array base palte 1, comprise plurality of pixel cells 20 on the array base palte 1 of corresponding each liquid crystal panel, with the purpose that realizes showing.
Step S602: adopt EPD pattern etching method on pixel electrode 201, to be formed for being electrically connected the through hole 202 of thin film transistor (TFT) 200 and pixel electrode 201, in second area 101, the 3rd zone 102 and pixel cell 20, form via hole 203 simultaneously.
Each pixel cell 20 comprises thin film transistor (TFT) 200, pixel electrode 201 and through hole 202.Thin film transistor (TFT) 200 is as the switch of pixel cell 20, and whether control pixel electrode 201 produces electric field, how to produce electric field.Acting as of through hole 202 is electrically connected thin film transistor (TFT) 200 and pixel electrode 201.In the pixel cell 20 of panel 103, except forming through hole 202, also be formed with via hole 203.Via hole 203 adopts EPD pattern etching method to be formed in the glass substrate 10 with through hole 202 simultaneously.
Simultaneously, in step S602, also comprise: the position that via hole 203 is formed at the black matrix" 30 of corresponding colored optical filtering substrates 2 on the glass substrate 10; In addition, when forming via hole 203, an end setting of these via hole 203 neighborhood pixels electrodes 201.In an application implementation example, this via hole 203 is arranged at the less relatively position of electronic circuit in second area 101 or the 3rd zone 102.
The structure that adopts this method to form can exert an influence with the display quality that prevents 203 pairs of pixel cells 20 of via hole so that black matrix" 30 blocks via hole 203.
The quantity that via hole 203 is provided with in pixel cell 20 is one.Certainly, via hole 203 also can be set to a plurality of according to actual conditions, and the quantity that increases via hole 203 is to improve detecting voltage 300 signals.
The quantity that via hole 203 is provided with at second area 101 can be for a plurality of, and the quantity that increases via hole 203 can improve detecting voltage 300 signals.
Neighboring area outside all first areas 100 of glass substrate 10 forms the 3rd zone 102.The 3rd zone 102 also can be provided with test as required and use electronic circuit, also can via hole 203 be arranged on test with the comparatively sparse place of electronic circuit further, to prevent influence and the destruction of 203 pairs of tests of via hole with circuit.
The quantity that via hole 203 is provided with in the 3rd zone 102 can be for a plurality of, and the quantity that increases via hole 203 can improve detecting voltage 300 signals.
On the other hand, glass substrate 10 can be defined as and comprise the 4th zone and remaining the 5th zone that only has insulation course.The via hole 203 that is provided with in second area 101, the 3rd zone 102 and the pixel cell 20 all is arranged on the 4th zone.To prevent the influence and the destruction of circuit in 203 pairs of liquid crystal panels 103 of via hole and pixel cell 20 display qualities.
In second area 101, the 3rd zone 102 and the pixel cell 20 via hole 203 can be set simultaneously; Also can be in a place in second area 101, the 3rd zone 102 or the first area 100 or any two via hole 203 is set more than the place, to realize improving the purpose of detecting voltage 300 intensity.
When forming via hole 203, the area of each via hole 203 can be all bigger than the area of through hole 202, more effectively to change the concentration of etching agent and resultant of reaction.
When step S603, via hole 203 on forming glass substrate 10, the concentration of etchant and product is detected in the dry ecthing environment of the method for testing of utilizing detecting etching end point pattern when forming through hole 202 with via hole 203, forms detecting data.
Detecting data can reflect the concentration of etchant and product, is beneficial to the process of truer objectively reflection through hole 202 and via hole 203 formation.
Step S604 after forming detecting data, changes detecting data into detecting voltage 300.
Detecting voltage 300 can reflect the process that through hole 202 and via hole 203 form intuitively.
Like Fig. 7 and shown in Figure 8; Fig. 7 is the detecting voltage 300 and dry etching time chart that uses EPD pattern etching method in the prior art; Fig. 8 is the detecting voltage 300 ' and dry etching time chart of use EPD pattern etching method among the array base palte method for making embodiment of the present invention, and please combine Fig. 5.From figure, can see; When in second area 101, the 3rd zone 102 and the pixel cell 20 any one or more than when via hole 203 is set, the intensity of detecting voltage 300 ' signal is far longer than the detecting voltage 300 when via hole not being set in second area 101, the 3rd zone 102 and the pixel.
Be appreciated that; In the manufacturing process of thin film transistor (TFT), because the limited amount of through hole 202, and the area of each through hole 202 is very little; Therefore; Use EPD pattern etching method with detecting data change into reference voltage after voltage variety very little, this voltage can not reflect well in the vacuum dry etching environment that product and reactant concentration change, and cause the fabricating quality of through hole 202 to be difficult to guarantee.The via hole 203 that embodiment of the invention design and through hole 202 are made simultaneously when promptly in second area 101, the 3rd zone 102 and/or pixel cell 20, via hole 203 being set, causes the total number of through hole 202 and via hole 203 to become big.Along with the total number change of through hole 202 and via hole 203 is big, the concentration of the resultant of reaction after etching liquid and etching are accomplished in the process of dry etching also will become big.EPD pattern etching method can be converted into the detecting data of change in concentration detecting voltage 300 ', and then can strengthen detecting the intensity of voltage 300 ', is beneficial to forming process of accurately monitoring through hole 202 reliably directly perceived more.
To sum up; The embodiment of the invention is through being provided with the via hole 203 that together forms with through hole 202 in pixel cell 20; Through setting up the mode of non-functional via hole 203, be equal to the object of the detecting that has increased EPD pattern etching method, and then can effectively amplify the corresponding detecting change in voltage of detecting data; The feasible forming process that can more accurately monitor through hole reliably, the fabricating quality of assurance through hole.
The above is merely embodiments of the invention; Be not so limit claim of the present invention; Every equivalent structure or equivalent flow process conversion that utilizes instructions of the present invention and accompanying drawing content to be done; Or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (10)
1. liquid crystal panel is characterized in that:
Said liquid crystal panel comprises colored optical filtering substrates and the array base palte that is provided with at interval;
The surface of the contiguous colored optical filtering substrates of said array base palte is provided with some pixel cells, and said pixel cell comprises thin film transistor (TFT), pixel electrode and the through hole that is electrically connected thin film transistor (TFT) and pixel electrode;
Wherein, the via hole that at least one and through hole together adopt detecting etching end point pattern etching method to form is set between the said pixel cell or in the pixel cell.
2. liquid crystal panel according to claim 1 is characterized in that:
The surface of the contiguous array base palte of said colored optical filtering substrates is provided with black matrix", and said black matrix" blocks via hole.
3. liquid crystal panel according to claim 1 is characterized in that:
Said array base palte is the array base palte of pixel segmentation homeotropic liquid crystal display, an end setting of said via hole neighborhood pixels electrode.
4. liquid crystal indicator, said liquid crystal indicator comprises liquid crystal panel and module backlight, said module backlight is that liquid crystal panel provides light source, it is characterized in that:
Said liquid crystal panel comprises colored optical filtering substrates and the array base palte that is provided with at interval;
The surface of the contiguous colored optical filtering substrates of said array base palte is provided with some pixel cells, and said pixel cell comprises thin film transistor (TFT), pixel electrode and the through hole that is electrically connected thin film transistor (TFT) and pixel electrode;
Wherein, the via hole that at least one and through hole together adopt detecting etching end point pattern etching method to form is set between the said pixel cell or in the pixel cell.
5. liquid crystal indicator according to claim 4 is characterized in that:
The surface of the contiguous array base palte of said colored optical filtering substrates is provided with black matrix", and said black matrix" blocks via hole.
6. the method for making of an array base palte is characterized in that, comprising:
On glass substrate, form thin film transistor (TFT) as a pixel cell part; Said pixel cell is formed in the first area of glass substrate; Said first area is corresponding to the minimum cut panel unit of glass substrate; Definition has at least two first areas that are provided with at interval on the said glass substrate, and zone definitions is a second area between the first area on the said glass substrate, and the neighboring area outside all first areas on the said glass substrate is defined as the 3rd zone;
Adopt detecting etching end point pattern etching method on said glass substrate, to form through hole; Said through hole is electrically connected formed pixel electrode in thin film transistor (TFT) and the subsequent etch processing procedure; In said detecting etching end point pattern etching process; Form via hole at least one zone in said first area, second area and the 3rd zone simultaneously; And the etchant in the dry ecthing environment of the method for testing of utilizing detecting etching end point pattern when forming through hole with via hole and the concentration of product are detected the formation detecting data; After forming detecting data, change said detecting data into detecting voltage.
7. method according to claim 6 is characterized in that:
The step of said formation via hole comprises: the position that said via hole is formed at the black matrix" of corresponding colored optical filtering substrates on the glass substrate.
8. method according to claim 6 is characterized in that:
The step of said formation via hole comprises: form said via hole, and make an end setting of said via hole neighborhood pixels electrode.
9. method according to claim 6 is characterized in that:
Said via hole is arranged at the less relatively position of electronic circuit in second area or the 3rd zone.
10. method according to claim 6 is characterized in that:
Comprise the 4th zone and remaining the 5th zone that only has insulation course on the said array base palte, said via hole is arranged at the 4th zone.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012101187514A CN102636929A (en) | 2012-04-20 | 2012-04-20 | Liquid crystal display panel, liquid crystal display device and manufacturing method for array substrate |
| PCT/CN2012/075424 WO2013155746A1 (en) | 2012-04-20 | 2012-05-14 | Liquid crystal panel, liquid crystal display device and manufacturing method for array substrate thereof |
| US13/522,293 US8958036B2 (en) | 2012-04-20 | 2012-05-14 | Liquid crystal panel, liquid crystal display device and manufacturing method of array substrate thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012101187514A CN102636929A (en) | 2012-04-20 | 2012-04-20 | Liquid crystal display panel, liquid crystal display device and manufacturing method for array substrate |
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| CN102636929A true CN102636929A (en) | 2012-08-15 |
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| CN2012101187514A Pending CN102636929A (en) | 2012-04-20 | 2012-04-20 | Liquid crystal display panel, liquid crystal display device and manufacturing method for array substrate |
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| WO (1) | WO2013155746A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107123655A (en) * | 2017-06-28 | 2017-09-01 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof and display device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6023319A (en) * | 1997-10-24 | 2000-02-08 | Lg Electronics, Inc. | Method for manufacturing a display device utilizing an etching end point detection part |
| US6496242B1 (en) * | 1999-08-19 | 2002-12-17 | Lg. Philips Lcd Co., Ltd. | Intermediate liquid crystal display device product having an end point detection window, method of fabrication and method of detecting etching end point |
| CN1549059A (en) * | 2003-05-16 | 2004-11-24 | 友达光电股份有限公司 | First yellow light and etching method in liquid crystal display panel front section array manufacturing technology |
| CN1987584A (en) * | 2005-12-23 | 2007-06-27 | Lg.菲利浦Lcd株式会社 | Method of fabricating liquid crystal display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771032A (en) * | 2008-12-31 | 2010-07-07 | 中芯国际集成电路制造(上海)有限公司 | Method for forming through hole structure, semiconductor device, metal interconnection structure and mask plate |
-
2012
- 2012-04-20 CN CN2012101187514A patent/CN102636929A/en active Pending
- 2012-05-14 WO PCT/CN2012/075424 patent/WO2013155746A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6023319A (en) * | 1997-10-24 | 2000-02-08 | Lg Electronics, Inc. | Method for manufacturing a display device utilizing an etching end point detection part |
| US6496242B1 (en) * | 1999-08-19 | 2002-12-17 | Lg. Philips Lcd Co., Ltd. | Intermediate liquid crystal display device product having an end point detection window, method of fabrication and method of detecting etching end point |
| CN1549059A (en) * | 2003-05-16 | 2004-11-24 | 友达光电股份有限公司 | First yellow light and etching method in liquid crystal display panel front section array manufacturing technology |
| CN1987584A (en) * | 2005-12-23 | 2007-06-27 | Lg.菲利浦Lcd株式会社 | Method of fabricating liquid crystal display device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107123655A (en) * | 2017-06-28 | 2017-09-01 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof and display device |
| WO2019000928A1 (en) * | 2017-06-28 | 2019-01-03 | 京东方科技集团股份有限公司 | Array substrate and preparation method therefor, detection method, and display device |
| US11404332B2 (en) | 2017-06-28 | 2022-08-02 | Boe Technology Group Co., Ltd. | Array substrate and fabrication method thereof, and display device |
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| Publication number | Publication date |
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| WO2013155746A1 (en) | 2013-10-24 |
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