CN102633230A - Method for preparing silicon nano-pillar array based on nanosphere etching technology - Google Patents

Method for preparing silicon nano-pillar array based on nanosphere etching technology Download PDF

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Publication number
CN102633230A
CN102633230A CN2012101253323A CN201210125332A CN102633230A CN 102633230 A CN102633230 A CN 102633230A CN 2012101253323 A CN2012101253323 A CN 2012101253323A CN 201210125332 A CN201210125332 A CN 201210125332A CN 102633230 A CN102633230 A CN 102633230A
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etching
silicon
column array
nanosphere
lithographic technique
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李静
岳闯
尹君
臧雅姝
何绪
吴孙桃
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Xiamen University
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Xiamen University
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Abstract

A method for preparing a silicon nano-pillar array based on nanosphere etching technology relates to a Si nano-structure. The method comprises the following steps of: after cleaning a silicon slice, performing activation treatment on the silicon slice by means of a reactive ion etching system, thereby obtaining a silicon slice surface with hydrophilicity; self-assembling single-layer polystyrene nanospheres on a silicon substrate by a spin coating method; regulating and controlling the diameters of the single-layer polystyrene nanospheres by means of the reactive ion etching system, thereby obtaining the single-layer polystyrene nanospheres different in diameter; taking the single-layer polystyrene nanospheres as masks, performing etching by means of the masks and by inductively coupled plasma etching technology, and performing etching and sidewall protection by alternately using SF6 and C4F8; and removing the masks and by-products produced in the etching process by using an organic reagent, thus finally obtaining the silicon nano-pillar array.

Description

A kind of method for preparing the silicon nano column array based on the nanosphere lithographic technique
Technical field
The present invention relates to a kind of Si nanostructured, especially relate to a kind of method for preparing the silicon nano column array based on the nanosphere lithographic technique.
Background technology
At present, to the existing a variety of methods of the preparation of Si nano-pillar/line structure, as utilize metal (like Au etc.) catalytic chemistry vapor phase method (Chemical Vapor Deposition; Be called for short CVD) synthetic from bottom to top Si nano wire (Yi Cui et al, Nano letters 31,35; 2007), the metal catalytic chemical wet etching (Jr-Hau He et al, Langmuir 12855,12858; 2010), dry etching (Shigehito Deki et al; Microelectronic Engineering 355,364,2008) etc. method from top to bottom.Relatively chemical synthesis and wet etching method, the Si nanostructured of dry etching technology preparation have that up rightness is good, depth-to-width ratio is higher, arrangement is orderly, technology characteristics such as maturation comparatively.With regard to dry etching; Generally all adopt ICP or RIE technology; For realizing microelectromechanical systems (Micro-Electro-Mechanical Systems; Being called for short MEMS) related process of device has irreplaceable effect, like the processing of microsensor, resonator and utilize micro mechanical devices such as the silicon turbine that deep reaction ion etching (DRIE) makes, little bearing.
At present, utilize dry etching to prepare the Si nanostructured and have two main problems:
1) selection of mask: to different etching demands, mask material commonly used at present has photoresist, metal nanoparticle etc., and wherein preparing simply, selecting than higher mask is best selection.
2) parameters Optimization: to the requirement of sidewall steepness in the etching structure, i.e. the protective effect of sidewall need have been weighed etching and both effects of protection, like etching gas SF in technical process 6With sidewall protective gas C 4F 8Flow and the isoparametric optimization of etch period, if etching just is prone to form negative tapered sidewall (Negatively tapered sidewall) greater than protective effect, otherwise be prone to form just tapered sidewall (Positively tapered sidewall).Balance is good, and both can make up silicon chip level high-aspect-ratio and up rightness good stable structure.
Solve these two problems and help preparing the nano column array that has good uniformity, also can be applied even more extensively in the actual production simultaneously.At present prepared nanostructured stability have much room for improvement, technology relative complex, large-area preparation difficulty relatively.
Summary of the invention
The object of the present invention is to provide a kind of method for preparing the silicon nano column array based on the nanosphere lithographic technique.
The present invention includes following steps:
1) with after the cleaning of silicon (Si) sheet, utilize reactive ion etching (Reactive Ion Etching is called for short RIE) system that silicon chip is carried out activation processing, obtain the silicon chip surface of possess hydrophilic property;
2) on silicon (Si) substrate, adopt spin-coating method self-assembled monolayer pipe/polyhenylethylene nano ball;
3) utilize the diameter of reactive ion etching system regulation individual layer pipe/polyhenylethylene nano ball, obtain the individual layer pipe/polyhenylethylene nano ball of different-diameter;
4) the individual layer pipe/polyhenylethylene nano ball that step 3) is obtained utilizes mask and inductively coupled plasma (Inductive Coupled Plasma is called for short ICP) lithographic technique to carry out etching as mask, is used alternatingly SF 6And C 4F 8Carry out the protection of etching and sidewall;
5) remove the accessory substance that is produced in mask and the etching process with organic reagent, finally obtain the silicon nano column array.
In step 1), the size of said silicon chip can≤100mm, thickness is 300~500 μ m; The power of said reactive ion etching can be 60~80W; The time of said activation processing can be 3~10min, and the silicon chip surface of the possess hydrophilic property of acquisition helps carrying out the assembling of individual layer polystyrene (polystyrene is called for short PS) nanosphere.
In step 2) in, the spin speed low speed of said employing spin-coating method self-assembled monolayer pipe/polyhenylethylene nano ball is at 200~500rpm, spin coating time 30~60s, 2500~3000rpm at a high speed, spin coating time 30~60s; The diameter of said individual layer pipe/polyhenylethylene nano ball can be 300~500nm.
In step 4), the condition of the protection of said etching and sidewall can be: every etching cycle SF 6Flow can be 40~150sccm/min, the time can be 5~10s; C 4F 8Flow can be 80~150sccm/min, and the time can be 5~15s; The said etching cycle can be 20~80; Ion gun power can be 800~1200W, and substrate bias power can be 15~25W, and chamber pressure can be 5~10mT, and reaction chamber temperature can be 20~25 ℃.
In step 5), said organic reagent is removed the mask process and can be: soak 10h with oxolane earlier, use each ultrasonic cleaning 10min of acetone and alcohol more successively, use deionized water rinsing then, remove the remaining organic solvent in surface, and dry up sample surfaces with nitrogen.
Said reactive ion etching system can adopt two-tube equipment for burning-off photoresist by plasma DQ-500 and inductively coupled plasma etching system can adopt the dark silicon plasma etching machine of the French Alcatel AMS200 of company.
By the steep silicon nano column array of method for preparing, its diameter can be at 20~100nm, and height can be regulated and control between 200nm~5 μ m.Quote individual layer pipe/polyhenylethylene nano ball among the present invention as mask, simplified the preparation process, be easy to larger area preparation simultaneously, obtain at last can be good effect.
The present invention is the nanosphere lithographic technique of mask with organic nano ball (polystyrene spheres), prepares that large tracts of land, high-quality, up rightness are good, the Si nano column array of controllable size.The present invention is through the size (300~500nm) of regulation and control PS bulb diameter; But the larger area of self assembly simultaneously individual layer nanometer PS ball array; Adopt RIE and ICP etching system to prepare the regulatable Si nano column array of depth-to-width ratio as mask it subsequently, manufacturing process is simple relatively, repeatability is good, feasibility is higher.The Si nano column array that has good uniformity may be used in the microdevice, as can be used as the electrode material of miniature lithium ion battery, makes up a kind of battery structure of three-dimensional, helps improving the chemical property such as specific capacity and specific power of battery.Also can utilize simultaneously the transport property of its effect, electricity and calorifics that strengthens light absorption etc., be applied in the devices such as sensor, LED, solar cell.
Description of drawings
Fig. 1 prepares the flow chart of silicon nano column array for the embodiment of the invention.In Fig. 1, (a) the Si substrate is carried out standard cleaning also with RIE system activation processing silicon face; (b) spin coating individual layer nanometer PS ball on substrate Si; (c) utilize the RIE system handles; (d) utilize ICP to carry out the etching preparation; (e) utilize organic solvent removal PS ball and accessory substance to obtain the Si nano column array; The 1-Si substrate; 2-PS ball mask.
Si nano column array SEM (SEM) sectional view that Fig. 2 obtains for the embodiment of the invention.In Fig. 2, scale is 1.00 μ m.
The specific embodiment
Adopt ICP dry etching system, utilize individual layer PS nanosphere to be mask, monocrystalline/polycrystalline silicon chips is a substrate, and reacting gas is O 2, SF 6And C 4F 8
Embodiment 1
1) earlier silicon substrate is adopted standard cleaning, utilize the RIE system under power 60~80W, silicon chip to be carried out the activation processing of 3~10min subsequently, increased the hydrophily of silicon chip surface, help obtaining large tracts of land individual layer PS nanosphere (figure-1a).
In step 1), the size of said silicon chip can≤100mm, thickness is 300~500 μ m; The flow process of said cleaning can be:
(1) the ultrasonic 3~5min of acetone soln, the ultrasonic 3~5min of absolute ethyl alcohol, front and back repeatedly twice, the back is with heat, cold deionized water rinsing;
(2) with HF solution (HF: H 2O) bubble 30s washes away ionized water 15min;
(3) with I washing lotion (NH 4OH: H 2O 2: H 2O), be heated to 85 ℃ to deionized water earlier, pour NH into 4OH and H 2O 2, put into wafer, in beaker, boil 15min, the back dashes 6~7 times with deionized water;
(4) with dilution HF solution (HF: H 2O) bubble 30s is towards hot deionized water 15min;
(5) with II washing lotion (HCl: H 2O 2: H 2O), be heated to 85 ℃ to deionized water earlier, pour HCl and H into 2O 2, put into wafer, in beaker, boil 15min, backlash hot deionized water 15min is towards cold deionized water 5min;
(6) after nitrogen dries up silicon chip, oven dry;
The power of said reactive ion etching can be 60~80W; The time of said activation processing can be 3~10min, and the silicon chip surface of the possess hydrophilic property of acquisition helps carrying out the assembling of individual layer polystyrene (polystyrene is called for short PS) nanosphere.
2) utilize spin-coating method to carry out the self assembly diameter at the individual layer nanometer PS of 300~500nm ball, rotary speed low speed is controlled at 200~500rpm, spin coating time 30~60s, and high speed 2500~3000rpm, spin coating time 30~60s (figure-1b).
3) next step carries out the RIE etching to the complete individual layer nanosphere mask of above-mentioned assembling, control ball diameter in order to the preparation different-diameter the silicon nano column array (figure-1c).RIE power is at 60~80W, etch period 0~120s.
4) utilize subsequently the ICP lithographic technique carry out the Si nano-pillar preparation (figure-1d), its etching gas SF 6Flow 40~150sccm/min, time 5~10s, sidewall protective gas C 4F 8Flow 80~150sccm/min, time 5~15s.20~80 of cycles.Ion gun power 800~1200W, substrate bias power 15~25W, chamber pressure 5~10mT, 20~25 ℃ of reaction chamber temperatures.SF wherein 6As etching gas, C 4F 8As the protective gas of sidewall, the key reaction formula is following:
(1)SF 6+e -→S xF y+S xF y *+F *+e -
Si+F *→Si-nF
Si-nF→Si-F x(ads)
Si-F x(ads)→Si-F x(gas)
(2)C 4F 8→(C xF y) n
(5) utilize the certain accessory substance that is produced in organic reagent removal PS nanosphere mask and the etching process at last, so just obtained final Si nano column array (referring to Fig. 1 e and Fig. 2).Detailed process is used each ultrasonic cleaning 10min of acetone and alcohol more successively for soaking 10h with oxolane earlier, uses the deionized water rinsing surface then, removes remaining organic solvent, and dries up sample surfaces with nitrogen.
Embodiment 2
At first that standard cleaning is good silicon chip (size: be activation 5min under the RIE system of 80W 50mm) at power; Carry out self-assembled monolayer PS nanosphere (diameter 330nm) then, rotary speed low speed is controlled at 500rpm, spin coating time 30s; High speed 2500rpm, spin coating time 40s.Be that to put into power be that the RIE system of 80W carries out etching 30s for the Si sheet of mask with the above-mentioned individual layer PS nanosphere that has subsequently.Next step sample after with above-mentioned processing is put into the ICP system and is carried out etching processing, its etching gas SF 6Flow 50sccm/min, time 7s, sidewall protective gas C 4F 8Flow 100sccm/min, time 5s.40 of cycles.Ion gun power 1000W, substrate bias power 20W, chamber pressure 6mT, 20 ℃ of reaction chamber temperatures.At last the sample after the above-mentioned etching is soaked 10h with oxolane earlier, use each ultrasonic cleaning 10min of acetone and alcohol more successively, use the deionized water rinsing surface then, remove remaining organic solvent, and dry up sample surfaces with nitrogen.So just, obtained final Si nano column array.

Claims (8)

1. one kind prepares the method for silicon nano column array based on the nanosphere lithographic technique, it is characterized in that may further comprise the steps:
1) with after the silicon chip cleaning, utilizes the reactive ion etching system that silicon chip is carried out activation processing, obtain the silicon chip surface of possess hydrophilic property;
2) on silicon substrate, adopt spin-coating method self-assembled monolayer pipe/polyhenylethylene nano ball;
3) utilize the diameter of reactive ion etching system regulation individual layer pipe/polyhenylethylene nano ball, obtain the individual layer pipe/polyhenylethylene nano ball of different-diameter;
4) the individual layer pipe/polyhenylethylene nano ball that step 3) is obtained utilizes mask and inductively coupled plasma lithographic technique to carry out etching as mask, is used alternatingly SF 6And C 4F 8Carry out the protection of etching and sidewall;
5) remove the accessory substance that is produced in mask and the etching process with organic reagent, finally obtain the silicon nano column array.
2. as claimed in claim 1ly a kind ofly prepare the method for silicon nano column array, it is characterized in that in step 1) the size≤100mm of said silicon chip, thickness are 300~500 μ m based on the nanosphere lithographic technique.
3. as claimed in claim 1ly a kind ofly prepare the method for silicon nano column array, it is characterized in that in step 1) the power of said reactive ion etching is 60~80W based on the nanosphere lithographic technique.
4. as claimed in claim 1ly a kind ofly prepare the method for silicon nano column array, it is characterized in that in step 1) the time of said activation processing is 3~10min based on the nanosphere lithographic technique.
5. a kind of method for preparing the silicon nano column array based on the nanosphere lithographic technique as claimed in claim 1; It is characterized in that in step 2) in; The spin speed low speed of said employing spin-coating method self-assembled monolayer pipe/polyhenylethylene nano ball is at 200~500rpm; Spin coating time 30~60s, high speed 2500~3000rpm, spin coating time 30~60s.
6. as claimed in claim 1ly a kind ofly prepare the method for silicon nano column array, it is characterized in that in step 2 based on the nanosphere lithographic technique) in, the diameter of said individual layer pipe/polyhenylethylene nano ball is 300~500nm.
7. as claimed in claim 1ly a kind ofly prepare the method for silicon nano column array, it is characterized in that in step 4) the condition of the protection of said etching and sidewall is: every etching cycle SF based on the nanosphere lithographic technique 6Flow be 40~150sccm/min, the time is 5~10s; C 4F 8Flow is 80~150sccm/min, and the time is 5~15s; The said etching cycle is 20~80; Ion gun power is 800~1200W, and substrate bias power is 15~25W, and chamber pressure is 5~10mT, and reaction chamber temperature is 20~25 ℃.
8. a kind of method for preparing the silicon nano column array based on the nanosphere lithographic technique as claimed in claim 1; It is characterized in that in step 5); Said organic reagent is removed the mask process: soak 10h with oxolane earlier, use each ultrasonic cleaning 10min of acetone and alcohol more successively, use deionized water rinsing then; Remove the remaining organic solvent in surface, and dry up sample surfaces with nitrogen.
CN2012101253323A 2012-04-26 2012-04-26 Method for preparing silicon nano-pillar array based on nanosphere etching technology Pending CN102633230A (en)

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CN109648096A (en) * 2019-01-09 2019-04-19 中国科学院合肥物质科学研究院 A kind of any nano-cone array converted in-situ is the method for the micro/nano structure array that Nano silver piece is constructed
CN110964221A (en) * 2019-11-05 2020-04-07 嘉兴学院 Bar code nanorod with segment thickness code and preparation method thereof
CN110964221B (en) * 2019-11-05 2021-07-30 嘉兴学院 Bar code nanorod with segment thickness code and preparation method thereof
CN113125406B (en) * 2019-12-31 2023-06-06 有研工程技术研究院有限公司 SERS substrate with microscopic ordered nano structure and preparation method thereof
CN113125405B (en) * 2019-12-31 2023-06-06 有研工程技术研究院有限公司 SERS substrate based on nano conical needle structure and preparation method
CN113125405A (en) * 2019-12-31 2021-07-16 有研工程技术研究院有限公司 SERS substrate based on nano conical needle structure and preparation method
CN113125406A (en) * 2019-12-31 2021-07-16 有研工程技术研究院有限公司 SERS substrate with microscopic ordered nano structure and preparation method
CN111312592B (en) * 2020-02-25 2021-06-18 南京大学 Preparation method of three-dimensional self-changing growth stacked nanowire channel and spring structure
CN111312592A (en) * 2020-02-25 2020-06-19 南京大学 Preparation method of three-dimensional self-changing growth stacked nanowire channel and spring structure
CN112251541A (en) * 2020-10-21 2021-01-22 南京大学 Accurate virus capturing and extracting method based on silicon nano spiral structure
CN114988349A (en) * 2022-01-12 2022-09-02 长春理工大学 Anti-reflection micro-nano structure surface with protective structure and preparation method thereof
CN117156941A (en) * 2023-11-01 2023-12-01 无锡芯感智半导体有限公司 Manufacturing method of flow chip with hexagonal close-packed micropore solid substrate structure
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Application publication date: 20120815