CN102594743B - Adpative equalizing circuit and method thereof - Google Patents
Adpative equalizing circuit and method thereof Download PDFInfo
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Abstract
A kind of Adpative equalizing circuit, is suitable for the signal of compensation one channel transfer.Adpative equalizing circuit comprises a signal gain unit, an amplifying unit and an adaptive control loop.Signal gain unit receives described signal, adjusts the gain to described signal, and exports the described signal after adjustment.Amplifying unit couples signal gain unit, amplifies and exports described signal to next stage circuit.Adaptive control loop couples signal gain unit, the ratio of the maxima and minima of the package of detection signal, and export an adjustment signal, change maximum or minimum value by the yield value of this signal gain unit of adjustment by this, make the ratio of maximum and minimum value be not less than a particular value.In addition, a kind of adaptive equilibrium method is also suggested.
Description
Technical field
The invention relates to a kind of equalizing circuit and method thereof, and relate to a kind of Adpative equalizing circuit (adaptive equalizer) and method thereof especially.
Background technology
Generally speaking, for the signal of high-speed transfer, after passage (channel), signal strength signal intensity may decay, so that cause, signal strength signal intensity is too little, noise disturbance (jitter) is too large, and then transmission result can cause the error rate to increase, and affects communication quality.Namely Fig. 1 illustrates transmitted waveform and the eye pattern (eye diagram) thereof of signal each several part in electronic system.Please refer to Fig. 1, signal S1 is after strengthening through the driver 110 of electronic system 100 transmitting terminal, and admission passage 130 transmits, and before admission passage transmission, the eye pattern exported by driver 110 can find, now signal S1 has good signal quality.But after channel transfer, namely signal S1 creates decay at the output of passage 130, as shown in the eye pattern that passage 130 exports, its signal quality is deteriorated because of decay and noise disturbance.
For solving the problem, modal mode is such as configure a continuous time linear equalizer 120 (Continuous time linear equalizer, CTLE) at the receiving terminal of electronic system 100.Equalizer 120 can improve the high-frequency gain (high frequency boosting) of signal S1, with compensation channels loss (channel loss), and promotion signal quality.The eye pattern exported by equalizer 120 can find, the signal S1 that the signal S1 after compensating and driver 110 export has approximate good quality.
But for practical application, pass loss on-fixed, known compensation way must have adaptive control (adaptive control) device whether to reach optimization to detect high frequency compensation.And the practicality of existing many frameworks to adaptive control has many restrictions, such as circuit framework is too complicated, the transmission speed of GB per second (Gbps) realizes the not high restriction of compensation accuracy of difficulty or volume production.
Summary of the invention
The invention provides a kind of Adpative equalizing circuit, there is easy circuit framework, can effective compensation pass loss.
The invention provides a kind of adaptive equilibrium method, be at least suitable for above-mentioned Adpative equalizing circuit, can effective compensation pass loss.
The invention provides a kind of Adpative equalizing circuit, be suitable for the signal of compensation one channel transfer.Adpative equalizing circuit comprises a signal gain unit (signal booster), an amplifying unit and an adaptive control loop (adaptive control loop).Signal gain unit receives described signal, adjusts the gain to described signal, and exports the described signal after adjustment.Amplifying unit couples signal gain unit, amplifies and exports described signal to next stage circuit.Adaptive control loop couples signal gain unit, the ratio of the maxima and minima of the package of detection signal, and export an adjustment signal, change maximum or minimum value by the yield value of this signal gain unit of adjustment by this, make the ratio of maximum and minimum value be not less than a particular value.
In one embodiment of this invention, above-mentioned adaptive control loop comprises one first comparing unit.First comparing unit couples signal gain unit, receives described signal, carries out rectification to described signal, and the voltage peak compared through the signal of rectification and a stored voltage.First comparing unit exports the stored voltage corresponding to voltage peak according to comparative result.
In one embodiment of this invention, above-mentioned adaptive control loop also comprises one second comparing unit.Second comparing unit couples the first comparing unit, and adjustment corresponds to the stored voltage of voltage peak, and compares the stored voltage after adjustment and voltage peak, to export a control signal, and adjusts the yield value of signal gain unit by this.
In one embodiment of this invention, above-mentioned adaptive control loop also comprises an electrical level control unit.Electrical level control unit couples the second comparing unit, exports adjustment signal to signal gain unit, to adjust the yield value of signal gain unit according to control signal.
In one embodiment of this invention, if the stored voltage after adjustment is more than or equal to voltage peak, electrical level control unit increases the figure place of adjustment signal.
In one embodiment of this invention, if the stored voltage after adjustment is less than voltage peak, electrical level control unit stops the figure place increasing adjustment signal.
In one embodiment of this invention, when the figure place adjusting signal increases, signal gain unit improves the high-frequency gain of signal.
In one embodiment of this invention, when the high-frequency gain of signal improves, adaptive control loop adjustment minimum value, makes the ratio of maximum and minimum value be not less than particular value.
In one embodiment of this invention, when the figure place adjusting signal increases, signal gain unit reduces the low-frequency gain of signal.
In one embodiment of this invention, when the low-frequency gain of signal reduces, adaptive control loop adjustment maximum, makes the ratio of maximum and minimum value be not less than particular value.
In one embodiment of this invention, the first above-mentioned comparing unit comprises a rectifier, one first comparator and a voltage storage unit.Rectifier couples signal gain unit, receives described signal, carries out rectification to described signal, and exports the voltage peak through the signal of rectification.First comparator has a first input end, one second input and an output.The first input end of the first comparator couples rectifier, to receive the voltage peak of the signal through rectification.Second input of the first comparator receives stored voltage.First comparator compares voltage peak through the signal of rectification and stored voltage, to export a comparison signal.Voltage storage unit couples the second input and the output of the first comparator, and receive comparison signal, and provide stored voltage to the first comparator and the second comparing unit, wherein stored voltage is size-controlled in comparison signal.
In one embodiment of this invention, the second above-mentioned comparing unit comprises an arithmetic element and one second comparator.Arithmetic element couples voltage storage unit, and adjustment corresponds to the stored voltage of voltage peak.Second comparator has a first input end, one second input and an output.The first input end of the second comparator couples rectifier, to receive the voltage peak of the signal through rectification.Second input of the second comparator couples arithmetic element, to receive the stored voltage after adjustment.Second comparator compares the stored voltage after adjustment and voltage peak, to export control signal.
In one embodiment of this invention, above-mentioned voltage storage unit comprises a current source, a switch element and an electric capacity.Current source provides a charging current.Switch element couples the output of current source and the first comparator, opens or close according to comparison signal.Electric capacity has a first end and one second end.The first end of electric capacity couples the second input of switch element and the first comparator, to provide stored voltage to the first comparator.Second end ground connection of electric capacity.
In one embodiment of this invention, when the voltage peak of the signal through rectification is greater than stored voltage, the first comparator exports the comparison signal of high level, with opening switch element, makes current source to capacitor charging.
In one embodiment of this invention, when the voltage peak of the signal through rectification is less than or equal to stored voltage, the comparison signal of the first comparator output low level, with closing switch element.
In one embodiment of this invention, when the voltage peak of the signal through rectification is less than or equal to stored voltage, electric capacity provides stored voltage to the second comparing unit corresponding to voltage peak.
The invention provides a kind of adaptive equilibrium method, be suitable for the signal of compensation one channel transfer.Adaptive equilibrium method comprises: receive described signal, adjusts the gain to signal, and exports the signal after adjustment; Amplify and export described signal to next stage circuit; And the maxima and minima of the package of detection signal, and by adjustment, maximum or minimum value are changed to the yield value of signal, make the ratio of maximum and minimum value be not less than a particular value.
In one embodiment of this invention, the step of the maxima and minima of the package of above-mentioned detection signal comprises: receive described signal, carries out rectification to signal; Relatively through voltage peak and a stored voltage of the signal of rectification; And the stored voltage corresponding to voltage peak is exported according to comparative result.
In one embodiment of this invention, above-mentioned adjustment maximum or the step of minimum value comprise: adjustment corresponds to the stored voltage of voltage peak; And compare the stored voltage after adjustment and voltage peak, to export a control signal.
In one embodiment of this invention, above-mentioned adjustment maximum or the step of minimum value also comprise: export an adjustment signal to signal gain unit, to adjust the yield value of signal gain unit according to control signal.
In one embodiment of this invention, if the stored voltage after adjustment is more than or equal to voltage peak, the figure place of adjustment signal is increased.
In one embodiment of this invention, if the stored voltage after adjustment is less than voltage peak, stop the figure place increasing adjustment signal.
In one embodiment of this invention, when the figure place adjusting signal increases, the high-frequency gain of signal is improved.
In one embodiment of this invention, when the high-frequency gain of signal improves, adjustment minimum value, makes the ratio of maximum and minimum value be not less than particular value.
In one embodiment of this invention, when the figure place adjusting signal increases, the low-frequency gain of signal is reduced.
In one embodiment of this invention, when the low-frequency gain of signal reduces, adjustment maximum, makes the ratio of maximum and minimum value be not less than particular value.
Based on above-mentioned, in exemplary embodiment of the present invention, Adpative equalizing circuit has easy circuit framework, by its equalization methods, do not need to utilize complicated circuit, any data pattern (data pattern) all can use, and does not need to detect its pattern in advance, can effective compensation pass loss.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.
Accompanying drawing explanation
Fig. 1 illustrates transmitted waveform and the eye pattern thereof of signal each several part in electronic system.
Fig. 2 A is the block schematic diagram of the Adpative equalizing circuit of one embodiment of the invention.
Fig. 2 B is the circuit diagram in the adaptive control loop of Fig. 2 A.
Fig. 3 is the package oscillogram of the signal S2 ' of Fig. 2 A and Fig. 2 B.
Fig. 4 is the eye pattern of respective signal S2 '.
Fig. 5 is the flow chart of steps of the adaptive equilibrium method of one embodiment of the invention.
[main element label declaration]
100: electronic system 110: driver
120: equalizer 130: passage
200: Adpative equalizing circuit 210: signal gain unit
220: amplifying unit 230: adaptive control loop
232: the first comparing unit 234: the second comparing units
236: electrical level control unit 231: rectifier
233: the first comparators 235: voltage storage unit
237: arithmetic element 239: the second comparator
Is: current source Cp: electric capacity
T: switch element EQ_bits: adjustment signal
Vm: the signal Vopa1 after computing: comparison signal
Vopa2: control signal Va: stored voltage
Vpeak: voltage peak Veq: the signal that high-frequency gain is enhanced
Min: the minimum value max of signal package: the maximum of signal package
S1: the signal S2 of input electric subsystem: the signal of input adaptive equalizing circuit
S2 ': the signal of output adaptive equalizing circuit
S500, S502, S504: the step of adaptive equilibrium method
Embodiment
Fig. 2 A is the block schematic diagram of the Adpative equalizing circuit of one embodiment of the invention.Please refer to Fig. 2 A.In this exemplary embodiment, Adpative equalizing circuit 200 is suitable for the signal S2 of compensation one channel transfer.Adpative equalizing circuit 200 comprises signal gain unit 210, amplifying unit 220 and an adaptive control loop 230.
Specifically, Fig. 2 B is an exemplary embodiment of the circuit in the adaptive control loop of Fig. 2 A.Please refer to Fig. 2 B.In this exemplary embodiment, signal gain unit 210 such as has postiive gain, in order to receive through the signal S2 of channel transfer, to improve the high-frequency gain to signal S2, and export signal Veq that high-frequency gain is enhanced to amplifying unit 220 and adaptive control loop 230.Amplifying unit 220 couples signal gain unit 210, in order to be amplified by signal Veq, and exports the signal S2 ' after amplifying to next stage circuit.Adaptive control loop 230 couples signal gain unit 210, in order to the maxima and minima of the package of detection signal S2, and export an adjustment signal EQ_bits, change its maximum or minimum value by the yield value of adjustment signal gain unit 210 by this, make the ratio of maximum and minimum value be not less than a particular value.At this, amplifying unit 220 is such as a limiting amplifier, but the present invention is not limited to this.
Fig. 3 is the package oscillogram of the signal S2 ' of Fig. 2 A and Fig. 2 B.Fig. 4 is the eye pattern of respective signal S2 '.Please refer to Fig. 2 B to Fig. 4.Through the signal S2 ' that the Adpative equalizing circuit 200 of this exemplary embodiment compensates, the maximum max of its signal package and the ratio of minimum value min are more than or equal to particular value, to make the eye pattern of respective signal S2 ' can person as shown in Figure 4, present good signal quality.At this, signal S2 ' is such as the random data of one harmless (loss less).Therefore, after the maximum max of detection signal S2 package and the ratio of minimum value min, if this ratio is less than this particular value, then adaptive control loop 230 is by this ratio of adjustment, makes it be more than or equal to this particular value, to reach the object of compensating signal S2.
Specifically, the adaptive control loop of this exemplary embodiment comprises one first comparing unit 232,1 second comparing unit 234 and an electrical level control unit 236.First comparing unit 232 couples signal gain unit 210, in order to Received signal strength Veq, to carry out rectification to it, and the voltage peak Vpeak compared through the signal of a rectification and stored voltage Va.And then the first comparing unit 232 exports the stored voltage Va corresponding to voltage peak Vpeak according to this comparative result.Second comparing unit 234 couples the first comparing unit 232, the stored voltage Va of voltage peak Vpeak is corresponded in order to adjustment, and obtain voltage signal Vm, and compare the stored voltage after adjustment (i.e. voltage signal Vm) and voltage peak Vpeak, to export a control signal Vopa2.Electrical level control unit 236 couples the second comparing unit 234, exports adjustment signal EQ_bits to signal gain unit 210, to adjust the high-frequency content (high frequency content) of signal S2 according to control signal Vopa2.
Specifically, in this exemplary embodiment, the first comparing unit 232 comprises rectifier 231,1 first comparator 233 and a voltage storage unit 235.Rectifier 231 couples signal gain unit 210, in order to Received signal strength Veq, carries out rectification to signal Veq, and exports the voltage peak Vpeak through the signal of rectification, as shown in Figure 3.In figure 3, thick black signal is the signal processed through rectifier 231, and voltage peak Vpeak then corresponds to the maximum max place of signal package.In other words, by the effect of rectifier 231, the voltage peak Vpeak corresponding to the maximum max of signal package can be found, and export the first comparator 233 to and compare.
First comparator 233 has a first input end, one second input and an output.At this, first input end and the second input are such as non-backward end and backward end respectively, but the present invention is not limited thereto.The first input end (+) of the first comparator 233 couples rectifier 231, to receive the voltage peak Vpeak of the signal through rectification.Second input (-) of the first comparator 233 receives stored voltage Va.And then the first comparator 233 compares voltage peak Vpeak through the signal of rectification and stored voltage Va, to export a comparison signal Vopa1.
Voltage storage unit 235 couples the second input (-) and output of the first comparator 233, in order to receive comparison signal Vopa1, and stored voltage Va to the first comparator 233 and the second comparing unit 234 are provided, wherein stored voltage Va's is size-controlled in comparison signal Vopa1.In this exemplary embodiment, voltage storage unit 235 comprises a current source Is, a switch element T and an electric capacity Cp.Current source Is, in order to provide a charging current, when switch element T conducting, charges to electric capacity Cp.Switch element T couples the output of current source Is and the first comparator 233, and is controlled by comparison signal Vopa1, with the height according to comparison signal Vopa1 level, and opens or closes.One end A of electric capacity Cp couples the second input (-) of switch element T and the first comparator 233, to provide stored voltage Va to the first comparator 233, and the other end ground connection of electric capacity Cp.In this exemplary embodiment, current source Is is such as the active mode current source realized with current mirror, and switch element T is such as a nmos transistor switch.
Therefore, when voltage peak Vpeak is greater than stored voltage Va, the first comparator 233 exports the comparison signal Vopa1 of high level, with opening switch elements T, current source Is can be charged to electric capacity Cp, improves stored voltage Va.Through after a period of time, stored voltage Va continues to rise.Therefore, when voltage peak Vpeak is less than or equal to stored voltage Va, the comparison signal Vopa1 of the first comparator 233 output low level, with closing switch elements T.Now node A institute keeper, the i.e. size of voltage peak Vpeak.In other words, when voltage peak Vpeak is less than or equal to stored voltage Va, it is the stored voltage Va corresponding to voltage peak Vpeak that electric capacity Cp is provided to the second comparing unit.
It should be noted, in this exemplary embodiment, the kind of the input of the first comparator 233 and the relation that couples of output, switch element T and the execution mode of current source Is only in order to illustrate, not in order to limit the present invention.
From the operation of above-mentioned first comparing unit 232, its object is to the maximum max of detection signal package.That is, signal S2 is after entering signal gain unit 210, and the signal of a part can export rectifier 231 to, and the size of the first comparator 233 meeting comparative voltage peak value Vpeak and stored voltage Va, charge to voltage peak Vpeak to make stored voltage Va.
On the other hand, the second comparing unit 234 comprises arithmetic element 237 and one second comparator 239.Arithmetic element 237 couples voltage storage unit 235, and correspond to the stored voltage Va of voltage peak Vpeak in order to adjustment, it can carry out one to voltage peak Vpeak is such as the computing of taking advantage of or removing.At this, voltage peak Vpeak takes advantage of one to be less than the value of 1 and reduces it by arithmetic element 237.Therefore, arithmetic element 237, except available multiplier is implemented, also can be implemented with divider.Then, arithmetic element 237 exports signal Vm to the second comparator 239 after computing.
Second comparator 239 has a first input end, one second input and an output.At this, first input end and the second input are such as non-backward end and backward end respectively, but the present invention is not limited thereto.The first input end (+) of the second comparator 239 couples rectifier 231, to receive the voltage peak Vpeak of the signal through rectification.Second input (-) of the second comparator 239 couples arithmetic element 237, to receive the signal Vm after computing.Second comparator 239 compares the stored voltage after adjustment and voltage peak (the signal Vm namely after computing), to export control signal Vopa2 to electrical level control unit 236.Therefore, if the signal Vm after adjustment is more than or equal to voltage peak Vpeak, electrical level control unit 236 increases the figure place of adjustment signal EQ_bits, and to adjust the yield value of signal gain unit 210, its method is the place value of a buffer in adjustment signal gain unit.On the contrary, if the signal Vm after adjustment is less than voltage peak Vpeak, electrical level control unit 236 stops increasing adjustment signal EQ_bits.
In other words, in this exemplary embodiment, when the figure place adjusting signal EQ_bits increases, signal gain unit 210 improves the high-frequency gain of signal S2, and adjust the minimum value min of its signal package, be not less than particular value to make the ratio of its maximum max and minimum value min.The high-frequency content of signal S2 will be increased because adjustment signal EQ_bits is higher, improve the minimum value min of signal S2 package, if when therefore the maximum max of signal S2 package and the ratio of minimum value min are less than particular value, then adaptive control loop 230 have adjusted minimum value min by electrical level control unit 236, thus have adjusted the ratio of maxima and minima jointly, it is made to be more than or equal to this particular value, to reach the object of compensating signal S2.
From the operation of above-mentioned second comparing unit 234 and electrical level control unit 236, its object is judging whether the minimum value min of signal S2 package reaches optimization.That is, when voltage peak Vpeak is less than or equal to stored voltage Va, electric capacity Cp stops charging, and stored voltage Va no longer rises.Then, after stored voltage Va is multiplied by a particular power, signal Vm is adjusted to.Then, the size of signal Vm of the second comparator 239 again after comparative voltage peak value Vpeak and adjustment, with the operation of control level control unit 236, selects to increase or stop to increase adjustment signal EQ_bits.
Therefore in this exemplary embodiment, Adpative equalizing circuit 200 has the easy characteristic of circuit framework, and 230, adaptive control loop need utilize a rectifier and comparator to carry out interpretation signal level.
In this exemplary embodiment, signal gain unit 210 such as has postiive gain, and in order to receive the signal S2 through channel transfer, to improve its high-frequency gain, but the present invention is not limited to this.
In another exemplary embodiment, signal gain unit such as also can have negative gain, in order to receive the signal S2 through channel transfer, to reduce its low-frequency gain.In other words, when the figure place adjusting signal EQ_bits increases, signal gain unit 210 reduces the low-frequency gain of signal S2, and adjusts the maximum max of its signal package, is not less than particular value to make the ratio of its maximum max and minimum value min.Therefore, if when the maximum max of signal S2 package and the ratio of minimum value min are less than particular value, then adaptive control loop 230 adjusts maximum max by electrical level control unit 236, thus have adjusted the ratio of maximum max and minimum value min jointly, it is made to be more than or equal to this particular value, to reach the object of compensating signal S2.
In this exemplary embodiment, Adpative equalizing circuit 200 also can be the execution mode of a hybrid-type equalizing circuit, that is has the function increasing high-frequency gain and reduce low-frequency gain.Specifically, signal gain unit 210 sectional of this exemplary embodiment changes yield value, and now adjustment signal EQ_bit is divided into several sections by electrical level control unit 236.For example, if adjustment signal EQ_bit has 12 positions, can be divided into four sections, each section has 3 positions, and positive and negative gain intersegmentally to change in turn each.Such as, first and third section is postiive gain; The second, four sections are negative gain.Electrical level control unit 236 when receiving a positive control signal each time, then increases signal gain unit 210 1.It is worth mentioning that, the relation of each element of this exemplary embodiment is interdependent each other, and therefore electrical level control unit 236 is when receiving a positive control signal each time, then increase signal gain unit 210 1, to increase high-frequency gain value.Similarly, electrical level control unit 236 when receiving a negative control signal each time, then increases signal gain unit 210 1, to reduce low-frequency gain value.
Fig. 5 is the flow chart of steps of the adaptive equilibrium method of one embodiment of the invention.Please refer to Fig. 2 A to Fig. 5, the adaptive equilibrium method of this exemplary embodiment comprises the steps.
First, in step S500, signal gain unit 210 Received signal strength S2, adjusts the gain to signal S2, and exports the signal Veq after adjustment.Then, in step S502, the maximum max of the package of adaptive control loop 230 detection signal S2 and minimum value min, and by adjustment, its maximum max or minimum value min is changed to the yield value of signal S2, make the ratio of maximum max and minimum value min be not less than a particular value.It should be noted that in step S500, signal gain unit 210 can be selected the high-frequency gain of increase signal S2 or reduces its low-frequency gain by design requirement.Therefore the Gain tuning of respective signal gain unit 210, in step S502, adaptive control loop 230 adjustable maximum max or minimum value min, makes both ratio be not less than a particular value.Afterwards, in step S504, amplifying unit 220 amplifies and outputs signal S2 ' to next stage circuit.
In addition, the adaptive equilibrium method of this exemplary embodiment can obtain enough teachings, suggestion and implementation by the describing of the exemplary embodiment of Fig. 2 A ~ Fig. 5, and therefore repeats no more.
In sum, in exemplary embodiment of the present invention, Adpative equalizing circuit has easy circuit framework, and by its equalization methods, do not need to utilize complicated circuit, any data pattern all can use, and does not need to detect its pattern in advance, can effective compensation pass loss.
Although the present invention discloses as above with embodiment; so itself and be not used to limit the present invention; have in any art and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the appended right person of defining.
Claims (26)
1. an Adpative equalizing circuit, for compensating the signal of a channel transfer, this Adpative equalizing circuit comprises:
One signal gain unit, receives this signal, adjusts the gain to this signal, and exports this signal after adjustment;
One amplifying unit, couples this signal gain unit, amplifies and exports described signal to next stage circuit; And
One adaptive control loop, couple this signal gain unit, detect the maxima and minima of the voltage of the package of this signal, and export an adjustment signal, change this maximum or this minimum value by the yield value of this signal gain unit of adjustment by this, make the ratio of this maximum and this minimum value be not less than a particular value.
2. Adpative equalizing circuit according to claim 1, wherein this adaptive control loop comprises:
One first comparing unit, couples this signal gain unit, receives this signal, carry out rectification to this signal, compares the voltage peak through this signal of rectification and a stored voltage, and exports this stored voltage corresponding to this voltage peak according to this comparative result.
3. Adpative equalizing circuit according to claim 2, wherein this adaptive control loop also comprises:
One second comparing unit, couples this first comparing unit, and adjustment corresponds to this stored voltage of this voltage peak, and compares this stored voltage after adjustment and this voltage peak, to export a control signal, and adjusts the yield value of this signal gain unit by this.
4. Adpative equalizing circuit according to claim 3, wherein this adaptive control loop also comprises:
One electrical level control unit, couples this second comparing unit, exports this adjustment signal to this signal gain unit, to adjust the yield value of this signal gain unit according to this control signal.
5. Adpative equalizing circuit according to claim 4, if this stored voltage after wherein adjusting is more than or equal to this voltage peak, this electrical level control unit increases the figure place of this adjustment signal.
6. Adpative equalizing circuit according to claim 5, if this stored voltage after wherein adjusting is less than this voltage peak, this electrical level control unit stops the figure place increasing this adjustment signal.
7. Adpative equalizing circuit according to claim 5, wherein when the figure place of this adjustment signal increases, this signal gain unit improves the high-frequency gain of this signal.
8. Adpative equalizing circuit according to claim 7, wherein when the high-frequency gain of this signal improves, this adaptive control loop adjusts this minimum value, makes the ratio of this maximum and this minimum value be not less than this particular value.
9. Adpative equalizing circuit according to claim 5, wherein when the figure place of this adjustment signal increases, this signal gain unit reduces the low-frequency gain of this signal.
10. Adpative equalizing circuit according to claim 9, wherein when the low-frequency gain of this signal reduces, this adaptive control loop adjusts this maximum, makes the ratio of this maximum and this minimum value be not less than this particular value.
11. Adpative equalizing circuits according to claim 3, wherein this first comparing unit comprises:
One rectifier, couples this signal gain unit, receives this signal, carry out rectification to this signal, and exports the voltage peak through this signal of rectification;
One first comparator, there is a first input end, one second input and an output, this first input end couples this rectifier, to receive the voltage peak through this signal of rectification, this second input receives this stored voltage, this first comparator compares voltage peak through this signal of rectification and this stored voltage, to export a comparison signal; And
One voltage storage unit, couples this second input and this output of this first comparator, receives this comparison signal, and provides this stored voltage to this first comparator and this second comparing unit, and wherein this stored voltage is size-controlled in this comparison signal.
12. Adpative equalizing circuits according to claim 11, wherein this second comparing unit comprises:
One arithmetic element, couples this voltage storage unit, and adjustment corresponds to this stored voltage of this voltage peak; And
One second comparator, there is a first input end, one second input and an output, this first input end couples this rectifier, to receive the voltage peak through this signal of rectification, this second input couples this arithmetic element, to receive this stored voltage after adjustment, this second comparator compares this stored voltage after adjustment and this voltage peak, to export this control signal.
13. Adpative equalizing circuits according to claim 11, wherein this voltage storage unit comprises:
One current source, provides a charging current;
One switch element, couples this output of this current source and this first comparator, opens or close according to this comparison signal; And
One electric capacity, has a first end and one second end, and this first end couples this second input of this switch element and this first comparator, to provide this stored voltage to this first comparator, and this second end ground connection of this electric capacity.
14. Adpative equalizing circuits according to claim 13, wherein when the voltage peak of this signal through rectification is greater than this stored voltage, this first comparator exports this comparison signal of high level, to open this switch element, makes this current source to this capacitor charging.
15. Adpative equalizing circuits according to claim 14, wherein when the voltage peak of this signal through rectification is less than or equal to this stored voltage, this comparison signal of this first comparator output low level, to close this switch element.
16. Adpative equalizing circuits according to claim 15, wherein when the voltage peak of this signal through rectification is less than or equal to this stored voltage, this electric capacity provides this stored voltage corresponding to this voltage peak to this second comparing unit.
17. 1 kinds of adaptive equilibrium methods, for compensating the signal of a channel transfer, this adaptive equilibrium method comprises:
Receive this signal, adjust the gain to this signal, and export this signal after adjustment;
Amplify and export described signal to next stage circuit; And
Detect the maxima and minima of the voltage of the package of this signal, and by adjustment, this maximum or this minimum value are changed to the yield value of this signal, make the ratio of this maximum and this minimum value be not less than a particular value.
18. adaptive equilibrium methods according to claim 17, this step wherein detecting the maxima and minima of the package of this signal comprises:
Receive this signal, rectification is carried out to this signal;
Relatively through voltage peak and a stored voltage of this signal of rectification; And
This stored voltage corresponding to this voltage peak is exported according to this comparative result.
19. adaptive equilibrium methods according to claim 18, this step wherein adjusting this maximum or this minimum value comprises:
Adjustment corresponds to this stored voltage of this voltage peak; And
This stored voltage relatively after adjustment and this voltage peak, to export a control signal.
20. adaptive equilibrium methods according to claim 19, this step wherein adjusting this maximum or this minimum value also comprises:
An adjustment signal is exported to this signal gain unit, to adjust the yield value of this signal gain unit according to this control signal.
21. adaptive equilibrium methods according to claim 20, if this stored voltage after wherein adjusting is more than or equal to this voltage peak, increase the figure place of this adjustment signal.
22. adaptive equilibrium methods according to claim 21, if this stored voltage after wherein adjusting is less than this voltage peak, stop the figure place increasing this adjustment signal.
23. adaptive equilibrium methods according to claim 21, wherein when the figure place of this adjustment signal increases, improve the high-frequency gain of this signal.
24. adaptive equilibrium methods according to claim 23, wherein when the high-frequency gain of this signal improves, adjust this minimum value, make the ratio of this maximum and this minimum value be not less than this particular value.
25. adaptive equilibrium methods according to claim 21, wherein when the figure place of this adjustment signal increases, reduce the low-frequency gain of this signal.
26. adaptive equilibrium methods according to claim 25, wherein when the low-frequency gain of this signal reduces, adjust this maximum, make the ratio of this maximum and this minimum value be not less than this particular value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110006547.9A CN102594743B (en) | 2011-01-13 | 2011-01-13 | Adpative equalizing circuit and method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110006547.9A CN102594743B (en) | 2011-01-13 | 2011-01-13 | Adpative equalizing circuit and method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102594743A CN102594743A (en) | 2012-07-18 |
| CN102594743B true CN102594743B (en) | 2015-09-02 |
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| CN110650105B (en) * | 2019-09-11 | 2022-01-18 | 芯创智（北京）微电子有限公司 | Adaptive continuous time linear equalization broadband active linear equalizer circuit |
| CN112702291B (en) * | 2020-12-24 | 2022-08-19 | 成都振芯科技股份有限公司 | Adaptive equalizer and adjusting range expanding method thereof |
| CN113176439B (en) * | 2021-04-29 | 2022-08-16 | 四川虹美智能科技有限公司 | Single-phase alternating-current voltage detection circuit and detection method thereof |
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| US6819166B1 (en) * | 2003-01-03 | 2004-11-16 | Silicon Image, Inc. | Continuous-time, low-frequency-gain/high-frequency-boosting joint adaptation equalizer and method |
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