CN102594243B - Indirect matrix converter multi-machine transmission system and fault-tolerant operation control method thereof - Google Patents

Abstract

The invention discloses an indirect matrix converter multi-machine transmission system and a fault-tolerant operation control method thereof, belonging to the field of power electronic converters and electric transmission control. The invention discloses a multi-inverter-stage multi-machine transmission system based on an indirect matrix converter, which is characterized in that an auxiliary switch is serially connected among a plurality of inverter-stage circuits of the multi-machine transmission system based on the indirect matrix converter, and by controlling the on-off of the auxiliary switch, when one or more inverter-stage circuits of the multi-machine transmission system have single-phase faults, the system can realize the fault-tolerant operation of the system through the recombination of inverter-stage circuit switch devices and the small-period space vector pulse width modulation algorithm of each inverter-stage circuit. The invention can ensure that the system can still continuously run without shutdown when the inverter stage circuit has open circuit or open-phase fault, thereby increasing the redundancy of the multi-machine transmission system based on the indirect matrix converter and improving the stability and reliability of the system.

Description

Indirect matrix converter-based multi-unit drive system and error-tolerant operation control method thereof

Technical field

The present invention relates to a kind of control method of converters, particularly relate to the error-tolerant operation control method that a kind of Indirect Matrix Converter drives multiple electric motors.

Background technology

Multi-unit Drive Systems system based on Indirect Matrix Converter can drive multiple electric motors run with load simultaneously, have that topology is simple, compact conformation, be easy to realize and the advantage such as power density is large, be particularly useful for space flight, military project etc. needs multiple electric motors to turn with carrying and in the limited industrial application of spatial content simultaneously.

But the power semiconductor device adopted based on the Multi-unit Drive Systems system of Indirect Matrix Converter is various; control method is complicated; be easy to the damage occurring device; once certain device failure must take maintenance down to whole system; this will reduce the reliability of system greatly, also can bring huge economic loss simultaneously.

Summary of the invention

To the present invention is directed in background technology based on Problems existing in indirect matrix converter-based multi-unit drive system, propose a kind of error-tolerant operation control method.

Indirect matrix converter-based multi-unit drive system provided by the invention, by three-phase alternating-current supply (1), input LC filter (2), three-phase bridge rectification level circuit (3), clamp circuit (4), two three-phase bridge type inverse level circuit (5), auxiliary switch (6), two asynchronous motors (7) and two DC bus compositions, wherein, three-phase bridge rectification level circuit (3) is made up of 6 bidirectional switch Sap-Scn, three-phase alternating-current supply (1) is connected to the mid point of each brachium pontis in three-phase bridge rectification level circuit (3), three-phase bridge rectification level circuit (3), clamp circuit (4), two three-phase bridge type inverse level circuit (5) are parallel between two DC buss successively, auxiliary switch (6) is made up of three bidirectional thyristors, between the three-phase being series at two three-phase bridge type inverse level circuit (5) respectively, each phase (7) of two threephase asynchronous machines is connected to each brachium pontis mid point of two three-phase bridge type inverse level circuit (5), asynchronous machine drags load and does motor running.

When there is single-phase fault in some three-phase bridge type inverse level circuit (5), by controlling the break-make of auxiliary switch (6), the switching device of three-phase bridge type inverse level circuit (5) is recombinated and forms new system configuration, ensure the stable operation of all asynchronous machines (7).Intermediate dc bus can multiple inverse cascade circuit in parallel, each inverse cascade drives one asynchronous motors, auxiliary switch of all connecting between each inverse cascade circuit, can be implemented in the fault-tolerant operation of system when single-phase fault appears in multiple inverse cascade circuit.

The present invention also provides a kind of minor cycle space vector width pulse modulation method of said system, for the inverse cascade circuit broken down and the inverse cascade circuit providing switching device to recombinate, first a sampling period is on average divided into several minor cycle according to the inverse cascade circuits present participating in fault-tolerant operation, described inverse cascade circuits present is the inverse cascade circuit broken down and the inverse cascade circuit sum providing switching device to recombinate, then the inverse cascade circuit only allowing to participate in fault-tolerant operation within a minor cycle performs the control strategy under nominal situation, other inverse cascade circuit is then in zero vector state, control strategy under nominal situation is performed to the inverse cascade circuit do not broken down or do not provide switching device to recombinate.

The control strategy of this method under described nominal situation is that three-phase bridge rectification level circuit and three-phase bridge type inverse level circuit all adopt space vector pulse width modulation strategy (SVPWM), and both is combined, each inverse cascade circuit all adopts hemihedrism formula 9 sections of PWM pulsewidth distribution modes.

The present invention has following beneficial effect:

At the some of Multi-unit Drive Systems system or there is single-phase fault in multiple inverse cascade circuit time, system can carry out the restructuring of inverse cascade circuit switch device, adopt half period spatial vector pulse width modulation algorithm simultaneously, effectively can realize the fault-tolerant operation of system, thus system is possessed redundant ability, improve stability and the reliability of system.

Accompanying drawing explanation

Fig. 1 is the main circuit structure block diagram based on indirect matrix converter-based multi-unit drive system of band auxiliary switch of the present invention.

Fig. 2 is rectification stage circuital current three dimensional vector diagram.

Fig. 3 is inverse cascade circuital current three dimensional vector diagram.

Fig. 4 is the hemihedrism formula 9 sections of PWM pulsewidth distribution schematic diagrams for three-phase bridge rectification level circuit during two asynchronous motors and three-phase bridge type inverse level circuit.

Fig. 5 is for two asynchronous motors, is 1 (Sci=1), exports sector and be respectively switching tube on off state distribution schematic diagram in 1 (Svo1=1), 2 (Svo2=2) situation in input sector.

Fig. 6 is the main circuit structure block diagram that the present invention is based under indirect matrix converter-based multi-unit drive system fault-tolerant operation.

Fig. 7 is for two asynchronous motors, the pulsewidth distribution schematic diagram of the half period space vector pulse width modulation under fault-tolerant operation.

Fig. 8 is for two asynchronous motors under fault-tolerant operation of the present invention, is 1 (Sci=1), exports sector and be respectively switching tube on off state distribution schematic diagram in 1 (Svo1=1), 2 (Svo2=2) situation in input sector.

Embodiment

1. be with the circuit topology based on indirect matrix converter-based multi-unit drive system of auxiliary switch

The main circuit structure based on indirect matrix converter-based multi-unit drive system of band auxiliary switch of the present invention as shown in Figure 1, comprises input three-phase alternating-current supply (1), input LC filter (2), three-phase bridge rectification level circuit (3), clamp circuit (4), two three-phase bridge type inverse level circuit (5), auxiliary switch (6), two asynchronous motors (7) and two DC buss.The wherein three-phase bridge rectification level circuit (3) that forms of 6 bidirectional switch Sap-Scn (each bidirectional switch forms by two power switch pipes and two anti-paralleled diode differential concatenations), three-phase bridge type inverse level circuit (5) for suppressing the clamp circuit of due to voltage spikes (4) and two to be made up of single-phase switch (SAp-SCn) and fly-wheel diode is connected to the two ends of DC bus successively, auxiliary switch (6) is made up of three bidirectional thyristors, be series at two three-phase bridge type inverse level circuit (5) respectively corresponding mutually between, each three-phase bridge type inverse level drives one asynchronous motors speed governing operation.

The basic functional principle of this circuit is the middle dc voltage obtaining equivalence under the three-phase bridge rectification level circuit (3) that bidirectional switch forms is operated in PWM rectification mode, utilize by diode, the clamp circuit (4) of electric capacity and resistance composition absorbs the due to voltage spikes produced because of switch high-frequency action, the input current of simultaneously three-phase bridge rectification level circuit (3) inputs three-phase alternating-current supply (1) by input LC filter (2) filtering because high-frequency harmonic that switch motion produces is connected to, the sinusoidal voltage that two three-phase bridge type inverse level circuit (5) export three-phase equilibrium under PWM inverter mode drives two asynchronous motors (7) to do speed governing operation respectively, when single-phase fault appears in certain inverse cascade circuit, auxiliary switch (6) can carry out the switching device restructuring of inverse cascade circuit.

2. the control strategy under nominal situation

Three-phase bridge rectification level circuit (3) and three-phase bridge type inverse level circuit (5) all adopt space vector pulse width modulation strategy (SVPWM), and both is combined, control each inverse cascade circuit and all adopt hemihedrism formula 9 sections of PWM pulsewidth distribution modes.

The modulation object of rectification stage circuit be produce three-phase equilibrium sine input current and to realize input power factor adjustable, usual setting input power factor is 1, i.e. input current and input voltage (referring to here input three-phase alternating-current supply voltage) same-phase.Therefore angular position theta between reference input current hollow can be determined by detecting supply voltage in real time _i, setting I _refit is reference current space vector.According to traditional SVPWM, according to θ _isector code Sci and phase angle, the sector θ of current reference current space vector can be calculated, then utilize in this sector two non-zero and zero vector to synthesize I _ref, as shown in Fig. 2 rectification stage circuital current three dimensional vector diagram, the action time of each vector within a PWM cycle can be obtained,

$\left\{\begin{array}{c}{t}_{\mathrm{\μ}}=m{T}_s\sin (\frac{1}{3}\mathrm{\π}-\mathrm{\θ})/\sin \left(\frac{1}{3}\mathrm{\π}\right)\\ t_v=m{T}_s\sin \left(\mathrm{\θ}\right)/\sin \left(\frac{1}{3}\mathrm{\π}\right)\\ t_{0\mathrm{rec}}=T_s-t_{\mathrm{\μ}}-t_v\end{array}\right.---\left(1\right)$

In formula, m is modulation ratio (0 < m≤0.866), T _sfor the sampling period,

The on off state of the rectification stage circuit in Fig. 2 corresponding to each vector is as shown in table 1, and the bidirectional switch that " 0 " wherein in Sap-Scn represents corresponding brachium pontis turns off, and " 1 " represents that corresponding switch is open-minded.As table 1, non-zero I ₁~ I ₆corresponding a kind of on off state respectively, and zero vector I ₀to there being three kinds of states, be that the upper and lower bridge arm of a phase is all open-minded respectively, other two-phase upper and lower bridge arm all turns off; The upper and lower bridge arm of b phase is all open-minded, and other two-phase upper and lower bridge arm all turns off; The upper and lower bridge arm of c phase is all open-minded, and other two-phase upper and lower bridge arm all turns off.Corresponding zero vector state is selected according to minimum the carrying out of on-off times in practical application.For sector I, I _μfor I ₆(100100), I _vfor I ₁(100001), then I ₀select (110000), can ensure that two brachium pontis actions only appear in each change of current like this.

Table 1 rectification stage contactor state

Same, inverse cascade circuit also adopts similar SVPWM, and the action time that can calculate each vector as shown in Fig. 3 inverse cascade circuit voltage three dimensional vector diagram is respectively,

$\left\{\begin{array}{c}{t}_{\mathrm{\&alpha;}}=\frac{m{T}_s\&CenterDot;\sin (\frac{1}{3}\mathrm{\&pi;}-{\mathrm{\&theta;}}_0)}{\sin \left(\frac{1}{3}\mathrm{\&pi;}\right)}\\ t_{\mathrm{\&beta;}}=\frac{m{T}_s\&CenterDot;\sin {\mathrm{\&theta;}}_0}{\sin \left(\frac{1}{3}\mathrm{\&pi;}\right)}\\ t_{0\mathrm{inv}}=T_s-t_{\mathrm{\&alpha;}}-t_{\mathrm{\&beta;}}\end{array}\right.---\left(2\right)$

In formula, m is modulation ratio, 0 < m≤0.866, θ ₀for the phase angle, sector of output voltage vector.

Due to three-phase bridge type inverse level circuit, the upper and lower bridge arm of each circuitry phase is all in complementary state, namely go up brachium pontis turn off time then descend brachium pontis to open or upper brachium pontis open at present brachium pontis shutoff, therefore only need according to the on off state of the upper brachium pontis state of every circuitry phase and definable inverse cascade circuit, as shown in table 2.The power switch pipe that " 0 " wherein in SAp, SBp, SCp represents this brachium pontis turns off, and the lower brachium pontis switching tube of corresponding phase is open-minded; " 1 " represents that the power switch pipe of this brachium pontis is open-minded, and the lower brachium pontis switching tube of corresponding phase turns off.

As table 1, non-zero V ₁~ V ₆corresponding a kind of on off state respectively, and zero vector V ₀to should two states be had, be that the upper brachium pontis of A, B, C three-phase is all opened with the lower brachium pontis of A, B, C three-phase all open-minded respectively.Corresponding zero vector state is selected according to minimum the carrying out of on-off times equally in practical application.

Table 2 inverse cascade contactor state

The action time of each switching vector selector of rectification stage circuit and inverse cascade circuit can be calculated by formula (1) and (2), then just can determine PWM mode and the distribution of rectification stage circuit and inverse cascade circuit in conjunction with this two parts result of calculation.If the Zero voltage vector in inverse cascade circuit SVPWM modulation is distributed in the moment of the rectification stage circuit change of current, at this moment the three-phase input of inverse cascade circuit is connected on the homopolarity of DC link, DC link current is zero, so just can realize the zero current transition of rectification stage circuit, greatly reduce the switching loss of converter, improve the safety and reliability of the system change of current.But realizing this zero current transition mode needs the PWM mode of inverse cascade circuit to coordinate the PWM mode of rectification stage circuit.Therefore, in order to make the PWM mode of inverse cascade as far as possible simple, the PWM mode of rectification stage circuit adopts the most asymmetric 3 segmentations.The PWM mode of inverse cascade circuit becomes hemihedrism to be distributed in two non-zero parts of rectification stage.Under Fig. 4 illustrates two inverse cascade circuit conditions, the PWM mode of each inverse cascade circuit is hemihedrism 9 segmentation PWM.Due to switch state vector non complete symmetry action time of Indirect Matrix Converter, therefore rectification stage circuit needs 2 tunnels independently PWM output PWM1 and PWM2, and each inverse cascade circuit needs 6 tunnels independently PWM output PWM11-PWM16 and PWM21-PWM26 (respectively corresponding 1st and the 2nd inverse cascade circuit).

The I of top in figure _μ, I ₀and I _vfor the on off state of rectification stage electric current, their action time in a sampling period is respectively t _μ, t _0recand t _v, can calculate according to formula (1); Middle V ₀₁, V _{α 1}and V _{β 1}for the voltage switching state vector of inverse cascade 1, its action time in a sampling period is respectively t _{α 1}, t ₀₁and t _{β 1}, can calculate according to formula (2); The V of below ₀₂, V _{α 2}and V _{β 2}for the voltage switching state vector of inverse cascade 2, action time is respectively t _{α 2}, t ₀₂and t _{β 2}, can calculate according to formula (2) equally; x ₁, x ₂and x ₀action time of rectification stage contactor state vector account for whole sampling period T _sduty ratio, d ₁, d ₂and d ₀action time of inverse cascade 1 contactor state vector account for whole sampling period T _sduty ratio, e ₁, e ₂and e ₀action time of inverse cascade 2 contactor state vector account for whole sampling period T _sduty ratio.In figure, the action time of each section of PWM is respectively:

$\left\{\begin{array}{c}{t}_1=t_{\mathrm{\&mu;}}\\ t_2=t_{\mathrm{\&mu;}}+t_{0\mathrm{rec}}\end{array}\right.$

$\left\{\begin{array}{c}{t}_{11}=t_{\mathrm{\&mu;}}\&CenterDot;t_{01}/\left(2T_s\right)\\ t_{12}=t_{11}+t_{\mathrm{\&mu;}}\&CenterDot;t_{\mathrm{\&alpha;}1}/T_s\\ t_{13}=t_{12}+t_{\mathrm{\&mu;}}\&CenterDot;t_{\mathrm{\&beta;}1}/T_s\\ t_{14}=t_2+t_v\&CenterDot;t_{01}/\left(2T_s\right)\\ t_{15}=t_{14}+t_v\&CenterDot;t_{\mathrm{\&beta;}1}/T_s\\ t_{16}=t_{15}+t_v\&CenterDot;t_{\mathrm{\&alpha;}1}/T_s\end{array}\right.$

$\left\{\begin{array}{c}{t}_{21}=t_{\mathrm{\&mu;}}\&CenterDot;t_{02}/\left(2T_s\right)\\ t_{22}=t_{21}+t_{\mathrm{\&mu;}}\&CenterDot;t_{\mathrm{\&alpha;}2}/T_s\\ t_{23}=t_{22}+t_{\mathrm{\&mu;}}\&CenterDot;t_{\mathrm{\&beta;}2}/T_s\\ t_{24}=t_2+t_v\&CenterDot;t_{02}/\left(2T_s\right)\\ t_{25}=t_{24}+t_v\&CenterDot;t_{\mathrm{\&beta;}2}/T_s\\ t_{26}=t_{25}+t_v\&CenterDot;t_{\mathrm{\&alpha;}2}/T_s\end{array}\right.$

PWM distribution just can be determined the on off state of each switching tube of rectification stage circuit and inverse cascade circuit in conjunction with input current sector and output voltage sector, here to input, sector is 1 (Sci=1), output sector is respectively 1 (Svo1=1), 2 (Svo2=2) situation, introduces the on off state of each switching tube in detail.As shown in Figure 5, when reference input electric current is in input the 1st sector, I in corresponding rectification stage circuit _μfor I ₆(1 00100), I _vfor I ₁(100001), I ₀for (110000), namely in the whole sampling period, t ₁s in moment _ap=1, S _an=0, S _bp=0, S _bn=1, S _cp=0, S _cn=0, t ₁to t ₂interior S _ap=1, S _an=1, S _bp=0, S _bn=0, S _cp=0, S _cn=0, at t ₂s after moment _ap=1, S _an=0, S _bp=0, S _bn=0, S _cp=0, S _cn=1.The same sector code according to each inverse cascade circuit reference output voltage, can determine when the reference output voltage of inverse cascade circuit 1 is in the 1st sector, V in corresponding inverse cascade circuit _αfor V ₆(100110), V _βfor V ₁(1 00101), V ₀should select according to minimum switch motion principle in (101010) and (010101), the switching tube action of inverse cascade circuit 2 is selected similar, therefore passable to the result shown in Fig. 5.

3. error-tolerant operation control method

Once there is open circuit or short trouble in the some brachium pontis in inverse cascade circuit, the upper and lower bridge arm of this brachium pontis place phase must be disconnected, connect the auxiliary switch that this is connected, thus the upper and lower bridge arm of the corresponding phase of the inverse cascade circuit utilizing other not break down is reassembled into the fault-tolerant operation state of system simultaneously.Fig. 6 illustrates when the A phase brachium pontis of inverse cascade circuit 2 breaks down, and by this phase upper and lower bridge arm disconnecting consumers, connects auxiliary switch TR simultaneously _a, utilize the A phase brachium pontis of the inverse cascade circuit 1 do not broken down to connect load motor, formed the fault-tolerant operation state of Multi-unit Drive Systems system by the restructuring of switching device, thus maintain the normal operation of each load.

Under the fault-tolerant operation state shown in Fig. 6, if each inverse cascade circuit still continues to use the control strategy under nominal situation, obviously the normal operation of each load motor cannot be ensured, the present invention is based on this new running status, provide a kind of error-tolerant operation control method of Multi-unit Drive Systems system, to ensure under fault-tolerant operation state, each inverse cascade circuit still can reliably effectively run, obtain ideal output waveform, drive load motor to run well.

The technical solution adopted in the present invention is: a kind of minor cycle spatial vector pulse width modulation algorithm, it is characterized in that: do not break down or the inverse cascade control circui strategy that do not provide switching device to recombinate constant, and for the inverse cascade circuit broken down and the inverse cascade circuit providing switching device to recombinate, first a sampling period is on average divided into several minor cycle according to the inverse cascade circuits present (the inverse cascade circuit namely broken down and the inverse cascade circuit sum providing switching device to recombinate) participating in fault-tolerant operation, then the inverse cascade circuit only allowing to participate in fault-tolerant operation within a minor cycle performs the control strategy under nominal situation, other inverse cascade circuit is then in zero vector state.For two asynchronous motors, error-tolerant operation control method of the present invention will be illustrated below.

Fig. 7 illustrates load when being two asynchronous motors, when the A phase brachium pontis of inverse cascade circuit 2 breaks down, by this phase upper and lower bridge arm disconnecting consumers, and after utilizing the A phase brachium pontis of the inverse cascade circuit 1 do not broken down to connect load motor, utilize PWM pulsewidth distribution during error-tolerant operation control method of the present invention.

As shown in Figure 7, the inverse cascade circuit number now participating in fault-tolerant operation was 2 (comprising the inverse cascade circuit 2 broken down and the inverse cascade circuit 1 providing switching device to recombinate), two load motors still can be regarded as and driven by two inverse cascade circuit, namely asynchronous machine M1 is driven by former inverse cascade circuit 1, and the new three-phase bridge type inverse level circuit 2 ' that asynchronous machine M2 is made up of the A phase brachium pontis of former inverse cascade circuit 1 and B, C phase brachium pontis of inverse cascade circuit 2 drives.First a sampling period is on average divided into 2 minor cycles according to error-tolerant operation control method, the action time of each minor cycle is Ts/2.In first minor cycle, inverse cascade circuit 1 performs the control strategy under nominal situation, i.e. hemihedrism formula mentioned above 9 sections of PWM pulsewidth distribution modes, utilize formula (1) and (2) can calculate the current switch state vector I of rectification stage circuit respectively _μ, I ₀, I _vt action time _μ, t _0rec, t _vwith the voltage switching state vector V of inverse cascade circuit 1 _{α 1}, V _{α 1}, V _{β 1}t action time _{α 1}, t ₀₁, t _{β 1}, then can calculate the action time of each section of PWM (PWM1-3 and PWM11-16) in first minor cycle in publishing picture respectively.Similarly, in second minor cycle, allow new inverse cascade circuit 2 ' perform former inverse cascade circuit 2 control strategy in normal conditions, still adopt hemihedrism formula 9 sections of PWM pulsewidth distribution modes, by calculating the action time that can to obtain in second minor cycle each section of PWM (PWM4,5 and PWM21-26).

Just can be determined the on off state of each switching tube of rectification stage circuit and inverse cascade circuit each period of PWM action time calculating gained in conjunction with input current sector and output voltage sector.Fig. 8 illustrates that input sector is 1 (Sci=1), the on off state that exports each switching tube when sector is respectively 1 (Svo1=1), 2 (Svo2=2).As shown in the figure, because the reference current of rectification stage circuit is in the 1st sector in first minor cycle, the reference voltage of inverse cascade circuit 1 is also in the 1st sector, therefore I _μfor I ₆(100100), I _vfor I ₁(100001), I ₀for (110000), and 6 of inverse cascade circuit 1 switching tube (SA1p, SA1n, SB1p, SB1n, SC1p, SC1n) on off state under these 9 sections of PWM is then respectively (101010), (100110), (100101), (010101), (010101), (010101), (100101), (100110), (101010) the new inverse cascade circuit 2 ', formed after now restructuring should be in zero vector state, i.e. the B of inverse cascade circuit 2 always, C phase brachium pontis action maintenance is completely the same with the A phase brachium pontis of inverse cascade circuit 1, turns off the device that breaks down to ensure the safe operation (namely maintaining SA2p=SA2n=0) of system, so 6 of inverse cascade circuit 2 switching tube (SA2p simultaneously, SA2n, SB2p, SB2n, SC2p, SC2n) on off state under these 9 sections of PWM is respectively (001010), (001010), (001010), (000101), (000101), (000101), (001010), (001010), (001010), in second minor cycle, allow new inverse cascade circuit 2 ' perform former inverse cascade circuit 2 control strategy in normal conditions, and maintain inverse cascade circuit 1 and be in zero vector state, namely B, C phase brachium pontis action of inverse cascade circuit 1 keeps completely the same with A phase brachium pontis, now the reference current of rectification stage circuit is still in the 1st sector, the reference voltage of inverse cascade circuit 2 ' is in the 2nd sector, therefore the on off state of 6 switching tubes of known rectification stage circuit and the minor cycle similar, i.e. I _μfor I ₆(100100), I _vfor I ₁(100001), I ₀for (110000), and the on off state of 6 switching tubes (SA1p, SA1n, SB2p, SB2n, SC2p, SC2n) under 9 sections of PWM of the inverse cascade circuit 2 ' newly formed is respectively (010101), (100101), (101001), (101010), (101010), (101010), (101001), (100101), (010101), SB1p, SB1n and SC1p, SC1n and SA1p, SA1n state of opening the light is completely the same, SA2p=SA2n=0.

Claims (3)

1. the indirect matrix converter-based multi-unit drive system controlled based on fault-tolerant operation, it is characterized in that: described system is by three-phase alternating-current supply (1), input LC filter (2), three-phase bridge rectification level circuit (3), clamp circuit (4), multiple three-phase bridge type inverse level circuit (5), auxiliary switch (6), multiple asynchronous motors (7) and two DC bus compositions, wherein, three-phase bridge rectification level circuit (3) is made up of 6 bidirectional switch Sap-Scn, three-phase alternating-current supply (1) is connected to the mid point of each brachium pontis in three-phase bridge rectification level circuit (3), three-phase bridge rectification level circuit (3), clamp circuit (4), multiple three-phase bridge type inverse level circuit (5) is parallel between two DC buss successively, auxiliary switch (6) is made up of three bidirectional thyristors, between the three-phase being series at two three-phase bridge type inverse level circuit respectively, all to connect between each inverse cascade circuit auxiliary switch (6), each each brachium pontis mid point being connected to multiple three-phase bridge type inverse level circuit (5) mutually of multiple stage threephase asynchronous machine (7), each inverse cascade drives one asynchronous motors, asynchronous machine drags load and does motor running,

When there is single-phase fault in some three-phase bridge type inverse level circuit, by controlling the break-make of auxiliary switch (6), the switching device of three-phase bridge type inverse level circuit is recombinated and forms new system configuration, ensure the stable operation of all asynchronous machines (7);

For the inverse cascade circuit broken down and the inverse cascade circuit providing switching device to recombinate, first a sampling period is on average divided into several minor cycle according to the inverse cascade circuits present participating in fault-tolerant operation, described inverse cascade circuits present is the inverse cascade circuit broken down and the inverse cascade circuit sum providing switching device to recombinate, then the inverse cascade circuit only allowing to participate in fault-tolerant operation within a minor cycle performs the control strategy under nominal situation, and other inverse cascade circuit is then in zero vector state.

2. Multi-unit Drive Systems system as claimed in claim 1, is characterized in that: do not break down or do not provide switching device recombinate inverse cascade circuit execution nominal situation under control strategy.

3. Multi-unit Drive Systems system as claimed in claim 1 or 2, it is characterized in that: the control strategy under described nominal situation is that three-phase bridge rectification level circuit and three-phase bridge type inverse level circuit all adopt space vector pulse width modulation strategy (SVPWM), and both is combined, each inverse cascade circuit all adopts hemihedrism formula 9 sections of PWM pulsewidth distribution modes.