CN102592996A - Preparation method for Schottky diode based on core/shell structure silicon nanowire set - Google Patents
Preparation method for Schottky diode based on core/shell structure silicon nanowire set Download PDFInfo
- Publication number
- CN102592996A CN102592996A CN2012100547029A CN201210054702A CN102592996A CN 102592996 A CN102592996 A CN 102592996A CN 2012100547029 A CN2012100547029 A CN 2012100547029A CN 201210054702 A CN201210054702 A CN 201210054702A CN 102592996 A CN102592996 A CN 102592996A
- Authority
- CN
- China
- Prior art keywords
- silicon
- schottky diode
- silicon nanowires
- core
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a preparation method for a Schottky diode based on a core/shell structure silicon nanowire set. The method comprises the following steps of: silicon slice cleaning, back electrode preparation, silicon nanowire preparation, silicon nanowire gap filling, Pt thin-film deposition and the like. Silicon nanowires of the Schottky diode are of core/shell structures; silicon is a core; and a surface oxidation layer is a shell. When the Schottky diode is applied, the surface oxidation layer does not need to be removed. A current transmission mechanism of the prepared Schottky diode is a trap-assisted tunneling mechanism, so that the Schottky diode has an excellent rectification characterisitic and has a broad application prospect in the field of nanodevices and the field of new energy resources. The preparation method for the Schottky diode based on the core/shell structure silicon nanowire set is simple, is friendly to the environment, is low in cost requirement and is high in repeatability and is suitable for large-scale industrial production.
Description
Technical field
The present invention relates to semi-conducting material, nano-device technical field, specifically a kind of preparation method of the Schottky diode based on core/shell structure silicon nanowires group.
Technical background
Schottky diode has good character aspect plurality of applications for the diode of other types: the cut-in voltage that (1) is lower; (2) than short turnaround time; (3) lower junction capacitance.Schottky diode is widely used in radio frequency mixing and detector, power rectifier, integrated power supply or circuit, solar cell and fuel cell etc. as diode rectifier.
Silicon nanowires is typical case's representative of monodimension nanometer material; It is except the character that has body silicon and had; Also demonstrate physical propertys such as the field emission, the thermal conductivity that are different from body silicon, luminescence generated by light, have huge potential using value at aspects such as nano electron device, opto-electronic device and new forms of energy.The more important thing is, because a kind of utmost point that silicon nanowires and existing silicon technology have fabulous compatibility and then become the monodimension nanometer material field has the new material of application potential.
It is generally acknowledged core/shell structure silicon nanowires with oxide layer; There are a large amount of defectives at nuclear/shell interface; These defectives can be destroyed the application of silicon nanowires in nano-device; Limited the transmission of electronics and can not guarantee silicon nanowires ohmic contact effectively, required silicon nanowires, could guarantee its result of use using in earlier stage and must handling through reducing defective, dispersion and surface oxide layer and metal ion.
But silicon nanowires is very easily oxidized in air, guarantee based on the aerial practicality of the electronic device of silicon nanowires, and method is to realize the isolation fully of itself and air most effectively, has not only increased preparation technology's difficulty, and has increased production cost.Therefore also do not invent out a kind of can being exposed in the air at present, and preparation technology is simple, the Schottky diode based on silicon nanowires that production cost is little.
Summary of the invention
The object of the present invention is to provide a kind of Schottky diode preparation method based on core/shell structure silicon nanowires group; Harsh to solve existing Schottky diode preparation condition based on silicon nanowires; The problem that cost is high; A kind of low cost is provided, and high duplication is applicable to the new method of large-scale industrial production.
The concrete technical scheme that realizes the object of the invention is:
A kind of Schottky diode preparation method based on core/shell structure silicon nanowires group, this method comprises following concrete steps:
(1) standard RCA cleaning step cleaning silicon chip (< 100>crystal orientation, resistivity is 0.1-10 Ω cm for p-Si, twin polishing), nitrogen dries up subsequent use;
RCA standard cleaning step is:
A) cleaned 10 minutes under the DHF solution room temperature, DHF solution is that concentration is 5% the dilution HF aqueous solution;
B) flushing repeatedly under a large amount of deionized water room temperatures;
C) SPM solution cleaned 10 minutes for 120 ℃, and SPM solution is that (Sulfuric Peroxide Mixture, SPM), concrete solution allocation is H to Piranha
2SO
4: H
2O
2Volume ratio be V
H2O2: V
H2SO4=3:1;
D) flushing repeatedly under a large amount of deionized water room temperatures;
E) APM solution cleaned 10 minutes for 60 ℃, and APM solution is that (Hydrochloric Peroxide Mixture, APM), concrete solution allocation is NH to the SC-1 cleaning fluid
4OH:H
2O
2: H
2The volume ratio of O is V
NH4OH: V
H2O2: V
H2O=1:1:5;
F) flushing repeatedly under a large amount of deionized water room temperatures;
G) HPM solution cleaned 10 minutes for 60 ℃, and HPM solution is that (Hydrochloric Peroxider Mixture, HPM), concrete solution allocation is HCl:H to the SC-2 cleaning fluid
2O
2: H
2The volume ratio of O is V
HCl: V
H2O2: V
H2O=1:1:6;
H) flushing repeatedly under a large amount of deionized water room temperatures;
I) nitrogen dries up.
(2) through the vacuum evaporation appearance in silicon chip one side evaporating Al, at 450 ℃ of following thermal annealing 5 min of nitrogen atmosphere, form good Ohmic contact Al back electrode;
(3) spin coating Al back electrode face with photoresist, oven dry;
(4) 25 mmol L
-1AgNO
3With concentration is that 40% hydrofluoric acid mixes, and forms mixed solution, its 25 mmol L
-1AgNO
3With concentration be that the volume ratio of 40% hydrofluoric acid is 1:1, the ultrasonic mixed solution that makes evenly distributes; To put into mixed solution through the silicon chip that cleans, and guarantee that photoresist protection silicon face fully contacts down and with mixed solution, react 10~12 minutes, growth has silicon nanowires, its length on no photoresist protection silicon face<10 μ m then, use a large amount of deionized water rinsings, remove chemical agent residue; Remove depositing silver with nitric acid; A large amount of deionized water rinsings are removed chemical agent residue, the air dry oven oven dry; Its silicon of the silicon nanowires of being grown is shell for nuclear, surperficial natural oxidizing layer, constitutes the silicon nanowires coreshell structure;
(5) have the silicon chip of silicon nanowires to place the glue evenning table rotation growth, rotating speed is 3500 rpm, and duration is 20 s, and the assurance photoresist is fully filled the silicon nanowires gap, and the silicon nanowires tip can expose the oven dry photoresist;
(6) adopt sputtering method at the most advanced and sophisticated deposition of silicon nanowires Pt film; The sample that has deposited the Pt film is placed acetone soln; Remove photoresist and back electrode protection photoresist in the silicon nanowires gap; Use deionized water rinsing; Remove residual chemical reagent and organic substance, the air dry oven oven dry obtains the Schottky diode based on core/shell structure silicon nanowires group.
Said preparation method carries out under normal temperature and pressure conditions.
Outstanding feature of the present invention is: (1) keeps the surface of silicon nanowires oxide layer, does not need extra increase processing step to remove; (2) the Schottky diode preparation method is simple, and cost is low, and high duplication is applicable to large-scale industrial production; (3) normal temperature and pressure prepares environment, and common laboratory equipment can both reach requirement; (4) the Schottky diode current delivery of preparation mechanism has good rectification characteristic for the auxiliary tunnelling mechanism of defective.
Description of drawings
Fig. 1 is core/shell structure silicon nanowires transmission electron microscope of the present invention (TEM) figure; Wherein, the upper left and left following corresponding SEAD figure that is;
(a) is silicon nanowires scanning electron microscopy (SEM) figure behind the full-filling photoresist of the present invention among Fig. 2; (b) the based schottky diode structural representation that makes for the present invention.
Fig. 3 is under the different temperatures, the Schottky diode I-V curve chart that the present invention makes.
Embodiment
Embodiment
1) silicon chip cleans
Get size for 1cm * 1cm silicon chip (< 100>crystal orientation, resistivity is 0.1-10 Ω cm for p type, twin polishing), dry up subsequent use with standard RCA cleaning step cleaning silicon chip nitrogen.
2) Al back electrode preparation
In silicon chip one side evaporating Al,, form good Ohmic contact Al back electrode through the vacuum evaporation appearance 450 ℃ of following thermal annealings of nitrogen atmosphere 5 minutes; Spin coating Al back electrode face is dried photoresist with photoresist, is equipped with in the silicon nanowires process in no electrochemical etching legal system with protection, and back electrode is not destroyed.
3) silicon chip chemical etching solution preparation
Prepare 25 mmol L
-1AgNO
3, hydrofluoric acid (HF concentration is 40%) mixed solution (25 mmol L
-1AgNO
3With concentration be that 40% HF volume ratio is 1:1) 200 mL, the ultrasonic mixed solution that makes evenly distributes.
4) silicon chip chemical etching, the preparation silicon nanowires
The chemical replacement reaction takes place in silicon chip in chemical etching solution, silicon chip surface is etched, and forms silicon nanowire structure; Silicon chip is put into mixed solution (silicon chip is flooded by solution fully), do not have photoresist protection silicon face up, guarantee that silicon face fully contacts with solution; Reaction time is 12 minutes, and the silicon nanowires length of two-sided growth is at 6~8 μ m, and this length helps the gap that next step photoresist is fully filled silicon nanowires; Use a large amount of deionized water rinsings, remove chemical agent residue; Remove depositing silver with nitric acid; A large amount of deionized water rinsings are removed chemical agent residue, the air dry oven oven dry.
The traditional silicon nano wire all need be removed surface oxide layer before using, and the silicon nanowires silicon of the present invention's preparation is shell for nuclear, surperficial natural oxidizing layer, constitutes the silicon nanowires core/shell structure.
5) silicon nanowires for preparing is placed glue evenning table, rotary speed is chosen as 3500 rpm, and duration is 20 s, and the assurance photoresist is fully filled the silicon nanowires gap, and the silicon nanowires tip can expose the oven dry photoresist.
6) adopt sputtering method at the most advanced and sophisticated deposition of silicon nanowires Pt film; The sample that has deposited the Pt film is placed acetone soln; Remove photoresist and back electrode protection photoresist in the silicon nanowires gap; Deionized water washes in a large number; Removal remains in chemical reagent and the organic substance on the sample, and the air dry oven oven dry obtains the Schottky diode based on core/shell structure silicon nanowires group.
7) size of silicon chip and silicon chip chemical etching solution increase according to aforementioned proportion, and the Schottky diode based on core/shell structure silicon nanowires group that preparation generates also increases in proportion, is applicable to large-scale industrial production.
8) said preparation method carries out under normal temperature and pressure conditions.
Claims (1)
1. Schottky diode preparation method based on core/shell structure silicon nanowires group is characterized in that this method comprises following concrete steps:
(1) standard RCA cleaning step cleaning silicon chip, nitrogen dries up subsequent use;
(2) through the vacuum evaporation appearance in silicon chip one side evaporating Al, at 450 ℃ of following thermal annealing 5 min of nitrogen atmosphere, form good Ohmic contact Al back electrode;
(3) spin coating Al back electrode face with photoresist, oven dry;
(4) 25 mmol L
-1AgNO
3With concentration is that 40% hydrofluoric acid mixes, and forms mixed solution, its 25 mmol L
-1AgNO
3With concentration be that the volume ratio of 40% hydrofluoric acid is 1:1, the ultrasonic mixed solution that makes evenly distributes; To put into mixed solution through the silicon chip that cleans; Guarantee that photoresist protection silicon face fully contacts down and with mixed solution, reacted 10~12 minutes that growth has silicon nanowires on no photoresist protection silicon face; Its length 6~8 μ m; Then, use a large amount of deionized water rinsings, remove chemical agent residue; Remove depositing silver with nitric acid; A large amount of deionized water rinsings are removed chemical agent residue, the air dry oven oven dry; Its silicon of the silicon nanowires of being grown is shell for nuclear, surperficial natural oxidizing layer, constitutes the silicon nanowires core/shell structure;
(5) have the silicon chip of silicon nanowires to place the glue evenning table rotation growth, rotating speed is 3500 rpm, and duration is 20 s, and the assurance photoresist is fully filled the silicon nanowires gap, and the silicon nanowires tip can expose the oven dry photoresist;
(6) adopt sputtering method at the most advanced and sophisticated deposition of silicon nanowires Pt film; The sample that has deposited the Pt film is placed acetone soln; Remove photoresist and back electrode protection photoresist in the silicon nanowires gap; Use deionized water rinsing; Remove residual chemical reagent and organic substance, the air dry oven oven dry obtains the Schottky diode based on core/shell structure silicon nanowires group; Wherein:
Said silicon chip is p-Si, twin polishing, and < 100>crystal orientation, resistivity is 0.1-10 Ω cm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012100547029A CN102592996A (en) | 2012-03-05 | 2012-03-05 | Preparation method for Schottky diode based on core/shell structure silicon nanowire set |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012100547029A CN102592996A (en) | 2012-03-05 | 2012-03-05 | Preparation method for Schottky diode based on core/shell structure silicon nanowire set |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102592996A true CN102592996A (en) | 2012-07-18 |
Family
ID=46481469
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2012100547029A Pending CN102592996A (en) | 2012-03-05 | 2012-03-05 | Preparation method for Schottky diode based on core/shell structure silicon nanowire set |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102592996A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108303210A (en) * | 2017-12-29 | 2018-07-20 | 上海电力学院 | A kind of InAs vacuum meters and vacuum monitor method |
CN113161414A (en) * | 2021-04-29 | 2021-07-23 | 齐鲁工业大学 | Preparation method of PN micron line |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060134883A1 (en) * | 2004-12-20 | 2006-06-22 | Palo Alto Research Center Incorporated | Systems and methods for electrical contacts to arrays of vertically aligned nanorods |
CN1889274A (en) * | 2006-08-01 | 2007-01-03 | 武汉大学 | Silicon nano line homo pn junction diode and producing method thereof |
CN1996613A (en) * | 2000-08-22 | 2007-07-11 | 哈佛学院董事会 | Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors and fabricating such devices |
-
2012
- 2012-03-05 CN CN2012100547029A patent/CN102592996A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1996613A (en) * | 2000-08-22 | 2007-07-11 | 哈佛学院董事会 | Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors and fabricating such devices |
US20060134883A1 (en) * | 2004-12-20 | 2006-06-22 | Palo Alto Research Center Incorporated | Systems and methods for electrical contacts to arrays of vertically aligned nanorods |
CN1889274A (en) * | 2006-08-01 | 2007-01-03 | 武汉大学 | Silicon nano line homo pn junction diode and producing method thereof |
Non-Patent Citations (2)
Title |
---|
李可为: "《集成电路芯片制造工艺技术》", 1 May 2011, 高等教育出版社 * |
马殿飞: "Ag/SiNWs肖特基二极管温敏特性的研究", 《中国优秀硕士学位论文全文数据库》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108303210A (en) * | 2017-12-29 | 2018-07-20 | 上海电力学院 | A kind of InAs vacuum meters and vacuum monitor method |
CN113161414A (en) * | 2021-04-29 | 2021-07-23 | 齐鲁工业大学 | Preparation method of PN micron line |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Wang et al. | Micro-structured inverted pyramid texturization of Si inspired by self-assembled Cu nanoparticles | |
Qu et al. | Porous silicon nanowires | |
CN104993006B (en) | A kind of silicon heterogenous solar cell of transition metal oxide and preparation method thereof | |
CN100580876C (en) | Method for selectively etching silicon nano line | |
CN103189966B (en) | The method of cleaning of silicon substrate and the manufacture method of solar cell | |
US20050247674A1 (en) | Etching pastes for silicon surfaces and layers | |
CN107946470B (en) | Heterojunction solar cell and preparation method thereof | |
CN107946471B (en) | Heterojunction photovoltaic cell based on silicon nanowire array and preparation method thereof | |
Angermann | Passivation of structured p-type silicon interfaces: Effect of surface morphology and wet-chemical pre-treatment | |
EP2650926A1 (en) | Solar cell and solar-cell module | |
CN110459622A (en) | Semiconductor film and semiconductor element | |
CN103337449A (en) | Method for transplanting silicon nanowire array and preparing simple device thereof | |
CN101950763B (en) | Phosphorus-doped core-shell type structural solar cell based on silicon line arrays and fabrication method thereof | |
Hegazy et al. | Synthesis of MXene and design the high-performance energy harvesting devices with multifunctional applications | |
US20140166094A1 (en) | Solar cell emitter region fabrication using etch resistant film | |
CN102592996A (en) | Preparation method for Schottky diode based on core/shell structure silicon nanowire set | |
CN103489753B (en) | A kind of preparation method of large-area small-size core-shell structure silicon nanowire array | |
CN110518075A (en) | A kind of black silicon passivating film, preparation method and application | |
JP6768432B2 (en) | Manufacturing method of silicon substrate | |
CN103950889B (en) | The excellent preparation method with the silicon nanowire array of cutting-edge structure of a kind of field emission performance | |
CN102856434B (en) | Preparation method for square silicon nano-porous array | |
CN113394308A (en) | Processing method of semiconductor substrate layer and forming method of solar cell | |
Shen et al. | High efficiency conjugated polymer/Si hybrid solar cells with tetramethylammonium hydroxide treatment | |
CN208548341U (en) | Grapheme transistor circuit device | |
CN102593282A (en) | Doping method for ZnO nanowire array |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120718 |