CN102569353A - Semiconductor structure and preparation method thereof - Google Patents
Semiconductor structure and preparation method thereof Download PDFInfo
- Publication number
- CN102569353A CN102569353A CN2011100004333A CN201110000433A CN102569353A CN 102569353 A CN102569353 A CN 102569353A CN 2011100004333 A CN2011100004333 A CN 2011100004333A CN 201110000433 A CN201110000433 A CN 201110000433A CN 102569353 A CN102569353 A CN 102569353A
- Authority
- CN
- China
- Prior art keywords
- silicon carbide
- semiconductor substrate
- film
- semiconductor
- sic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention provides a semiconductor structure and a preparation method thereof. According to the invention, a buried oxide layer in the traditional SOI (Silicon On Insulator) is replaced with SiC to fabricate a semiconductor substrate. On one hand, since SiC has a large band gap, a SiC layer under a surface silicon thin film can serve as an excellent low-leakage current layer; on the other hand, since SiC has high pyroconductivity, self-heating of a device can be reduced and the substrate achieves excellent heat-conducting property.
Description
Technical field
The present invention relates to semiconductor design and manufacturing field thereof, particularly a kind of semiconductor structure that is used for Semiconductor substrate and preparation method thereof.
Background technology
SOI (Semiconductor-on-Insulator, semiconductor-on-insulator) be under semiconductor layer, be provided with oxygen buried layer (Buried Oxide Layer, BOX).With respect to traditional silicon substrate, the SOI substrate is owing to the good insulation properties of its oxygen buried layer possesses the characteristic of low-leakage current, thereby is widely used in semicon industry.
But also there is following problem in existing SOI substrate: the heat conductivity that contains the oxygen buried layer silica in the SOI substrate is lower with respect to silicon, thus cause the heat radiation difficulty of SOI device, and the spontaneous heating state of SOI device can cause device performance to reduce.Therefore, be necessary to develop the Semiconductor substrate that not only has lower leakage current but also have good heat-conducting.
Summary of the invention
The object of the invention is intended to one of solve the problems of the technologies described above at least, and a kind of Semiconductor substrate with lower leakage current and good heat conductivity and preparation method thereof particularly is provided.
For achieving the above object, on the one hand, the present invention provides a kind of semiconductor structure, comprising: Semiconductor substrate; Cover carborundum (SiC) film of said semiconductor substrate surface; And the semiconductor film that covers said SiC film surface.
On the other hand, the present invention provides a kind of preparation method of above-mentioned semiconductor structure, may further comprise the steps: first Semiconductor substrate is provided; On said first Semiconductor substrate, form silicon carbide film; On said silicon carbide film, form semiconductor film.
Semiconductor structure provided by the invention and preparation method thereof replaces the Semiconductor substrate that the oxygen buried layer among traditional SOI makes through utilizing SiC.On the one hand, because SiC has bigger band gap, thereby the SiC layer that is positioned under the surface silicon film can be used as good low-leakage current layer; On the other hand, because SiC has higher pyroconductivity, thus can reduce the spontaneous heating of device, thus make substrate have good heat-conducting simultaneously.
Aspect that the present invention adds and advantage part in the following description provide, and part will become obviously from the following description, or recognize through practice of the present invention.
Description of drawings
Above-mentioned and/or additional aspect of the present invention and advantage are from obviously with easily understanding becoming the description of embodiment below in conjunction with accompanying drawing, and accompanying drawing of the present invention is schematically, does not therefore draw in proportion.Wherein:
Fig. 1 is the semiconductor structure sketch map of the embodiment of the invention;
Fig. 2 compares form for each electrical parameter of SiC, GaAs and Si that H mixes;
Fig. 3-6 is the preparation method's of the semiconductor structure shown in Figure 1 sketch map of each step.
Embodiment
Describe embodiments of the invention below in detail, the example of said embodiment is shown in the drawings, and wherein identical from start to finish or similar label is represented identical or similar elements or the element with identical or similar functions.Be exemplary through the embodiment that is described with reference to the drawings below, only be used to explain the present invention, and can not be interpreted as limitation of the present invention.
Disclosing of hereinafter provides many various embodiment or example to be used for realizing different structure of the present invention.Of the present invention open in order to simplify, hereinafter the parts and the setting of specific examples are described.Certainly, they only are example, and purpose does not lie in restriction the present invention.In addition, the present invention can be in different examples repeat reference numerals and/or letter.This repetition is in order to simplify and purpose clearly, itself not indicate the relation between various embodiment that discuss of institute and/or the setting.In addition, various specific technology and the examples of material that the invention provides, but those of ordinary skills can recognize the property of can be applicable to of other technologies and/or the use of other materials.In addition; First characteristic of below describing second characteristic it " on " structure can comprise that first and second characteristics form the embodiment of direct contact; Can comprise that also additional features is formed on the embodiment between first and second characteristics, such first and second characteristics possibly not be direct contacts.
Shown in Figure 1 is semiconductor structure according to the embodiment of the invention, comprising: Semiconductor substrate 100, cover the SiC film 200 on Semiconductor substrate 100 surfaces, and the semiconductor film 300 that covers SiC film 200 surfaces.Preferably, the thickness of SiC film 200 is 10-1000nm, and the thickness of semiconductor film 300 is 10-100nm.Wherein, Semiconductor substrate 100 is an example with body silicon, but in the practical application, and Semiconductor substrate can comprise the semiconductor substrate materials that other are fit to, and specifically can be but is not limited to silicon, germanium, SiGe, GaAs or any III/V compound semiconductor etc.
Form shown in Figure 2 is that each electrical parameter of SiC, GaAs and the Si of H doping compares (concrete Data Source is http://www.cree.com/cn/products/sic_sub_prop.asp).Can know by this form: on the one hand, the SiC that H mixes can with band gap (＞3eV) be far longer than Si can band gap (～1.12eV), so the SiC layer that is positioned under the surface silicon film can be used as good low-leakage current layer; On the other hand, (2.2x 10 for the breakdown electric field of the SiC of H doping
6V/cm) (2.5x 10 also to be far longer than the breakdown electric field of Si
5V/cm); Again on the one hand, the thermal conductivity of the SiC that H mixes (＞3W/cmK) obviously greater than the thermal conductivity of Si (～1.5W/cmK), and the thermal conductivity far of Si is much larger than SiO
2Thermal conductivity (～0.014W/cmK) (Data Source is http://www.virginiasemi.com/pdf/generalpropertiesSi62002.pdf); Can reduce the spontaneous heating of device so contain the substrate of SIC interlayer, thereby make substrate have good heat-conducting.In sum, with respect to existing SOI substrate (like typical Si-SiO
2-Si structure), the present invention replaces oxygen buried layer SiO with SiC
2Form the Si-SiC-Si structure, thereby a kind of Semiconductor substrate that has lower leakage current and good heat conductivity simultaneously is provided.
Fig. 3-6 is the preparation method's of the said semiconductor structure of the embodiment of the invention the sketch map of each step.Below will combine diagrammatic sketch to specifically describe this preparation method.
Step 101: first Semiconductor substrate 100 and SiC substrate 201 is provided, as shown in Figure 3.Wherein, First Semiconductor substrate 100 is an example with body silicon; But in the practical application, first Semiconductor substrate can comprise the semiconductor substrate materials that other are fit to, and specifically can be but is not limited to silicon, germanium, SiGe, GaAs or any III/V compound semiconductor etc.
Step 102: key and SiC substrate 201 on first Semiconductor substrate 100, as shown in Figure 4.Be specially: inject hydrogen ion to SiC substrate 201; Key and SiC substrate 201 on first Semiconductor substrate 100.
Step 103: annealing, to peel off (delaminate) SiC film 200.Particularly, carry out the annealing of proper temperature, then can form the microdischarge cavities layer, thereby can the SiC film peeled off out from the SiC substrate in the position that hydrogen ion injects.This technology is called smart peeling (Smartcut
TM).
According to another embodiment of the present invention, also can be directly with SiC substrate 201 keys of routine with after on the Semiconductor substrate 100, form SiC film 200 shown in Figure 5 through thinning SiC substrate 201.Preferably, the final thickness of SiC film 200 is 10-1000nm.Wherein, the method that thins can comprise any suitable method of grinding (grinding) or etching (etching).Wherein etching comprises SiC substrate 201 initial oxidations is re-used hf etching.
Step 104:, as shown in Figure 6 in the SiC film 200 surperficial keys and second Semiconductor substrate 301.Particularly, hydrogen ion is injected on second Semiconductor substrate 301, will injects hydrionic second Semiconductor substrate, 301 keys again and to SiC film 200.
Step 105: carry out the annealing of proper temperature, so that semiconductor film 300 can be peeled off out from Semiconductor substrate 301.When annealing, inject hydrionic position and can form the microdischarge cavities layer, thereby make the stripping semiconductor film become possibility.
So just formed the semiconductor structure of Si-SiC-Si three-decker as shown in Figure 1.For other embodiment of the present invention, the various structures that possibly form by semiconductive thin film/SiC/ Semiconductor substrate.
Wherein, the material of second Semiconductor substrate 301 can be with reference to the material of first Semiconductor substrate 100, and preferably identical with first semiconductor substrate materials.The embodiment of the invention second Semiconductor substrate 301 is an example with body silicon.
Preferably, the final thickness of semiconductive thin film 300 is 10-1000nm.
Alternatively, also can adopt directly, adopt the method that second Semiconductor substrate 301 is thinned to semiconductive thin film 300 to realize the present invention with second Semiconductor substrate, 301 keys with to SiC film 200.Wherein, the method that thins can comprise any suitable method of grinding (grinding) or etching (etching).Wherein etching comprises second Semiconductor substrate, 301 initial oxidations is re-used hf etching.
So far, just obtained the semiconductor structure of the Si-SiC-Si three-decker of the embodiment of the invention, wherein, bottom is Semiconductor substrate (like a silicon chip), and intermediate course is the SiC film, and the top layer is semiconductive thin film (like the Si film).
The present invention provides a kind of semiconductor structure and preparation method thereof, replaces the Semiconductor substrate that the oxygen buried layer among traditional SOI makes through utilizing SiC.On the one hand, because SiC has bigger band gap, thereby the SiC layer that is positioned under the surface silicon film can be used as good low-leakage current layer; On the other hand, because SiC has higher pyroconductivity, thus can reduce the spontaneous heating of device, thus make substrate have good heat-conducting simultaneously.
Although illustrated and described embodiments of the invention; For those of ordinary skill in the art, will be appreciated that range of application of the present invention is not limited to the technology of the specific embodiment of describing in the specification, mechanism, manufacturing, material composition, means, method and step.From disclosure of the present invention; To easily understand as those of ordinary skill in the art; For the technology, mechanism, manufacturing, material composition, means, method or the step that have existed or be about to later on develop at present; Wherein they are carried out the corresponding embodiment cardinal principle identical functions of describing with the present invention or obtain identical substantially result, can use them according to the present invention.Therefore, accompanying claims of the present invention is intended to these technology, mechanism, manufacturing, material composition, means, method or step are included in its protection range.
Claims (13)
1. a semiconductor structure is characterized in that, comprising:
Semiconductor substrate;
Cover the silicon carbide film of said surface of silicon; And
Cover the semiconductor film on said silicon carbide film surface.
2. semiconductor structure as claimed in claim 1 is characterized in that, the thickness of said silicon carbide film is 10-1000nm.
3. semiconductor structure as claimed in claim 1 is characterized in that, the thickness of said semiconductor film is 10-100nm.
4. according to each described semiconductor structure of claim 1-3, it is characterized in that the material of said Semiconductor substrate and semiconductor film comprises crystal Si.
5. the preparation method of a semiconductor structure is characterized in that, may further comprise the steps:
First Semiconductor substrate is provided;
On said first Semiconductor substrate, form silicon carbide film;
On said silicon carbide film, form semiconductor film.
6. preparation method according to claim 5 is characterized in that, the said step that on said first Semiconductor substrate, forms silicon carbide film comprises:
Adopt the smart peeling technology on said Semiconductor substrate, to form silicon carbide film; Perhaps
Silicon carbide substrates is provided,, and thins said silicon carbide substrates, make its surface form silicon carbide film in said first Semiconductor substrate with said silicon carbide substrates key with on said Semiconductor substrate.
7. preparation method according to claim 6 is characterized in that, said employing smart peeling technology forms silicon carbide film on said Semiconductor substrate step comprises:
Silicon carbide substrates is provided;
Inject hydrogen ion to silicon carbide substrates;
Key and said silicon carbide substrates on said first Semiconductor substrate;
Anneal, so that said silicon carbide film is peeled off from said hydrogen ion position.
8. preparation method according to claim 5 is characterized in that, the said step that forms semiconductor film on said silicon carbide film surface comprises:
Adopt the smart peeling technology to form semiconductor film on said silicon carbide film surface; Perhaps
Second Semiconductor substrate is provided, and with the said second Semiconductor substrate key with to said silicon carbide film surface, and thin said second Semiconductor substrate, make it form semiconductor film on said silicon carbide film surface.
9. preparation method according to claim 8 is characterized in that, said employing smart peeling technology forms the step of semiconductor film on said silicon carbide film surface, comprising:
Second Semiconductor substrate is provided;
Inject hydrogen ion to said second Semiconductor substrate;
Key and said silicon carbide substrates on said silicon carbide film;
Anneal, so that said semiconductor film is peeled off from said hydrogen ion position.
10. like claim 6 or 8 described preparation methods, it is characterized in that, saidly thin said silicon carbide substrates and comprise: grinding or etching with the step that thins said second Semiconductor substrate.
11. preparation method as claimed in claim 10 is characterized in that, said etching comprises: initial oxidation re-uses hf etching.
12. the described preparation method of claim 5 is characterized in that, the thickness of said silicon carbide film is 10-1000nm.
13. preparation method as claimed in claim 5 is characterized in that, the thickness of said semiconductor film is 10-100nm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100004333A CN102569353A (en) | 2011-01-04 | 2011-01-04 | Semiconductor structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100004333A CN102569353A (en) | 2011-01-04 | 2011-01-04 | Semiconductor structure and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102569353A true CN102569353A (en) | 2012-07-11 |
Family
ID=46414341
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011100004333A Pending CN102569353A (en) | 2011-01-04 | 2011-01-04 | Semiconductor structure and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102569353A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1533609A (en) * | 2001-04-18 | 2004-09-29 | 松下电器产业株式会社 | Semiconductor device |
| CN101197260A (en) * | 2007-12-28 | 2008-06-11 | 上海新傲科技有限公司 | Semiconductor underlay and production method and its application on silicon and extension of insulator |
| CN101573786A (en) * | 2007-02-08 | 2009-11-04 | 硅绝缘体技术有限公司 | Method of fabrication of highly heat dissipative substrates |
-
2011
- 2011-01-04 CN CN2011100004333A patent/CN102569353A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1533609A (en) * | 2001-04-18 | 2004-09-29 | 松下电器产业株式会社 | Semiconductor device |
| CN101573786A (en) * | 2007-02-08 | 2009-11-04 | 硅绝缘体技术有限公司 | Method of fabrication of highly heat dissipative substrates |
| CN101197260A (en) * | 2007-12-28 | 2008-06-11 | 上海新傲科技有限公司 | Semiconductor underlay and production method and its application on silicon and extension of insulator |
Non-Patent Citations (3)
| Title |
|---|
| 《中国科学院研究生院博士学位论文》 20061231 邢玉梅 《SiC/Si异质结构和HfO2高k薄膜制备及其性能研究》 6-11 , * |
| 张永华等: "发展中的SiCOI技术", 《微电子学》, vol. 32, no. 2, 30 April 2002 (2002-04-30), pages 81 - 85 * |
| 邢玉梅: "《SiC/Si异质结构和HfO2高k薄膜制备及其性能研究》", 《中国科学院研究生院博士学位论文》, 31 December 2006 (2006-12-31) * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103168342B (en) | The electronic device applied for radio frequency or electric power and the technique manufacturing this device | |
| US7984408B2 (en) | Structures incorporating semiconductor device structures with reduced junction capacitance and drain induced barrier lowering | |
| CN101295734B (en) | Semiconductor device and method for manufacturing the same | |
| CN109804456A (en) | It is integrated with the electronic power components of engineering substrate | |
| CN101882624B (en) | Structure with high-Ge strained layer formed on insulating substrate and forming method | |
| TWI245427B (en) | High performance semiconductor devices fabrication with strain-induced process and methods for making same | |
| JPS61294846A (en) | Manufacture of semiconductor device | |
| CN106257641B (en) | High resistivity semiconductor-on-insulator substrate and its manufacturing method and semiconductor devices | |
| JP6154903B2 (en) | Method for forming photonics structure | |
| TW200828431A (en) | System and method for providing a nanoscale, highly selective, and thermally resilient boron etch-stop | |
| JPH11145438A (en) | Method of manufacturing soi wafer and soi wafer manufactured by the method | |
| CN101197260A (en) | Semiconductor underlay and production method and its application on silicon and extension of insulator | |
| US20150064929A1 (en) | Method of gap filling | |
| EP2757580A1 (en) | Bipolar cmos dmos (bcd) processes | |
| CN103137490B (en) | Semiconductor device and manufacture method thereof | |
| CN110291645A (en) | Method and system for vertical-type power device | |
| JP2022500869A (en) | Process for manufacturing improved substrates for hybrid integration | |
| Gammon et al. | Development, characterisation and simulation of wafer bonded Si-on-SiC substrates | |
| CN102623387A (en) | Method for preparing silicon on insulator (SOI) material based on buried-layer nitride ceramic backing base | |
| TW201729339A (en) | Semiconductor on insulator substrate | |
| CN102569353A (en) | Semiconductor structure and preparation method thereof | |
| CN103066007B (en) | A kind of preparation method of full isolation structure | |
| JP2011029594A (en) | Method of manufacturing soi wafer, and soi wafer | |
| KR970023998A (en) | How to Isolate Trench Devices | |
| CN108346686B (en) | Semiconductor device and method for manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120711 |