CN102566258A - Double imprint method - Google Patents
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- CN102566258A CN102566258A CN2010106124404A CN201010612440A CN102566258A CN 102566258 A CN102566258 A CN 102566258A CN 2010106124404 A CN2010106124404 A CN 2010106124404A CN 201010612440 A CN201010612440 A CN 201010612440A CN 102566258 A CN102566258 A CN 102566258A
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- patterned
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Abstract
The invention discloses a double imprint method, comprising the following steps of: forming a hard metal mask layer on a film to be etched; imprinting the hard metal mask layer by using a first mould, and taking the imprinted hard metal mask layer as a first imprint pattern; spirally coating deep ultraviolet oxides on the first imprint pattern and the exposed film to be etched, and carrying out hard baking processing; imprinting the deep ultraviolet oxides by using a second mould, and taking the imprinted deep ultraviolet oxides as a second imprint pattern; etching the first imprint pattern positioned under the second imprint pattern by using the second imprint pattern as a mask, removing the second imprint pattern, and taking the etched first imprint pattern as a third pattern; and etching the film to be etched by taking the third pattern as the mask. According to the double imprint method disclosed by the invention, the cost of forming the patterns on chips can be reduced.
Description
Technical field
The present invention relates to semiconductor technology, particularly a kind of two impression (double imprint) methods.
Background technology
Along with the development of semiconductor fabrication process, semiconductor chip size is more and more littler, so the precision of semiconductor technology also becomes more important.In semiconductor fabrication process, one of them important technology is exactly photoetching, and photoetching is to be the technological process of the pattern on the wafer with the design transfer on the mask, so the quality of photoetching can directly have influence on the performance of the chip of final formation.
Along with dwindling of die size, traditional single photoetching process can not satisfy process requirements, and in this case, two photoetching processes are arisen at the historic moment.Introduce in the face of of the prior art pair of photoetching method down, Fig. 1～Figure 10 is the process diagrammatic cross-section of two photoetching methods in the prior art, and of the prior art pair of photoetching method may further comprise the steps:
Step 1001, referring to Fig. 1, the hard mask 102 of deposition one deck on film 101 to be etched.
The material of film 101 to be etched is determined on a case-by-case basis, and for example, if desire forms metal wire, film 101 then to be etched is a metal level; If desire forms contact hole, film 101 then to be etched is a dielectric layer; If desire forms grid, film 101 then to be etched is a polycrystalline silicon grid layer.
Step 1002 referring to Fig. 2, deposits first bottom antireflective coating (BARC) 103 and first photoresist (PR) 104 successively on hard mask 102.
Need to prove that the also available reflection coating provided of BARC (TARC) substitutes, in practical application, also can omit the step that applies BARC or TARC, be determined on a case-by-case basis.
Step 1003 referring to Fig. 3, applies first mask (scheming not shown) on a PR 104, and makes public and develop, thereby forms first photoengraving pattern 105.
Step 1004 referring to Fig. 4, as mask, is carried out etching to a BARC 103 with hard mask 102 with first photoengraving pattern 105.
Etching stopping is in the surface of film 101 to be etched.
Step 1005 referring to Fig. 5, is peeled off film 101 surperficial first photoengraving pattern 105 and BARC 103 to be etched successively.
Step 1006, referring to Fig. 6, the surface of the hard mask 102 after etching deposits the 2nd BARC106 and the 2nd PR 107 successively.
This step is identical with step 1002, repeats no more here.
Step 1007 referring to Fig. 7, applies second mask (scheming not shown) on the 2nd PR 107, and makes public and develop, thereby forms second photoengraving pattern 108.
This step is identical with step 1003.
Step 1008 referring to Fig. 8, as mask, is carried out etching to the 2nd BARC 106 with second photoengraving pattern 108.
Step 1009 referring to Fig. 9,, is treated etched film 101 and is carried out etching as mask with hard mask 102 and second photoengraving pattern 108.
Step 1010 referring to Figure 10, is peeled off hard mask 102, the 2nd BARC 106 and second photoengraving pattern 108 on etching rear film 109 surfaces successively.
So far, this flow process finishes.
It is thus clear that; In the prior art; In order to satisfy the small size demand of semi-conductor chip, be that pattern on the wafer is realized through two photoetching with the design transfer on the mask, yet the litho machine that is used to implement photoetching is a kind of relatively more expensive board; Therefore, the cost that on wafer, forms pattern in the prior art is than higher.
Summary of the invention
In view of this, the present invention provides a kind of pair of method for stamping, to be reduced in the cost that forms pattern on the wafer.
For achieving the above object, technical scheme of the present invention is achieved in that
A kind of pair of method for stamping, this method comprises:
On film to be etched, form metal hard mask layer;
Adopt first mould that metal hard mask layer is impressed, the metal hard mask layer behind the impression is first patterned;
Spin coating deep ultraviolet oxide on first patterned and the film to be etched that comes out, and carry out rigid baking processing;
Adopt second mould that the deep ultraviolet oxide is impressed, the deep ultraviolet oxide behind the impression is second patterned;
,, then second patterned is removed being positioned at the first patterned etching under it as mask with second patterned, first patterned after the etching is the 3rd pattern;
As mask, treat the etched film etching with the 3rd pattern.
Said film to be etched is: from bottom to up dielectric layer and protective seam successively.
Said protective seam is: the silicon dioxide of ethyl orthosilicate or low-k;
Said metal hard mask layer is: titanium nitride or crome metal.
The thickness of said metal hard mask layer is 100 dust to 400 dusts;
The distance of the upper surface of the upper surface of said deep ultraviolet oxide and first patterned is 300 dust to 1000 dusts.
Said treating after the etched film etching, this method further comprises: the 3rd pattern is removed.
Said method to the first patterned etching is: adopt chlorine or boron trichloride gas that first patterned is carried out dry etching;
The said method that the 3rd pattern is removed is: adopt chlorine or boron trichloride gas that the 3rd pattern is carried out dry etching.
Said gas to the first patterned dry etching further comprises: helium or argon gas;
Said gas to the 3rd pattern dry etching further comprises: helium or argon gas.
In a kind of pair of method for stamping provided by the present invention; At first on film to be etched, form metal hard mask layer; Adopt first mould that metal hard mask layer is impressed and form first patterned, spin coating deep ultraviolet oxide on first patterned and the film to be etched that comes out, and carry out rigid baking processing; Adopt second mould that the deep ultraviolet oxide is impressed then and form second patterned; As mask the first patterned etching is formed the 3rd pattern with second patterned, at last with the 3rd pattern as mask, treat the etched film etching.It is thus clear that the present invention has formed the pattern of expection through twice impression and etching technics on film to be etched, do not depend on photoetching process of the prior art, has reduced the cost that on wafer, forms pattern.
Description of drawings
Fig. 1～Figure 10 is the process diagrammatic cross-section of two photoetching methods in the prior art.
Figure 11 is the process flow diagram of a kind of pair of method for stamping provided by the present invention.
Figure 12～Figure 20 is the process diagrammatic cross-section of two method for stamping embodiment among the present invention.
Embodiment
For making the object of the invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, scheme according to the invention is done to specify further.
Core concept of the present invention is: adopt twice impression to replace photoetching process of the prior art, satisfying on the basis that the less critical size of semiconductor devices requires, reduced the cost that on wafer, forms pattern.
Figure 11 is the process flow diagram of a kind of pair of method for stamping provided by the present invention.This method may further comprise the steps:
So far, this flow process finishes.
Figure 12～Figure 20 in this embodiment, forms through-hole pattern for the process diagrammatic cross-section of two method for stamping embodiment among the present invention in the dielectric layer of wafer.
Before introducing this embodiment in detail, the stamping technique that this embodiment is related to carries out brief account.Principle at stamping technique is: adopt mechanical pressure will have the mould of small size pattern, be pressed on the plastic material, the pattern on the mould can make that plastic material deforms, thus the complementary pattern of the pattern on formation and mould on the plastic material.
This embodiment comprises:
Step 2001 referring to Figure 12, deposits protective seam 202 and metal hard mask layer 203 successively on dielectric layer 201.
Wherein, dielectric layer 201 is a film to be etched with protective seam 202.
The principal ingredient of protective seam 202 is: the silicon dioxide (SiO2) of ethyl orthosilicate (TEOS) or low-k.
The principal ingredient of metal hard mask layer 203 is: titanium nitride (TiN) or crome metal (Cr), the thickness of metal hard mask layer 203 is about 100 dust to 400 dusts.
Unqualified to the thickness of dielectric layer 201 and protective seam 202 in this step, the thickness of dielectric layer 201 and protective seam 202 is decided according to requirement of products.
Step 2002 referring to Figure 13, adopts 204 pairs of metal hard mask layers 203 of first mould to impress.
Metal hard mask layer 203 is a plastic material, and when first mould 204 is pressing down in the process, metal hard mask layer 203 is under pressure and deforms.
Step 2003 referring to Figure 14, is removed first mould 204.
After first mould 204 was removed, metal hard mask layer 203 was under pressure and deforms and form first patterned 205.
Pattern on first patterned 205 and first mould 204 is complementary, and the part of first mould, 204 raisings is parts of depression corresponding to first patterned 204.
Step 2004, referring to Figure 15, spin coating deep ultraviolet oxide (Deep Ultraviolet Oxide, DUO) 206, and carry out rigid baking processing.
About the detailed introduction that deep ultraviolet oxide properties, one-tenth grade, can no longer detail with reference to the content of prior art here.For example, can link disclosed corresponding data referring to following two about the deep ultraviolet oxide:
https://www51.honeywell.com/sm/em/common/documents/msds-em-product-application-documents/DUO248-BARC.pdf
With
http://www.surechem.org/index.php?Action＝document&docId＝517209&db＝USPTOA&tab＝desc&lang＝&db_query＝0％3A％3A0％3A％3A0％3A&markupType＝all。
Deep ultraviolet oxide 206 was liquid state before carrying out rigid baking processing; Can make it to be covered on first patterned 205 through the mode of spin coating and on the protective seam 202 that comes out; After rigid baking processing, deep ultraviolet oxide 206 changes into solid-state.
Preferably, the upper surface of the upper surface of deep ultraviolet oxide 206 and first patterned 205 is 300 dust to 1000 dusts apart from d.
Step 2005 referring to Figure 16, adopts 207 pairs of deep ultraviolet oxides 206 of second mould to impress.
Deep ultraviolet oxide 206 is a plastic material, and when second mould 207 is pressing down in the process, deep ultraviolet oxide 206 is under pressure and deforms.
Step 2006 referring to Figure 17, is removed second mould 207.
After second mould 207 was removed, deep ultraviolet oxide 206 was under pressure and deforms and form second patterned 208.
Step 2007 referring to Figure 18, as mask, is carried out dry etching to first patterned 205 that is positioned under it with second patterned 208, and first patterned 205 after the etching forms the 3rd pattern 209.
The principal ingredient of the gas of dry etching can be chlorine (Cl
2) or boron chloride (BCl
3) etc.
The gas of dry etching also can further comprise the inert gas that is used for above-mentioned main gas dilution, for example helium (He) or argon gas (Ar) etc.
After this step is carried out dry etching, can make critical size (CD) deviation of pattern be less than or equal to 50 nanometers, key size deviation is meant checks the absolute value of checking the difference of critical size (AEI CD) after critical size (ADI CD) and the etching after the photoetching.
Step 2008 referring to Figure 19, adopts the method for wet-cleaned to remove deep ultraviolet oxide 206, thereby second patterned 208 is removed.
The method of wet-cleaned deep ultraviolet oxide 206 is a content of the prior art, can be with reference to correlation technique of the prior art.For example, can adopt product " CLK888 " to carry out wet-cleaned, about the concrete introduction of " CLK888 ", can be with reference to following several links:
http://www.mallbaker.com/micro/documents/performance/bakerclk-888_tpn .pdf、
http://www.mallbaker.com/micro/documents/performance/4000_copper_app lication_guide.pdf、
https://www51.honeywell.com/sm/em/common/documents/SPIE-Advanced- Lithography-2009.pdf、
With
http://library.abb.com/global/scot/scot205.nsf/veritydisplay/8f498e6428382 68385256fdb00575a71/$File/WPAnewFlyer.pdf。
After 208 removals of second patterned, be that first patterned 205 after the etching is the 3rd pattern 209 on the protective seam 202.
Step 2009 referring to Figure 20, as mask, to dielectric layer 201 and protective seam 202 etchings, forms through hole 210 with the 3rd pattern 209, then the 3rd pattern 209 is removed.
Wherein, but remove the associated description in the method refer step 2007 of the 3rd pattern 209, for example, adopt chlorine (Cl
2) or boron chloride (BCl
3) carry out dry etching.
Need to prove; Why present embodiment does not adopt second mould 207 directly first patterned 205 to be impressed; Be because: suppose the employing second mould 207 directly first patterned 205 is impressed, the patterned 205 of winning is squeezed once more deforms.Present embodiment forms second patterned 208 on first patterned 205, carry out etching according to 208 pairs first patterned of second patterned 205 then, deforms thereby avoided first patterned 205 to be squeezed once more.
It is thus clear that; Present embodiment does not adopt photoetching technique of the prior art, the substitute is impression twice, and the cost of stamping technique is lower; Therefore the method that provides of present embodiment has reduced the cost that forms pattern, and twice impression also can satisfy less critical size requirement.
So far, this flow process finishes.
According to technical scheme provided by the present invention; At first on film to be etched, form metal hard mask layer; Adopt first mould that metal hard mask layer is impressed and form first patterned, spin coating deep ultraviolet oxide on first patterned and the film to be etched that comes out, and carry out rigid baking processing; Adopt second mould that the deep ultraviolet oxide is impressed then and form second patterned; As mask the first patterned etching is formed the 3rd pattern with second patterned, at last with the 3rd pattern as mask, treat the etched film etching.It is thus clear that the present invention has formed the pattern of expection through twice impression and etching technics on film to be etched, do not depend on photoetching process of the prior art, has reduced the cost that on wafer, forms pattern.
Provided by the present invention pair of method for stamping can be applicable to the etching processing procedure of through hole, groove; Adopt of the present invention pair of method for stamping can make that the through hole (via) of final formation or the CD of groove (trench) are 20 nanometer to 30 nanometers, the spacing of through hole or groove (pitch) is less than 50 nanometers.
The above is merely preferred embodiment of the present invention, is not to be used to limit protection scope of the present invention.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (7)
1. two method for stamping, this method comprises:
On film to be etched, form metal hard mask layer;
Adopt first mould that metal hard mask layer is impressed, the metal hard mask layer behind the impression is first patterned;
Spin coating deep ultraviolet oxide on first patterned and the film to be etched that comes out, and carry out rigid baking processing;
Adopt second mould that the deep ultraviolet oxide is impressed, the deep ultraviolet oxide behind the impression is second patterned;
,, then second patterned is removed being positioned at the first patterned etching under it as mask with second patterned, first patterned after the etching is the 3rd pattern;
As mask, treat the etched film etching with the 3rd pattern.
2. method according to claim 1 is characterized in that, said film to be etched is: from bottom to up dielectric layer and protective seam successively.
3. method according to claim 2 is characterized in that, said protective seam is: the silicon dioxide of ethyl orthosilicate or low-k;
Said metal hard mask layer is: titanium nitride or crome metal.
4. method according to claim 3 is characterized in that, the thickness of said metal hard mask layer is 100 dust to 400 dusts;
The distance of the upper surface of the upper surface of said deep ultraviolet oxide and first patterned is 300 dust to 1000 dusts.
5. method according to claim 4 is characterized in that, said treating after the etched film etching, and this method further comprises: the 3rd pattern is removed.
6. method according to claim 5 is characterized in that, said method to the first patterned etching is: adopt chlorine or boron trichloride gas that first patterned is carried out dry etching;
The said method that the 3rd pattern is removed is: adopt chlorine or boron trichloride gas that the 3rd pattern is carried out dry etching.
7. method according to claim 6 is characterized in that, said gas to the first patterned dry etching further comprises: helium or argon gas;
Said gas to the 3rd pattern dry etching further comprises: helium or argon gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010612440 CN102566258B (en) | 2010-12-29 | 2010-12-29 | Double imprint method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010612440 CN102566258B (en) | 2010-12-29 | 2010-12-29 | Double imprint method |
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| CN102566258A true CN102566258A (en) | 2012-07-11 |
| CN102566258B CN102566258B (en) | 2013-09-18 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108319106A (en) * | 2018-01-04 | 2018-07-24 | 南方科技大学 | The method of nano impression |
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|---|---|---|---|---|
| WO2004114381A1 (en) * | 2003-06-20 | 2004-12-29 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing semiconductor device |
| CN1791967A (en) * | 2003-04-25 | 2006-06-21 | 分子制模股份有限公司 | A method of forming stepped structures employing imprint lithography |
| EP1801650A2 (en) * | 2005-12-23 | 2007-06-27 | ASML Netherlands BV | Alignment for imprint lithography |
| JP2008034412A (en) * | 2006-07-26 | 2008-02-14 | Canon Inc | Manufacturing method of structure having pattern |
| US20080166638A1 (en) * | 2007-01-05 | 2008-07-10 | Hynix Semiconductor Inc. | Photoresist Composition And Method For Forming Pattern Of A Semiconductor Device |
| CN101676801A (en) * | 2008-09-15 | 2010-03-24 | 台湾积体电路制造股份有限公司 | Lithography method |
-
2010
- 2010-12-29 CN CN 201010612440 patent/CN102566258B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1791967A (en) * | 2003-04-25 | 2006-06-21 | 分子制模股份有限公司 | A method of forming stepped structures employing imprint lithography |
| WO2004114381A1 (en) * | 2003-06-20 | 2004-12-29 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing semiconductor device |
| EP1801650A2 (en) * | 2005-12-23 | 2007-06-27 | ASML Netherlands BV | Alignment for imprint lithography |
| JP2008034412A (en) * | 2006-07-26 | 2008-02-14 | Canon Inc | Manufacturing method of structure having pattern |
| US20080166638A1 (en) * | 2007-01-05 | 2008-07-10 | Hynix Semiconductor Inc. | Photoresist Composition And Method For Forming Pattern Of A Semiconductor Device |
| CN101676801A (en) * | 2008-09-15 | 2010-03-24 | 台湾积体电路制造股份有限公司 | Lithography method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108319106A (en) * | 2018-01-04 | 2018-07-24 | 南方科技大学 | The method of nano impression |
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| CN102566258B (en) | 2013-09-18 |
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Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Effective date: 20121116 |
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Effective date of registration: 20121116 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Applicant after: Semiconductor Manufacturing International (Shanghai) Corporation Applicant after: Semiconductor Manufacturing International (Beijing) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Applicant before: Semiconductor Manufacturing International (Shanghai) Corporation |
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