CN102544679A - Design method for improving power capacity of micro-strip line of multilayer plate - Google Patents

Design method for improving power capacity of micro-strip line of multilayer plate Download PDF

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CN102544679A
CN102544679A CN2011104569338A CN201110456933A CN102544679A CN 102544679 A CN102544679 A CN 102544679A CN 2011104569338 A CN2011104569338 A CN 2011104569338A CN 201110456933 A CN201110456933 A CN 201110456933A CN 102544679 A CN102544679 A CN 102544679A
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power capacity
microstrip line
micro
fluting
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CN102544679B (en
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殷为民
刘丰
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Chengdu Nts Software Co ltd
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NTS Technology Chengdu Co Ltd
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Abstract

The invention discloses a design method for improving power capacity of a micro-strip line of a multilayer plate. The design method comprises the following steps of: a, changing a ground layer (2) below a first dielectric layer (5) of a traditional N-layer plate into a signal line layer (1); b, adding the signal line layer (1) between the (N-1)th diametric layer of the traditional N-layer plate and a base plate (3); and c, arranging an opening slot (4) on the upper end surface of the base plate (3) of the traditional N-layer plate, wherein the opening slot (4) is communicated with the base plate (3), the communication direction of the opening slot (4) is consistent with the direction of a signal line, and N is a positive integer equal to or larger than 2. According to the design method for improving the power capacity of the micro-strip line of the multilayer plate, disclosed by the invention, the practical through-current capability of the micro-strip line can be improved and can be about N times of that of the original micro-strip line, and the heat generated by loss in the dielectric layers when a signal passes the dielectric layers is reduced, thus a function of improving the power capacity of the micro-strip line of the multilayer plate is realized.

Description

A kind of method for designing that improves multi-layer sheet microstrip line power capacity
Technical field
The present invention relates to the radio frequency design field, specifically is a kind of method for designing that improves multi-layer sheet microstrip line power capacity.
Background technology
Development along with the radio frequency design field; Radio frequency applications has got into our various fields in life; People are also increasingly high to the stability and the requirement of high power capacity property of radiofrequency signal, and what bring is the power output increase of requirement radio-frequency module thereupon, and how to improve the multi-layer sheet microstrip line power capacity of transmission signals in the radio-frequency module; Just become requirement the most basic in the design process, also received people's attention further.
Here we with four laminates as an example, as shown in Figure 1, be holding wire on the general ground floor medium of traditional four laminate microstrip lines, the ground floor medium is down ground, be holding wire in the middle of the second layer and the 3rd layer of medium, the 3rd layer of medium is substrate down, just with reference to.Microstrip line for the identical characteristics impedance; This each layer of structure thickness of dielectric layers is less; Cause microstrip line conductor belt width very little; Conductor belt and big especially with reference to the electric field strength between the ground, as signal through the time can produce very big heat, thereby reduced the power capacity of whole multi-layer sheet microstrip line.
Summary of the invention
The objective of the invention is to overcome the not enough problem of traditional multi-layer sheet microstrip line power capacity, propose a kind of method for designing that improves multi-layer sheet microstrip line power capacity.
The present invention mainly realizes through following technical scheme for the technical solution problem: a kind of method for designing that improves multi-layer sheet microstrip line power capacity; May further comprise the steps: a, the stratum of the ground floor medium of traditional N laminate below is become as signal line layer, wherein N is equal to or greater than 2 positive integer;
B, between the N-1 layer medium of traditional N laminate and substrate, increase a signal line layer, wherein N is equal to or greater than 2 positive integer;
C, in the upper surface of the substrate of traditional N laminate a fluting is set, said fluting connects substrate, and the perforation direction of fluting is consistent with the holding wire direction, and wherein N is equal to or greater than 2 positive integer.
The width of the fluting among the said step c is 4 times of microstrip line conductor belt width, and the degree of depth of fluting is 1.5 times of thickness of dielectric layers.
The width of microstrip line conductor belt is relevant with the characteristic impedance of the thickness of dielectric layer, microstrip line, and its computing formula is following:
Figure 2011104569338100002DEST_PATH_IMAGE002
Figure 2011104569338100002DEST_PATH_IMAGE004
When w/h>=1,
Figure 2011104569338100002DEST_PATH_IMAGE006
;
When w/h<1,
Figure 2011104569338100002DEST_PATH_IMAGE008
Wherein, ε rBe relative dielectric constant, ε ReBe equivalent relative dielectric constant, Z cBe the characteristic impedance of microstrip line, Z c 0The characteristic impedance of microstrip line when being air for dielectric layer, w is a microstrip line conductor belt width, h is a thickness of dielectric layers.
Because relative dielectric constant ε r, microstrip line characteristic impedance Z cAnd thickness of dielectric layers h is known, therefore, through the aforementioned calculation formula, can draw microstrip line conductor belt width w, and then the groove width on definite substrate.
Said all signal line layers couple together through via hole.N layer signal line layer connects through via hole; The thickness of whole microstrip line conductor belt has become original N doubly; Wherein N is equal to or greater than 2 positive integer, and the through-current capability of microstrip line is directly proportional with the thickness of microstrip line conductor belt, so its through-current capability is about original N doubly.
Said step a, b, c all accomplish in the PCB course of processing.Bottom is become signal line layer, substrate fluting all can be adopted conventional PCB to process to accomplish.
The present invention compared with prior art has the following advantages and beneficial effect:
(1) the present invention becomes signal line layer through the stratum with ground floor medium below; Increase a signal line layer between N-1 layer medium and the substrate; Couple together all holding wires through via hole then, like this, the thickness of microstrip line conductor belt has become original N doubly; Because the through-current capability of microstrip line is directly proportional with the thickness of microstrip line conductor belt, so through-current capability is approximately original N doubly.
(2) the present invention is after being provided with fluting on the substrate; The dielectric layer of all holding wire references can be thought air approx; Its dielectric loss is very little, has reduced the heat that produces owing to loss in the dielectric layer when signal passes through, thereby realizes improving the function of multi-layer sheet microstrip line power capacity.
Description of drawings
Fig. 1 is the structural representation of traditional four laminates;
Fig. 2 is for adopting the structural representation of four laminates after the present invention improves.
Pairing Reference numeral is in the accompanying drawing: 1, signal line layer, 2, the stratum, 3, substrate, 4, fluting, 5, the ground floor medium, 6, the 3rd layers of medium.
Embodiment
Below in conjunction with embodiment the present invention is done further detailed description, but execution mode of the present invention is not limited thereto.
Embodiment:
As shown in Figure 2, present embodiment is an example with four laminates, may further comprise the steps: a, the stratum of ground floor medium 5 belows 2 is become as signal line layer 1;
B, between the 3rd layer of medium 6 and substrate 3, increase a signal line layer 1;
C, a fluting 4 is set in the upper surface of substrate 3, said fluting 4 connects substrates 3, and 4 the perforation direction of slotting is consistent with the holding wire direction.
The width of the fluting 4 among the step c of present embodiment is 4 times of microstrip line conductor belt width; The degree of depth of fluting is 1.5 times of thickness of dielectric layers; The width of fluting 4 confirms that through the width of microstrip line conductor belt the width of microstrip line conductor belt then draws through computing formula through the thickness of dielectric layer.
Stamp some perforation on the signal line layer 1 of present embodiment, each signal line layer 1 is coupled together, thereby make the thickness of microstrip line conductor belt become original 4 times through the via hole ways of connecting.
The step a of present embodiment, b, c all accomplish in the PCB course of processing.
In addition, the present invention is equally applicable to any multi-layer sheet, and method for designing and four laminates are basic identical.Like traditional N laminate; The stratum of ground floor medium below is become as signal line layer; Between N-1 layer medium and substrate, increase a signal line layer, and a fluting is set on substrate, the width of fluting is 4 times of microstrip line conductor belt width; The degree of depth of fluting is 1.5 times of thickness of dielectric layers, at last each signal line layer is coupled together through via hole.

Claims (4)

1. method for designing that improves multi-layer sheet microstrip line power capacity is characterized in that: may further comprise the steps:
A, the stratum (2) of the ground floor medium (5) of N laminate below is become as signal line layer (1), wherein N is equal to or greater than 2 positive integer;
B, between the N-1 layer medium of traditional N laminate and substrate (3), increase a signal line layer (1), wherein N is equal to or greater than 2 positive integer;
C, in the upper surface of the substrate (3) of traditional N laminate a fluting (4) is set, said fluting (4) connects substrate (3), and the perforation direction of fluting (4) is consistent with the holding wire direction, and wherein N is equal to or greater than 2 positive integer.
2. a kind of method for designing that improves multi-layer sheet microstrip line power capacity according to claim 1; It is characterized in that: the width of the fluting among the said step c (4) is 4 times of microstrip line conductor belt width, and the degree of depth of fluting (4) is 1.5 times of thickness of dielectric layers.
3. a kind of method for designing that improves multi-layer sheet microstrip line power capacity according to claim 1 is characterized in that: said all signal line layers (1) couple together through via hole.
4. a kind of method for designing that improves multi-layer sheet microstrip line power capacity according to claim 1, it is characterized in that: said step a, b, c all accomplish in the PCB course of processing.
CN201110456933.8A 2011-12-31 2011-12-31 Design method for improving power capacity of micro-strip line of multilayer plate Active CN102544679B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103779641A (en) * 2014-01-22 2014-05-07 上海海事大学 Novel UWB filter of central loading folding limb multi-mode resonator structure
CN110602873A (en) * 2019-09-16 2019-12-20 西北核技术研究院 Method for reducing absorption or emission power of printed circuit board circuit and prediction method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5845395A (en) * 1995-09-14 1998-12-08 Nec Corporation Method of producing high-temperature superconductor thin film device
CN1758828A (en) * 2004-10-09 2006-04-12 鸿富锦精密工业(深圳)有限公司 Be applicable to the printed circuit board arrangement of high speed signal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5845395A (en) * 1995-09-14 1998-12-08 Nec Corporation Method of producing high-temperature superconductor thin film device
CN1758828A (en) * 2004-10-09 2006-04-12 鸿富锦精密工业(深圳)有限公司 Be applicable to the printed circuit board arrangement of high speed signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103779641A (en) * 2014-01-22 2014-05-07 上海海事大学 Novel UWB filter of central loading folding limb multi-mode resonator structure
CN110602873A (en) * 2019-09-16 2019-12-20 西北核技术研究院 Method for reducing absorption or emission power of printed circuit board circuit and prediction method

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