CN102543680A - Method for reducing cracking phenomena of double front metal dielectric substance layers - Google Patents
Method for reducing cracking phenomena of double front metal dielectric substance layers Download PDFInfo
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- CN102543680A CN102543680A CN2012100148029A CN201210014802A CN102543680A CN 102543680 A CN102543680 A CN 102543680A CN 2012100148029 A CN2012100148029 A CN 2012100148029A CN 201210014802 A CN201210014802 A CN 201210014802A CN 102543680 A CN102543680 A CN 102543680A
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Abstract
The invention relates to the manufacturing field of semiconductors, in particular to a method for reducing cracking phenomena of double front metal dielectric substance layers. According to the method for reducing the cracking phenomena of the double front metal dielectric substance layers, the adhesion between the first front metal dielectric substance layer and the second front metal dielectric substance layer can be effectively enhanced by firstly performing deionization cleaning on the first front metal dielectric substance layer before the second front metal dielectric substance layer is settled on the first front metal dielectric substance layer to remove phosphorus on the first front metal dielectric substance layer, so that the cracking phenomena generated in the process of the follow-up processing step due to poor adhesive property of thin films with different natures on interfaces thereof can be effectively avoided.
Description
Technical field
The present invention relates to semiconductor integrated circuit and manufacturing field thereof, relate in particular to a kind of method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena.
Background technology
Along with the CMOS technology is pressed the mole law and high speed development; After the critical size of device has been contracted under the 90nm; Metal and dielectric matter layer (Pre-Metal Dielectric before the deposition; Be called for short PMD) need to adopt high density plasma CVD (High Density Plasma chemical vapor deposition is called for short HDP CVD) to form usually.HDP CVD technology is to deposit simultaneously and etching, needs higher plasma density and more powerful radio-frequency power supply, and used radio-frequency power is more than 5000 watts usually.
Chinese patent CN01110119 discloses the manufacturing approach that a kind of dielectric layer between metal layers uniformity of improving high density plasma CVD method formed thereby is controlled not good situation; At first be to be manufactured with at the semiconductor-based end of a plurality of internal connecting lines, conformal formation one uniformity and the good thin PE-TEOS of tack.Then, on first oxide layer, form second oxide layer with the high-density plasma chemical vapor phase method, and insert the gap between those internal connecting lines.At last, on second oxide layer, form the 3rd oxide layer with the plasma enhanced chemical vapor deposition method again.According to the method for the invention, not only can reach splendid gap filling effect, can improve the situation of dielectric layer bad.
Chinese patent CN200480027564 relates to the method for blind in the semiconductor-based end.Substrate is provided in reative cell and contains the admixture of gas of at least a deuteride.Make the reaction of this admixture of gas and through the layer deposition of carrying out simultaneously be etched in and form material layer in the substrate.This material layer blind makes that the material in the slit is very close to each other basically.The present invention includes to provide and improve the inhomogeneity method of deposition rate.Material in the existence condition deposit of at least a gas that is selected from D2, HD, DT, T2 and TH from the teeth outwards.Under the substantially the same in other respects condition of the extent of deviation that net deposition rate between depositional stage has across the surface with respect to using H
2The extent of deviation that deposition takes place has obtained detectable improvement.
Chinese patent CN03109044 provides a kind of embedded with metal internal connection-wire structure with double shielding layer, includes semiconductor wafer; One dielectric layer is located on this semiconductor wafer, is formed with one in this dielectric layer and inlays pothole; One bronze medal plain conductor is located at this and is inlayed in the pothole, and this copper plain conductor has the upper surface that a process CMP ground, and this upper surface is flushed with this dielectric layer approximately; And the pair of lamina protective layer, comprise that a HDPCVD silicon nitride layer and a doped silicon carbide (doped silicon carbide) upper strata is overlying on the upper surface of this copper plain conductor.This upper surface of this copper metal carbonyl conducting layer is after CMP grinds, with hydrogen gas plasma or the preliminary treatment of ammonia (ammonia) plasma.This high density plasma CVD silicon nitride layer is that high density plasma CVD (HDPCVD) the method deposition that is utilized under 350 ℃ forms.
Utilize HDP technology when forming PMD,, in actual production process, can cause damage, make its leakage current increase the reliability decrease of device grid oxic horizon because its plasma density is high, power is big and time growth is long.
In order to reduce before the deposition during metal and dielectric matter layer plasma to the damage of grid oxic horizon; Can adopt double-deck preceding layer metal deposition method; Wherein ground floor is phosphosilicate glass (the Phosphosilicate Glass of HDP method deposition; Be called for short PSG), the second layer is the SiO that using plasma strengthens chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition is called for short PECVD) process deposits
2, wherein the phosphorus (P) in the HDP PSG technology mainly is used for catching the metal ion that is free in the device.
Yet these two kinds of films of different nature are bad its interface bonding, in follow-up procedure of processing process, are easy to generate the phenomenon of cracking.
Summary of the invention
The invention discloses a kind of method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, may further comprise the steps:
Step S1: deposition contact etching barrier layer on a P/NMOS substrate;
Step S2: metal and dielectric matter layer covers said contact etching barrier layer before the deposition first;
Step S3: adopt deionized water that the said first preceding metal and dielectric matter layer is cleaned;
Step S4: metal and dielectric matter layer before metal and dielectric matter layer covers said first before the deposition second;
Step S5: the second preceding metal and dielectric matter layer is ground so that its thickness meets process requirements.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, the material on contact etching barrier layer is a silicon nitride among the step S1.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena wherein, adopts high-density plasma process deposits phosphosilicate glass to form the said first preceding metal and dielectric matter layer among the step S2.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, the temperature that deposits metal and dielectric matter layer before said first is less than 500 ℃.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, the thickness of the said first preceding metal and dielectric matter layer is 800-2000A, phosphorus concentration is 2-8%.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, the mode that adopts monolithic or multi-disc to clean is carried out the deionization cleaning to the said first preceding metal and dielectric matter layer, to remove the phosphorus of its remained on surface.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, adopting deionized water among the step S3 is 20-200s to the time that the said first preceding metal and dielectric matter layer cleans.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, using plasma strengthens the chemical vapor deposition process deposit said second preceding metal and dielectric matter layer among the step S4.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, the temperature that deposits metal and dielectric matter layer before said second is 300-500 ℃.
The above-mentioned method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, wherein, the thickness of the second preceding metal and dielectric matter layer is 3000-10000A, its material is SiO
2
In sum; Owing to adopted technique scheme, the present invention to propose a kind of method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena, before the deposition second metal and dielectric matter layer on the metal and dielectric matter layer before first; Earlier the first preceding metal and dielectric matter layer being carried out deionization cleans; Removing the phosphorus on the metal and dielectric matter layer before first, thereby strengthened the glutinous viscosity between the metal and dielectric matter layer and the second preceding metal and dielectric matter layer before first, can effectively avoid because of film of different nature bad in the caking property at its interface; In follow-up procedure of processing process, the cracking phenomena of generation.
Description of drawings
Fig. 1-the 4th, the present invention reduce the flowage structure sketch map of the method for double-deck preceding metal and dielectric matter layer cracking phenomena.
Embodiment
Be further described below in conjunction with the accompanying drawing specific embodiments of the invention:
Fig. 1-the 4th, the present invention reduce the flowage structure sketch map of the method for double-deck preceding metal and dielectric matter layer cracking phenomena.
Shown in Fig. 1-4, a kind of method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena of the present invention may further comprise the steps:
At first, the deposition material is the contact etching barrier layer (Contact etching stop layer is called for short CESL) 2 of silicon nitride on P/NMOS substrate 1.
Secondly; Under less than 500 ℃ temperature; Adopt high-density plasma (High Density Plasma; Be called for short HDP) process deposits phosphosilicate glass (Phosphosilicate Glass is called for short PSG) the formation first preceding metal and dielectric matter layer 3, to cover the upper surface on contact etching barrier layer 2; Wherein, the thickness of the first preceding metal and dielectric matter layer 3 is 800-2000A, and its phosphorus that contains (P) concentration is 2-8%.
Afterwards, adopt deionized water that the upper surface of the first preceding metal and dielectric matter layer 3 is carried out deionization cleaning 4, adopt monolithic or multi-disc to carry out deionization and clean 20-200s, to remove the phosphorus of the upper surface of metal and dielectric matter layer 3 before first.
Then; Be under 300-500 ℃ the environment in temperature; Metal and dielectric matter layer 5 covered the upper surface that cleans the back first preceding metal and dielectric matter layer 3 before using plasma strengthened chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, abbreviation PECVD) technology deposit second; Wherein, the thickness of the second preceding metal and dielectric matter layer 5 is 3000-10000A, and material is silicon dioxide (SiO
2).Because the phosphorus before first on metal and dielectric matter layer 3 upper surface is cleaned; The upper surface that makes metal and dielectric matter layer 3 before winning is more near silicon dioxide; Promptly before first before the metal and dielectric matter layer 3 and second the glutinous viscosity between the metal and dielectric matter layer 5 be enhanced, thereby can effectively avoid in follow-up technology, occurring the phenomenon that ftractures between the two-layer preceding metal and dielectric matter layer.
At last, adopt cmp (Chemical Mechanical Polishing is called for short CMP) technology that the thickness of the second preceding metal and dielectric matter layer 5 is ground to the thickness that meets process requirements.
In sum; Owing to adopted technique scheme; The present invention proposes a kind of method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena; Handle through utilizing between two bed boundarys of deionized water to metal and dielectric matter layer before double-deck; Reduced content, strengthened the caking property of high-density plasma film and plasma enhanced chemical vapor deposition film by the P elements of the film upper surface of high-density plasma method deposit, finally eliminated double-deck before the phenomenon that between double-layer films, ftractures of metal and dielectric matter layer.
Through explanation and accompanying drawing, provided the exemplary embodiments of the ad hoc structure of embodiment, based on the present invention's spirit, also can do other conversion.Although foregoing invention has proposed existing preferred embodiment, yet these contents are not as limitation.
For a person skilled in the art, read above-mentioned explanation after, various variations and revise undoubtedly will be obvious.Therefore, appending claims should be regarded whole variations and the correction of containing true intention of the present invention and scope as.Any and all scope of equal value and contents all should be thought still to belong in the intent of the present invention and the scope in claims scope.
Claims (10)
1. a method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena is characterized in that, may further comprise the steps:
Step S1: deposition contact etching barrier layer on a P/NMOS substrate;
Step S2: metal and dielectric matter layer covers said contact etching barrier layer before the deposition first;
Step S3: adopt deionized water that the said first preceding metal and dielectric matter layer is cleaned;
Step S4: metal and dielectric matter layer before metal and dielectric matter layer covers said first before the deposition second;
Step S5: the second preceding metal and dielectric matter layer is ground so that its thickness meets process requirements.
2. the method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena according to claim 1 is characterized in that the material on contact etching barrier layer is a silicon nitride among the step S1.
3. the method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena according to claim 1 is characterized in that, adopts high-density plasma process deposits phosphosilicate glass to form the said first preceding metal and dielectric matter layer among the step S2.
4. according to claim 1 or the 3 described methods that reduce double-deck preceding metal and dielectric matter layer cracking phenomena, it is characterized in that the temperature that deposits metal and dielectric matter layer before said first is less than 500 ℃.
5. according to claim 1 or the 3 described methods that reduce double-deck preceding metal and dielectric matter layer cracking phenomena, it is characterized in that the thickness of the said first preceding metal and dielectric matter layer is 800-2000A, phosphorus concentration is 2-8%.
6. the method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena according to claim 5; It is characterized in that; The mode that adopts monolithic or multi-disc to clean is carried out the deionization cleaning to the said first preceding metal and dielectric matter layer, to remove the phosphorus of its remained on surface.
7. the method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena according to claim 1 is characterized in that, adopting deionized water among the step S3 is 20-200s to the time that the said first preceding metal and dielectric matter layer cleans.
8. the method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena according to claim 1 is characterized in that, using plasma strengthens the chemical vapor deposition process deposit said second preceding metal and dielectric matter layer among the step S4.
9. the method that reduces double-deck preceding metal and dielectric matter layer cracking phenomena according to claim 1 is characterized in that the temperature that deposits metal and dielectric matter layer before said second is 300-500 ℃.
10. according to claim 1 or the 9 described methods that reduce double-deck preceding metal and dielectric matter layer cracking phenomena, it is characterized in that the thickness of the second preceding metal and dielectric matter layer is 3000-10000A, its material is SiO
2
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6479385B1 (en) * | 2000-05-31 | 2002-11-12 | Taiwan Semiconductor Manufacturing Company | Interlevel dielectric composite layer for insulation of polysilicon and metal structures |
| US6677251B1 (en) * | 2002-07-29 | 2004-01-13 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for forming a hydrophilic surface on low-k dielectric insulating layers for improved adhesion |
| CN1495879A (en) * | 2002-07-24 | 2004-05-12 | 三星电子株式会社 | Method for making dual daascence interconnection of microelectronic device |
| KR100646524B1 (en) * | 2005-12-28 | 2006-11-15 | 동부일렉트로닉스 주식회사 | Method of making semiconductor device |
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- 2012-01-18 CN CN2012100148029A patent/CN102543680A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6479385B1 (en) * | 2000-05-31 | 2002-11-12 | Taiwan Semiconductor Manufacturing Company | Interlevel dielectric composite layer for insulation of polysilicon and metal structures |
| CN1495879A (en) * | 2002-07-24 | 2004-05-12 | 三星电子株式会社 | Method for making dual daascence interconnection of microelectronic device |
| US6677251B1 (en) * | 2002-07-29 | 2004-01-13 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for forming a hydrophilic surface on low-k dielectric insulating layers for improved adhesion |
| KR100646524B1 (en) * | 2005-12-28 | 2006-11-15 | 동부일렉트로닉스 주식회사 | Method of making semiconductor device |
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Application publication date: 20120704 |