CN102508712B - Middleware system of heterogeneous multi-core reconfigurable hybrid system and task execution method thereof - Google Patents
Middleware system of heterogeneous multi-core reconfigurable hybrid system and task execution method thereof Download PDFInfo
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Abstract
The invention discloses a middleware system of a heterogeneous multi-core reconfigurable hybrid system and a task execution method thereof. The middleware system is characterized by comprising an application program management layer, a task dividing and scheduling layer, a driving and input/output layer and a communication interface layer, wherein the application program management layer is used for supplying the operation environment and programming interface of an application program to a user; the task dividing and scheduling layer is in charge of scheduling in the process of dividing, mapping and operating tasks; and the driving and input/output layer is used for integrating the drives as well as input and output interfaces of a plurality of IP (Internet Protocol) cores; the application program management layer is used for providing an application program interface and an operation run time library for an application layer; the task dividing and scheduling layer used for dividing and scheduling task requests through a task dividing module, a mapping module and a scheduling module; the driving and input/output layer is integrated with a hardware drive and utilizes a hardware resource of an FPGA (Field Programmable Gate Array) platform; and the communication interface layer is in charge of transmitting data between reconfigurable hardware platforms. According to the system provided by the invention, the throughput rate of the platform and the performance of the system are improved by carrying out relative monitoring and automatic parallelization on the tasks in the operating process. The system can be used for supplying middleware supports comprising task dividing, scheduling and the like to a heterogeneous reconfigurable hybrid system, so that the execution efficiency is improved.
Description
Technical field
The invention belongs to the middleware Technology field of chip multi-core computing platform, be specifically related to middleware system and task executing method in a kind of heterogeneous multi-core reconfigurable commingled system.
Background technology
Restructural (Run Time Reconfiguration) when dynamic reconfigurable is otherwise known as operation, refer to when operation and be reconstructed, while being program execution, be that reconfigurable hardware injects or the different configuration information that swaps out, change in real time the structure of hardware, to adapt to different hardware algorithms, thereby there is higher chip utilization factor and running efficiency of system.
At the end of the nineties in last century, successively occurred several for specific area, based on customization reconfigurable hardware flow for dynamic reconfigurable system.PipeRench is a kind of streamlined coarseness reconfigurable system that CMU proposes, and its research and development start from 1997, and in flow in 2002 success.A task is divided into some flowing water stage, can makes reconfigurable hardware operation surpass the virtual task of its storage size.Its shortcoming is that range of application is fixed, and each pipelining-stage can only be the function of current state and a upper pipelining-stage.Morphosys adopts coarseness structure, and the degree of depth is able to programme, 32 of its upper and lower Wonder, and shortcoming is configuration underaction, can only be applied to some task that image is processed.Similarly project also has Paddi, Cameron, and Chess Array, Rapid etc., they are all in extendability, and versatility aspect runs into certain difficulty.
At present, in flow for dynamic reconfigurable system, except restructural chip, toward contact, comprise one or several general processors, it is for the treatment of tasks such as resource management, reconstruct.Conventionally claim that this system is heterogeneous multi-core reconfigurable commingled system.In this system, how hardware is carried out abstractly, and to user, to provide access interface and programming model be to need at present the difficult problem that solves.
Operating system is positioned at the upper strata of hardware in general, provides certain abstract, can simplify the exploitation of application program, and under operating system environment, application is no longer the individuality isolating.Operating system provides with applying independently various services (as: fifo buffer, timer, semaphore, driver etc.) mutually and calls for user, and the task that user submits to realizes the specific function that application is relevant on a higher level.Reconfigurable hardware (especially part reconfigurable FPGA) can be regarded the Heterogeneous Computing resource with ISP equality as, by being its design operation system, can accelerate the development progress of hybrid system, shorten Time To Market, reduce cost of development, enhancing system portability and dirigibility, reduce design complexities and maintenance difficulties, more can effectively support multitask, the multi-user environment in dynamic reconfigurable hybrid system, improve utilization factor and the configuration speed of restructural chip, thereby reach the object of giving full play to computing power.Since flow for dynamic reconfigurable system occurs, especially, along with the widespread use of hybrid system, there have been many scholars to carry out exploratory research in this field both at home and abroad.
The concept that blendes together operating system due to restructural was just suggested in recent years, also existed more problem to need further to explore and research at present.The present invention therefore.
Summary of the invention
In order to overcome the deficiency existing in background technology, one object of the present invention is to provide middleware and the tasks carrying model in a kind of heterogeneous multi-core reconfigurable commingled system, it comprises an application program management layer, task division and dispatch layer, drive and I/O layer, and communication interface layer forms.Middleware in the heterogeneous multi-core reconfigurable commingled system that the present invention proposes, can provide for heterogeneous reconfigurable commingled system the middleware supports such as task division scheduling, thereby improves the execution efficiency of task.
In order to solve these problems of the prior art, technical scheme provided by the invention is:
A middleware system in heterogeneous multi-core reconfigurable commingled system, it is characterized in that described middleware system comprises to user provides the task division of the running environment of application program and the application program management layer of DLL (dynamic link library), the division of being responsible for carrying out task, mapping and runtime scheduling and dispatch layer, the integrated driving of multiple IP kernel and the driving of input and output interface and I/O layer and communication interface layer; Application programming interfaces and run-time library that described application program management layer provides application layer to need; Described task division and dispatch layer are divided dispatch deal by task division module, mapping block and scheduler module to task requests; Described driving and I/O layer integrated hardware drive the hardware resource that utilizes FPGA platform; Described communication interface layer is responsible for carrying out the data transmission between reconfigurable hardware platform.
Preferably, described communication interface layer comprises hardware interface, software interface and restructural interface; Hardware interface is used for the communication between microprocessor and Hardware I P core, and by interruptable controller, detects the interrupt request of interconnection; Software interface is for transmission information between two microprocessors; Restructural interface reconfigures for the bit stream of IP kernel.
Preferably, during described application program management layer integrated operation analysis module with monitoring with dissect application program.
The present invention also provides the task executing method of the middleware system in a kind of heterogeneous multi-core reconfigurable commingled system, it is characterized in that described method comprised with the next stage:
(1) variable allocated phase: need to carrying out for each of task, obtain its input and output parametric variable, and be saved in storage inside buffering;
(2) the task division stage: for each task, determine the target computing unit of operation;
(3) tasks execution phases: task is sent to task in the computing unit in commingled system by interconnected core communication mechanism;
(4) the tasks synchronization stage, after tasks carrying is complete, carries out synchronously, and result is returned to user.
Preferably, the operand of each task distributes a list item during described method variable allocated phase; If there is no current variable in this table, variable will be by built-in variable of implicit expression rename.
Preferably, described method task division is to divide by the following method task during the stage: if there is idle Hardware I P core, task is sent to hardware, otherwise task will be sent to general processor.
Preferably, during described method tasks execution phases, by interruption, return to the result of tasks carrying, the tactful handling interrupt requests that adopts First come first served first to serve.
Preferably, described method tasks synchronization and presentation stage adopt grid synchronization mechanism, and each table comprises many computing unit entries, this table tracing task sum and the number of tasks having completed; If both equate, indicate the equal end of run of all tasks, can carry out synchronous; When tasks synchronization, mainly for the data between task are relevant, check, and guarantee that all tasks all return in order.
Application program management layer provides running environment and the DLL (dynamic link library) of application program to user, its constituted mode mainly comprises application programming interfaces and run-time library.Described task division and dispatch layer are mainly responsible for carrying out division, mapping and the runtime scheduling of task, therefore comprise task division module, mapping block and scheduler module.Integrated driving and the input and output interface of multiple IP kernel in described driving and I/O layer.Described communication interface layer comprises hardware interface, software interface and restructural interface.
Tasks carrying model in heterogeneous multi-core reconfigurable commingled system of the present invention, comprises four-stage: variable allocated phase, task division stage, tasks execution phases and tasks synchronization stage form.Described variable allocated phase, need to carrying out for each of task, obtains its input and output parametric variable, and is saved in storage inside buffering, as the basis of follow-up work.In the described task division stage, for each task, determine the target computing unit of operation.Described tasks execution phases, sends to task in the computing unit in commingled system by task by interconnected core communication mechanism.In the described tasks synchronization stage, after tasks carrying is complete, carries out synchronously, and result is returned to user.
The present invention relates to a kind of heterogeneous multi-core reconfigurable commingled system, be specifically related to middleware and tasks carrying model in a kind of heterogeneous multi-core reconfigurable commingled system.Middleware and tasks carrying model in the heterogeneous multi-core reconfigurable commingled system that the present invention proposes, can provide for heterogeneous reconfigurable commingled system the middleware supports such as task division scheduling, thereby improve the execution efficiency of task.
Compared with prior art, the present invention has following significant advantage:
1, the heterogeneous multi-core reconfigurable commingled system that the present invention proposes, provides the abstract of heterogeneous multi-core reconfigurable hardware, thereby provides middleware support to restructural multiple nucleus system.
2, the tasks carrying model that the present invention proposes, can provide for task the operating system grade support of running environment and division and scheduling, thus automatic division and the dynamic dispatching of realizing of task.
In sum, the invention provides middleware and tasks carrying model in a kind of heterogeneous multi-core reconfigurable commingled system, it comprises an application program management layer, and task division and dispatch layer drive and I/O layer, and communication interface layer form.Described application program management layer comprises application programming interfaces and run-time library, described task division and dispatch layer comprise task division module, mapping block and scheduler module, integrated driving and the input and output interface of multiple IP kernel in described driving and I/O layer, described communication interface layer comprises hardware interface, software interface and restructural interface.Tasks carrying model involved in the present invention comprises four-stage: variable allocated phase, task division stage, tasks execution phases and tasks synchronization stage form.Middleware and tasks carrying model in the heterogeneous multi-core reconfigurable commingled system that the present invention proposes, can provide for heterogeneous reconfigurable commingled system the middleware supports such as task division scheduling, thereby improve the execution efficiency of task.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described:
Fig. 1 is the middleware level block diagram in heterogeneous multi-core reconfigurable commingled system of the present invention;
Fig. 2 is the process flow diagram that tasks carrying model involved in the present invention comprises four-stage;
Embodiment
Above-mentioned explanation is only the general introduction of technical solution of the present invention, in order to better understand technological means of the present invention, and can be implemented according to the content of instructions, below with preferred embodiment of the present invention and coordinate accompanying drawing to be described in detail as follows.Below in conjunction with specific embodiment, such scheme is described further.Should be understood that these embodiment are not limited to limit the scope of the invention for the present invention is described.
Embodiment
As shown in Figure 1, for the middleware level block diagram in heterogeneous multi-core reconfigurable commingled system, the present invention relates to middleware and tasks carrying model in a kind of heterogeneous multi-core reconfigurable commingled system, it comprises an application program management layer, task division and dispatch layer, drive and I/O layer, and communication interface layer forms.Described application program management layer comprises application programming interfaces and run-time library, described task division and dispatch layer comprise task division module, mapping block and scheduler module, integrated driving and the input and output interface of multiple IP kernel in described driving and I/O layer, described communication interface layer comprises hardware interface, software interface and restructural interface.
(1) application program management layer
For the execution environment of a task is provided, mainly comprise user's run-time library.These user libraries and be to provide by application programming interface (API) with other kernel library.API shows a high-level abstract view, the inner API being defined that realizes, and user interface will keep a persistence unit, even if reconfigure hardware, this API page remains unchanged.
In addition, analysis module during integrated operation in application program management layer, with monitoring and the anatomy technology of support application program.Application program management layer is supported monitoring and the method for decomposing of traditional application program, comprises analysis of central issue, the internal memory inspection of no initializtion, and dynamic information flow is followed the tracks of, array bounds checking, and soft error inspection operation.The monitoring method in these whens operation, can improve the safety and reliability of system and row able to programme.In addition, the focus obtaining by analysis, can acquisition program the high-frequency part instant heating point code of operation, can be used for instructing IP configuration.
(2) task division and dispatch layer
Task division and dispatching method, before task is sent to IP kernel, the task that determined is moved on which functional unit.Middleware of the present invention is compared with operating system, and the support to via Self-reconfiguration (as Xlinx DPR or SR) is provided, and this makes system have the advantage dynamically reconfiguring when operation.Static nucleus module is to realize separately with reconfiguring module, and wherein only having reconstructed module is to reconfigure when operation, the time overhead of downloading to reduce bit stream.At task division and dispatch layer, reconfigure core library integrated.After IP kernel reconfigures, task need to be repartitioned and dispatch.Therefore, the mapping meeting of task and IP kernel is by real-time update.
For each IP kernel, the execution time of specific tasks, speed-up ratio, area and power consumption etc. is carried out task division by user, to realize the load balancing of system and the handling capacity of Geng Gao.
Because FPGA is a platform that area is limited, different IP kernels are all at the limited hardware resource of contention.The fundamental purpose of task scheduling is to improve platform handling capacity, and the service efficiency of FPGA.
(3) driver and I/O layer
In order to utilize the hardware resource that is integrated in FPGA platform, this layer of main driver of being responsible for integrated peripheral hardware and accumulator system.Conventional driver mainly comprises: interconnection driver is for allowing to transmit data between microprocessor and the application program of IP kernel and control message is undertaken by bus or network-on-chip.File system driver is with visiting local file.Static bit stream and local configuration bit stream are stored in file system.After tasks carrying, result will be returned to a look-at-me, thereby interruptable controller is the main transmission of being responsible for a plurality of task return datas.UART serial ports and timer are mainly responsible for user's debugging.The local memory storage system introduction of each microprocessor.Configuration when reconfigurable controller is responsible for the dynamic restructuring of IP kernel and moves.
(4) communication interface layer
Communication interface layer is responsible for carrying out the data transmission between reconfigurable hardware platform.Platform provides 3 kinds of basic data types: unified software interface (USI), and unified hardware interface (UHI), and unified interface (URI): the USI that reconfigures is mainly used in transmission information between two microprocessors.In USI, comprised serial built-in function.Communication between UHI main users microprocessor and Hardware I P core, and by interruptable controller, detect the interrupt request interconnecting.URI is reconfiguring for the bit stream of IP section only.
Fig. 2 is the process flow diagram that tasks carrying model involved in the present invention comprises four-stage.During a concrete operation, the reconstruct flow example of IP kernel is as follows:
(1) allocated phase of variable
Task list is shown do_T_adder (* in, * out), and * in represents to input the start address of array, and * out represents to export array.For automatic data-detection is relevant, tasks carrying model need to be collected all operations number of each sending of task.But we can only keep limited operand, rather than unlimited user-defined variable (at most of programming models, any operand that user can use them to want).Therefore, the operand of each task needs a list item to distribute.If there is no current variable in this table, variable will be by built-in variable of implicit expression rename.
(2) the task division stage
Before task is sent to computing unit, tasks carrying model must determine the computing unit on task run.We take following strategy in the present invention: if there is idle Hardware I P core, task is sent to hardware, otherwise task will be sent to general processor.
(3) tasks execution phases
Computing unit can automatically start to carry out after receiving all operations number.And return results by interruption.The interrupt request of an interruptable controller testing result is also upgraded task variable.In task execution model, because can return at one time from the possibility of result of different tasks, therefore the strategy that adopts First come first served first to serve is for handling interrupt.
(4) tasks synchronization and submission
Once dispatch service health check-up measures all calculating and has completed unit execution, enters synchronous phase.Tasks carrying model utilizes a grid synchronization mechanism.Each table comprises many computing unit entries.This table tracing task sum and the number of tasks having completed.If both equate, indicate the equal end of run of all tasks, can carry out synchronous.When tasks synchronization, mainly for the data between task are relevant, check, and guarantee that all tasks all return in order.
Above-mentioned example is only explanation technical conceive of the present invention and feature, and its object is to allow person skilled in the art can understand content of the present invention and implement according to this, can not limit the scope of the invention with this.All equivalent transformations that Spirit Essence is done according to the present invention or modification, within all should being encompassed in protection scope of the present invention.
Claims (4)
1. the middleware system in heterogeneous multi-core reconfigurable commingled system, it is characterized in that described middleware system comprises to user provides the task division of the running environment of application program and the application program management layer of DLL (dynamic link library), the division of being responsible for carrying out task, mapping and runtime scheduling and dispatch layer, the integrated driving of multiple IP kernel and the driving of input and output interface and I/O layer and communication interface layer; Application programming interfaces and run-time library that described application program management layer provides application layer to need; Described task division and dispatch layer are divided dispatch deal by task division module, mapping block and scheduler module to task requests; Described driving and I/O layer integrated hardware drive the hardware resource that utilizes FPGA platform; Described communication interface layer is responsible for carrying out the data transmission between reconfigurable hardware platform; Described communication interface layer comprises hardware interface, software interface and restructural interface; Hardware interface is used for the communication between microprocessor and Hardware I P core, and by interruptable controller, detects the interrupt request of interconnection; Software interface is for transmission information between two microprocessors; Restructural interface reconfigures for the bit stream of IP kernel; During described application program management layer integrated operation, analysis module is with monitoring and anatomy application program.
2. a task executing method for the middleware system in heterogeneous multi-core reconfigurable commingled system claimed in claim 1, is characterized in that described method comprised with the next stage:
(1) variable allocated phase: need to carrying out for each of task, obtain its input and output parametric variable, and be saved in storage inside buffering; The operand of each task distributes a list item; If there is no current variable in this table, variable will be by built-in variable of implicit expression rename;
(2) the task division stage: for each task, determine the target computing unit of operation; According to following rule, carry out division task: if there is idle Hardware I P core, task is sent to hardware, otherwise task will be sent to general processor;
(3) tasks execution phases: task is sent to task in the computing unit in commingled system by interconnected core communication mechanism;
(4) the tasks synchronization stage: after tasks carrying is complete, carries out synchronously, and result is returned to user.
3. according to the method for claim 2, while it is characterized in that described method tasks execution phases, by interruption, return to the result of tasks carrying, the tactful handling interrupt requests that adopts First come first served first to serve.
4. according to the method for claim 2, it is characterized in that described method tasks synchronization stage employing grid synchronization mechanism, each table comprises many computing unit entries, this table tracing task sum and the number of tasks having completed; If both equate, indicate the equal end of run of all tasks, can carry out synchronous; When tasks synchronization, mainly for the data between task are relevant, check, and guarantee that all tasks all return in order.
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