CN107301145B - Publish/subscribe formula software bus under FPGA environment based on RapidIO - Google Patents

Publish/subscribe formula software bus under FPGA environment based on RapidIO Download PDF

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CN107301145B
CN107301145B CN201710514094.8A CN201710514094A CN107301145B CN 107301145 B CN107301145 B CN 107301145B CN 201710514094 A CN201710514094 A CN 201710514094A CN 107301145 B CN107301145 B CN 107301145B
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manager module
data
module
rapidio
subject
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CN107301145A (en
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刘湘德
林睿
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CETC 2 Research Institute
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
    • H04L12/4633—Interconnection of networks using encapsulation techniques, e.g. tunneling

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Between Computers (AREA)
  • Computer And Data Communications (AREA)

Abstract

The invention discloses the publish/subscribe formula software bus under a kind of FPGA environment based on RapidIO, specifically include RapidIO communication module, network operation module, Subject Manager module and application component, application component in same FPGA system is correspondingly connected with Subject Manager module, Subject Manager module is correspondingly connected with RapidIO communication module by network operation module, different RapidIO communication modules in different FPGA systems are interconnected by RapidIO communication link, the application component carries out bidirectional data transfers by the Subject Manager module and the network operation module and the RapidIO communication module.The software bus is that the integrated of FPGA system shields complicated RapidIO communication interface；Using the data transmission mechanism of publish/subscribe formula, so that being communicated in a manner of loose coupling between FPGA application component, the flexibility and scalability of FPGA application are significantly improved.

Description

Publish/subscribe formula software bus under FPGA environment based on RapidIO
Technical field
The present invention relates to the publish/subscribe formula software under electronic engineering application, especially FPGA environment based on RapidIO is total Line.
Background technique
FPGA is abundant by the high calculated performance of its hardware concurrent processing capacity, I/O resource, repeats configuration, R&D cycle It is short, at low cost and can be with long term maintenance the advantages of, obtained it extensively in key areas such as aerospace, communication, military affairs Using.RapidIO is uniquely to obtain as a kind of high-performance, the interconnection architecture based on packet-switching of low pin count The embedded interconnection standards of official authorization.Using the interconnection architecture based on RapidIO be between FPGA and FPGA with it is other embedding Enter the inexorable trend that interconnection technique develops between formula equipment.Currently, Altera and Xilinx Liang great FPGA manufacturer is all issued Its configurable soft core of RapidIO IP.In FPGA then use uses manufacturer firstly the need of purchase RapidIO IP kernel Provided example chemical industry tool (the Core Generator of such as Xilinx) customizes satisfactory IP kernel, is finally applied to oneself In logical design.Its typical application scenarios, by simply handling, is passed through using after FPGA system acquisition data RapidIO high-speed bus conveys data to successive stage and is further processed.
It is found in the development process of FPGA system, due to applied system design ways and means more bottom under FPGA architecture Layer, interface used by each application system with apply logic directly corresponding, cause its interface quantity numerous and with the close coupling of hardware It closes, the interface and data lattice for being adapted to isomery is often faced with when integrated with other embedded systems (such as FPGA, PowerPC) The problem of formula, brings huge workload and technical difficulty to the system integration.In addition, FPGA system exploitation needs to understand in depth Transport protocol (such as RapidIO) could use corresponding IP kernel, and the developer for leading to application system wastes great effort and goes to learn Proprietary transport protocol substantially increases the development cycle of FPGA application system.
Summary of the invention
The technical problems to be solved by the present invention are: in view of the above problems, providing a kind of collection for FPGA system At the hair based on RapidIO under the FPGA environment that the flexibility for shielding complicated RapidIO communication interface is high, scalability is good Cloth/subscription formula software bus.
The technical solution adopted by the invention is as follows:
Publish/subscribe formula software bus under FPGA environment based on RapidIO, specifically includes RapidIO communication module, net Network operation module, Subject Manager module and application component, the application component in same FPGA system are correspondingly connected with Subject Manager mould Block, Subject Manager module are correspondingly connected with RapidIO communication module by network operation module, the difference in different FPGA systems RapidIO communication module is interconnected by RapidIO communication link, and the application component passes through the Subject Manager module and described Network operation module and the RapidIO communication module carry out bidirectional data transfers.
Further, locally applied component send data process comprising steps of
Data to be sent are passed to Subject Manager module by (1-1) locally applied component；
(1-2) Subject Manager module is packaged the data received, and the message after encapsulation is sent to network behaviour Make module；
(1-3) network operation module initiates data transfer request to bottom RapidIO communication module；
The transmission request of (1-4) RapidIO communication module response data, and the message received from network operation module is sent out Send the RapidIO communication module of FPGA system where to specified reception application component.
Further, receive the process of data that remote application component is sent comprising steps of
The message received from other FPGA systems is passed to network operation module by (2-1) RapidIO communication module；
(2-2) network operation module separates payload message from the message received, and by payload message It is transmitted to Subject Manager module；
(2-3) Subject Manager module parses the payload message received, and by payload text delivery To specified reception application component.
Further, the Subject Manager module is also used for the registration information and theme of application component in entire FPGA system The management of publish/subscribe information.
Further, the registration information includes component register and cancellation component register, the theme publish/subscribe information It subscribed to including theme, cancel theme subscription, theme publication and cancel theme publication.
Further, after the component register request of Subject Manager module response application component, which can pass through master Topic management module carries out data transmission；After the cancellation component register request of Subject Manager module response application component, this applies group Part cannot be carried out data transmission by Subject Manager module.
Further, after the theme of Subject Manager module response application component subscribes to request, which can be received The subject data that Subject Manager module is sent；It, should after the cancellation theme of Subject Manager module response application component subscribes to request Application component cannot receive the subject data of Subject Manager module transmission.
Further, after the theme posting request of Subject Manager module response application component, which can pass through Subject Manager module sends the subject data；After the cancellation theme posting request of Subject Manager module response application component, this is answered The subject data cannot be sent by Subject Manager module with component.
Further, before locally applied component sends data, Subject Manager module first verifies that whether the application component has There are the qualification that data are sent by Subject Manager module, when the sent out data of locally applied component are the theme data, Subject Manager Module also needs to verify whether the application component has the qualification for sending the subject data by Subject Manager module.
Further, before receiving the data that remote application component is sent, Subject Manager module first verifies that specified reception Whether application component has the qualification that data are received by Subject Manager module, when the sent out data of remote application component are the theme number According to when, Subject Manager module also need to verify it is specified receive application component and whether have the number of topics is received by Subject Manager module According to qualification.
In conclusion by adopting the above-described technical solution, being FPGA system the beneficial effects of the invention are as follows (1) present invention It is integrated shield complicated RapidIO communication interface so that developer goes study RapidIO communication without wasting great effort Agreement greatly improves the integrated efficiency of FPGA system.(2) present invention uses the data transmission mechanism of publish/subscribe formula, makes Communicated in a manner of loose coupling between FPGA application component, significantly improve the flexibility of FPGA application and expansible Property.
Detailed description of the invention
Examples of the present invention will be described by way of reference to the accompanying drawings, in which:
Fig. 1 is the publish/subscribe formula software bus structure based on RapidIO under FPGA environment provided in an embodiment of the present invention Figure.
Specific embodiment
All features disclosed in this specification or disclosed all methods or in the process the step of, in addition to mutually exclusive Feature and/or step other than, can combine in any way.
Any feature disclosed in this specification unless specifically stated can be equivalent or with similar purpose by other Alternative features are replaced.That is, unless specifically stated, each feature is an example in a series of equivalent or similar characteristics .
Fig. 1 is the publish/subscribe formula software bus structure based on RapidIO under FPGA environment provided in an embodiment of the present invention Figure, as shown in Figure 1, the publish/subscribe formula software bus under FPGA environment based on RapidIO, specifically includes RapidIO communication mould Block, network operation module, Subject Manager module and application component, the application component in same FPGA system are correspondingly connected with theme pipe Module is managed, Subject Manager module is correspondingly connected with RapidIO communication module by network operation module, in different FPGA systems not It is interconnected with RapidIO communication module by RapidIO communication link, the application component passes through the Subject Manager module and institute It states network operation module and the RapidIO communication module carries out bidirectional data transfers.
Locally applied component send the process of data comprising steps of
Data to be sent are passed to Subject Manager module by (1-1) locally applied component；
(1-2) Subject Manager module is packaged the data received, and the message after encapsulation is sent to network behaviour Make module；
Subject Manager module includes being packaged according to customized message format to data to the mode that data are packaged. Message is the data cell exchanged in network with transmission, the i.e. data that disposably send of website.
(1-3) network operation module sends data transfer request to bottom RapidIO communication module；
Network operation module according to the RapidIO interface that bottom RapidIO communication module provides be the theme management module hair The each data message come initiates data transfer request.As middle layer, the management module that is the theme shields network operation module The interface details of RapidIO allow Subject Manager module to focus on the processing of publish/subscribe logic, without paying close attention to bottom The realization of layer transport protocol.
The transmission request of (1-4) RapidIO communication module response data, and the message received from network operation module is sent out Send the RapidIO communication module of FPGA system where to specified reception application component.
The RapidIO communication module of different FPGA systems is carried out data transmission by RapidIO communication link, to realize Data communication between the application component of different FPGA systems.
Receive the process of data that remote application component is sent comprising steps of
The message received from other FPGA systems is passed to network operation module by (2-1) RapidIO communication module；
(2-2) network operation module separates payload message from the message received, and by payload message It is transmitted to Subject Manager module；
(2-3) Subject Manager module parses the payload message received, and by payload text delivery To specified reception application component.
The Subject Manager module is also used for the registration information of application component and theme publish/subscribe in entire FPGA system The management of information.The registration information includes component register and cancels component register, and the theme publish/subscribe information includes master Topic subscribes to, cancels theme subscription, theme publication and cancel theme publication.
After the component register request of Subject Manager module response application component, which can pass through Subject Manager module Carry out data transmission；After the cancellation component register request of Subject Manager module response application component, which cannot pass through Subject Manager module carries out data transmission；After the theme of Subject Manager module response application component subscribes to request, the application component The subject data of Subject Manager module transmission can be received；The cancellation theme subscription of Subject Manager module response application component is asked After asking, which cannot receive the subject data of Subject Manager module transmission；Subject Manager module response application component Theme posting request after, which can send the subject data by Subject Manager module；Subject Manager module is rung After the cancellation theme posting request for answering application component, which cannot send the subject data by Subject Manager module.
Software bus based on RapidIO uses publish/subscribe formula data transmission mechanism, so that FPGA system application component Between communicated in a manner of loose coupling, significantly improve FPGA system application flexibility and scalability.
Optimally, before locally applied component sends data, Subject Manager module first verifies that whether the application component has The qualification that data are sent by Subject Manager module, when the sent out data of locally applied component are the theme data, Subject Manager mould Block also needs to verify whether the application component has the qualification for sending the subject data by Subject Manager module.
Optimally, before receiving the data that remote application component is sent, Subject Manager module first verifies that specified receive is answered Whether there is the qualification that data are received by Subject Manager module with component, when the sent out data of remote application component are the theme data When, Subject Manager module also need to verify it is specified receive application component and whether have the subject data is received by Subject Manager module Qualification.
The invention is not limited to specific embodiments above-mentioned.The present invention, which expands to, any in the present specification to be disclosed New feature or any new combination, and disclose any new method or process the step of or any new combination.

Claims (8)

  1. Publish/subscribe formula software bus under 1.FPGA environment based on RapidIO, it is characterised in that communicate mould including RapidIO Block, network operation module, Subject Manager module and application component, the application component in same FPGA system are correspondingly connected with theme pipe Module is managed, Subject Manager module is correspondingly connected with RapidIO communication module by network operation module, in different FPGA systems not It is interconnected with RapidIO communication module by RapidIO communication link, the application component passes through the Subject Manager module and institute It states network operation module and the RapidIO communication module carries out bidirectional data transfers；
    Locally applied component send the process of data comprising steps of
    Data to be sent are passed to Subject Manager module by (1-1) locally applied component；
    (1-2) Subject Manager module is packaged the data received, and the message after encapsulation is sent to network operation mould Block；
    (1-3) network operation module initiates data transfer request to bottom RapidIO communication module；
    The transmission request of (1-4) RapidIO communication module response data, and the message received from network operation module is sent to The specified RapidIO communication module for receiving application component place FPGA system；
    Receive the process of data that remote application component is sent comprising steps of
    The message received from other FPGA systems is passed to network operation module by (2-1) RapidIO communication module；
    (2-2) network operation module separates payload message from the message received, and payload message is forwarded Give Subject Manager module；
    (2-3) Subject Manager module parses the payload message received, and by payload text delivery to finger Surely application component is received.
  2. 2. the publish/subscribe formula software bus under FPGA environment according to claim 1 based on RapidIO, feature exist In the Subject Manager module is also used for the registration information of application component and theme publish/subscribe information in entire FPGA system Management.
  3. 3. the publish/subscribe formula software bus under FPGA environment according to claim 2 based on RapidIO, feature exist Include component register in, the registration information and cancel component register, the theme publish/subscribe information include theme subscribe to, Cancel theme subscription, theme publication and cancels theme publication.
  4. 4. the publish/subscribe formula software bus under FPGA environment according to claim 3 based on RapidIO, feature exist In after the component register request of Subject Manager module response application component, which can be carried out by Subject Manager module Data transmission；After the cancellation component register request of Subject Manager module response application component, which cannot pass through theme Management module carries out data transmission.
  5. 5. the publish/subscribe formula software bus under FPGA environment according to claim 3 based on RapidIO, feature exist In after the theme of Subject Manager module response application component subscribes to request, which can receive Subject Manager module hair The subject data sent；After the cancellation theme of Subject Manager module response application component subscribes to request, which cannot be connect Receive the subject data that Subject Manager module is sent.
  6. 6. the publish/subscribe formula software bus under FPGA environment according to claim 3 based on RapidIO, feature exist In after the theme posting request of Subject Manager module response application component, which can be sent out by Subject Manager module Give the subject data；After the cancellation theme posting request of Subject Manager module response application component, which cannot pass through Subject Manager module sends the subject data.
  7. 7. the publish/subscribe formula software bus under FPGA environment according to claim 1 based on RapidIO, feature exist In before locally applied component sends data, Subject Manager module first verifies that whether the application component has and passes through Subject Manager Module sends the qualification of data, and when the sent out data of locally applied component are the theme data, Subject Manager module also needs verifying should Whether application component has the qualification that the subject data is sent by Subject Manager module.
  8. 8. the publish/subscribe formula software bus under FPGA environment according to claim 1 based on RapidIO, feature exist In before receiving the data that remote application component is sent, Subject Manager module first verifies that whether specified reception application component has There are the qualification that data are received by Subject Manager module, when the sent out data of remote application component are the theme data, Subject Manager Module also needs to verify whether specified reception application component has the qualification for receiving the subject data by Subject Manager module.
CN201710514094.8A 2017-06-29 2017-06-29 Publish/subscribe formula software bus under FPGA environment based on RapidIO Active CN107301145B (en)

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CN110659227B (en) * 2019-10-10 2020-10-02 北京机电工程研究所 Automatic subscription method for data bus of unmanned intelligent equipment
CN112738190B (en) * 2020-12-24 2022-06-17 湖南博匠信息科技有限公司 RapidIO communication dynamic management method and system

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