CN102497244B - Stimulant clock recovery method - Google Patents
Stimulant clock recovery method Download PDFInfo
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- CN102497244B CN102497244B CN201110424455.2A CN201110424455A CN102497244B CN 102497244 B CN102497244 B CN 102497244B CN 201110424455 A CN201110424455 A CN 201110424455A CN 102497244 B CN102497244 B CN 102497244B
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Abstract
The invention provides a stimulant clock recovery method. The method can simulate the recovery of clock frequency and phase according to clock frequency difference and phase difference which are calculated through the clock regulation algorithm of the IEEE1588 protocol, so as to realize clock recovery on a device incapable in hardware clock recovery; the time of the local clock is acquired through integer calculation, and the problem of low calculation precision of floating number is avoided; the recovery time of the local clock is determined, and then accumulates the time for carrying out the method, so as to improve the time precision; and further time with microsecond precision is provided, after the recovery of the local clock, the time is acquired by the integer calculation, the problem of low calculation precision of the floating number is avoided, the recovery time of the local clock is determined, and then accumulates the time for carrying out the method, so as to improve the time precision.
Description
Technical field
The present invention relates to Network Synchronization clock field, relate in particular to a kind of clock recovery method of simulation.
Background technology
Tradition clock synchronous refers to will be the clock synchronous that is distributed in various places, will keep exactly in simple terms the frequency between clock identical with phase place.Clock synchronous is all widely used in a lot of fields, and the accurate industry of seeking time is wanted in such as Industry Control, automated production, measurement etc.At present, along with the IPization gradually of network, the clock synchronous ability of packet network obtains people's attention gradually.Mainly contain two aspects: the one, packet network can carry TDM (time division multiplexing) business, and the mechanism of TDM service clock recovery is provided, and makes TDM business after packet network, still meet certain performance index passing through; The 2nd,, packet network can be as TDM network, and high-precision network reference clock is provided, to meet the synchronisation requirement of network node or terminal.Now there are several agreements that can realize clock synchronous, such as ntp agreement, IEEE1588 agreement etc.Wherein the time precision of ntp agreement is Millisecond, and the time precision of IEEE1588 agreement is nanosecond.So IEEE1588 agreement is because the superiority of its precision was applied by wide model in recent years.
IEEE1588 agreement itself has taken into full account propagation delay time and the processing time of message in design, and depend on hardware and obtain the transmission of message and time of reception stamp, the propagation delay time of message is minimized, thereby calculate master-salve clock difference on the frequency f and phase difference p between equipment, and then adjust local clock, i.e. clock adjustment algorithm.Therefore, IEEE1588 agreement is had relatively high expectations for hardware, and it finally will recover frequency and the phase place of local clock.Generally can be by revising frequency and the phase place from clock hardware equipment local clock, still, not all hardware equipment all supports to revise frequency and the phase place of local clock.Therefore,, for the equipment that does not possess hardware clock recovery capability, realizing its clock synchronous is problem demanding prompt solution.
Summary of the invention
The invention provides a kind of clock recovery method of simulation, IEEE1588 agreement can be realized on the equipment that does not possess hardware clock recovery capability, and reach the time of Microsecond grade for other application protocols on this equipment provide a clock accuracy.
The technological means that the present invention adopts is as follows: a kind of clock recovery method of simulation, comprising:
Parameter acquiring step, obtains local hardware clock lapse of time t
pass, local clock is last after recovering time t
adj_i-1, local clock is last after recovering frequency retrieval value f
adj_i-1, the adjustment coefficient C that obtained by the frequency ratio of local clock and master clock and obtain the poor f of clock frequency by clock adjustment algorithm
_ iwith phase difference p;
Calculate local clock and recover rear time t
nowstep, the time t after the time after described local clock recovers, to be that local clock is last recovered
adj_i-1add local hardware clock lapse of time t
passwith the product of described adjustment coefficient C, then with phase difference p sum.
Further, described parameter acquiring step also comprises:
Obtain the time t of local hardware clock
localhardware time t while recovery with the last time
hard, according to (t
local-t
hard) obtain local clock hardware lapse of time t
pass.
Further, the adjustment coefficient C being obtained by the frequency ratio of local clock and master clock, is by (1+f
adj_i-1/ 10
9) or (10
9+ f
adj_i-1)/10
9obtain.
Further, calculating local clock recovers also to include after the rear time:
Renewal frequency skew integer value f
adj_istep, the frequency retrieval value f that local clock is last after recovering
adj_i-1, with the poor f of this clock frequency
_ icumulative;
Upgrade the time t after recovering
adj_istep, time t after recovering by this definite local clock
nowsave as the time after recovery;
Upgrade the hardware time t while recovery
hardstep, by the local clock time t of this acquisition
localsave as the hardware time after recovery.
Further, the time t after described definite local clock recovery
nowstep in also comprise the cumulative step of carrying out this algorithm compensation value.
Further, described offset comprises the parameter acquiring step time of implementation, determines time of implementation and the cumulative phase difference p of the time that local clock should pass by and local clock is last after recovering time t
adj_i-1time of implementation.
Further, carry out local clock recovery every predetermined time, calculate and recover rear time t
nowstep.
Further, f when first adjustment is calculated
adj_i-1and t
adj_i-1be zero.
Based on this, clock recovery method and the hardware clock of a kind of simulation provided by the invention are used in conjunction with, poor and the phase difference of the clock frequency calculated according to the clock adjustment algorithm of IEEE1588 agreement, the recovery of simulated clock simulation clock frequency and phase place, to realize clock recovery on the equipment not possessing hardware clock recovery capability; And obtain the time after local clock recovers by integer calculations, avoid the problem that floating number computational accuracy is not high, and the manner of execution required time that adds up in the time of the time of determining after local clock recovers, further improve time precision, and then provide a clock accuracy to reach the time of Microsecond grade, meet the application of upper-layer protocol, for example OAM agreement based on business etc.
Brief description of the drawings
Fig. 1 is the clock recovery method schematic flow sheet that the present invention simulates.
Embodiment
Below in conjunction with accompanying drawing, principle of the present invention and feature are described, example, only for explaining the present invention, is not intended to limit scope of the present invention.
The present invention carries out based on following design:
In IEEE1588 network, according to mutual message, finally can calculate master clock and from the time difference offset between clock and path delay delay, then by existing clock adjustment algorithm, calculate current master clock and from the difference on the frequency f between clock
_ iwith phase difference p, according to the difference on the frequency fi (ppb of unit, part per billion) first make to reach consistent from the frequency of clock and the frequency of master clock with phase difference p (unit nanosecond), then the time from clock and the time of master clock are reached to consistent, performance namely the TOD time deviation of two clocks in nanosecond.
While carrying out clock recovery, obtainable physical quantity comprises:
F
_ i, represent difference on the frequency (ppb of unit), represent i secondary frequencies recovery value;
P, represents phase difference (unit nanosecond);
T
local, represent local hardware clock (unit nanosecond);
The physical quantity that need to calculate comprises:
T
now, the time (unit nanosecond) after the recovery that represents to adjust through software simulation;
Intermediate variable comprises:
T
pass, represent local hardware clock lapse of time;
C, the adjustment coefficient C that the frequency ratio of expression local clock and master clock obtains;
F
adj_i-1, represent the current frequency retrieval integer value of having adjusted;
T
adj_i-1, represent the adjustment time after last recovery;
T
hard, the hardware time while representing last recovery;
The fundamental formular of clock recovery is as follows:
T
now=t
adj_i-1+ t
pass* C+p; (formula 1)
T
pass=t
local-t
hard(formula 2)
C=(1+f
adj_i-1/ 10
9) or, C=(10
9+ f
adj_i-1)/10
9(formula 3)
F
adj_i=f
adj_i-1+ f
_ i; (formula 4)
T
adj-i=t
now; (formula 5)
T
hard=t
local(formula 6)
While carrying out computing due to computer, f
adj_i-1it is decimal that integer value can cause final result divided by 1,000,000,000, and the floating number computational accuracy of equipment is be not as high as integer calculations computational accuracy, so can revise formula is:
T
now=t
adj_i-1+ (t
local-t
hard) * (10
9+ f
adj_i-1)/10
9+ p; (formula 7)
By clock recovery formula, calculate current master clock and from the difference on the frequency pin phase difference p between clock.Wherein, difference on the frequency f
_ ibe signed integer value, unit is ppb, if f
_ ifor positive number represents that local clock frequency is slow, per secondly need to walk than in the past f more
_ ins; Otherwise represent that the frequency of local clock is fast, per secondly need to lack to walk than in the past f
_ ins.Phase difference p is also signed number, and unit is ns, represents that the local time, than slow pns of the time of master clock, need to increase pns by local zone time if p is positive number; Otherwise represent that the local time, than slow pns of the time of master clock, need to reduce pns by local zone time.
Based on above design, the clock recovery method of a kind of simulation provided by the invention, comprising:
Parameter acquiring step, obtains local hardware clock lapse of time t
pass, local clock is last after recovering time t
adj_i-1, local clock is last after recovering frequency retrieval value f
adj_i-1, the adjustment coefficient C that obtained by the frequency ratio of local clock and master clock and obtain the poor f of clock frequency by clock adjustment algorithm
_ iwith phase difference p;
Calculate local clock and recover rear time t
nowstep, the time t after the time after described local clock recovers, to be that local clock is last recovered
adj_i-1add local hardware clock lapse of time t
passwith the product of described adjustment coefficient C, then with phase difference p sum
As the embodiment of the inventive method, as shown in Figure 1 flow process:
Step S301: the time t that reads local clock
local, and obtain the time t after last recovery
adj-i, hardware time t when last recovery
hard, according to (t
local-t
hard) obtain local clock hardware lapse of time t
pass, and obtain the frequency retrieval value f after the last recovery of local clock
adj_i-1, the adjustment coefficient C that obtained by the frequency ratio of local clock and master clock and obtain the poor f of clock frequency by clock adjustment algorithm
_ iwith phase difference p; Wherein, the adjustment coefficient C that the frequency ratio of local clock and master clock obtains, is by (1+f
ddj_i-1/ 10
9) or (10
9+ f
adj_i-1)/10
9obtain;
Step S302: calculate the time after local clock recovers according to formula 1 or 7.Obtain local clock hardware lapse of time t
passand adjust after coefficient C, calculate interior local clock should be passed by during this period of time second value, i.e. (t
local-t
hard) * (1+f
adj_i-1/ 10
9) or (t
local-t
hard) * (10
9+ f
adj_i-1)/10
9; Secondly, this period is added to the time after recovered last time, obtained like this time after local clock recovers; Finally add the phase value of this adjustment, obtain final local zone time; As preferably, use formula 7 to calculate the time after local clock recovers, the floating number computational accuracy of having avoided equipment and the time error brought high not as integer calculations computational accuracy.
Step S303: renewal frequency recovery value, the frequency retrieval value of accumulative total and this frequency retrieval value are cumulative in the past, represent from current time, and local clock should move according to the frequency of recovering, i.e. f
adi_i=f
adj_i-1+ f
_ i;
Step S304: upgrade the time after recovered last time, the time calculating by this saves as recovery time last time, t
adj-i=t
now
Step S305: upgrade the hardware time of last time while recovering, the time calculating by this saves as recovery time last time, for the calculating t of recovered clock next time
hard=t
local.
In the present embodiment, consider time precision, use the method recovered clock of simulation, need to consider to carry out the time of implementation of the method.As preferably, in step S302, while calculating the time after local clock recovers, need cumulative comprise the parameter acquiring step time of implementation, determine the time of implementation of time and the time t of cumulative phase difference p and local clock that local clock should be passed by
localthe offset of time of implementation, to improve time precision, wherein, determining of offset can obtain by operating analysis, according to preferably 90 microseconds of experiment offset.
As preferably, carry out local clock recovery every predetermined time, calculate and recover rear time t
nowstep.Wherein, f when first adjustment is calculated
adj_i-1and t
adj_i-1be zero.
While obtaining the time after local clock recovers, it is 0 that the value of difference on the frequency f and phase difference p is given, and can obtain by the time of the frequency operation after replying according to said method flow process.
With technological means of the present invention, according to experiment test, the difference on the frequency of master-salve clock finally can be adjusted to 7ppb.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any amendment of making, be equal to replacement, improvement etc., within all should being included in the scope of protection of the invention.
Claims (6)
1. a clock recovery method for simulation, comprising:
Parameter acquiring step, obtains local hardware clock lapse of time t
pass, local clock is last after recovering time t
adj_i-1, local clock is last after recovering frequency retrieval value f
adj_i-1, the adjustment coefficient C that obtained by the frequency ratio of local clock and master clock and obtain the poor f of clock frequency by clock adjustment algorithm
_ iwith phase difference p;
Calculate local clock and recover rear time t
nowstep, the time t after the time after described local clock recovers, to be that local clock is last recovered
adj_i-1add local hardware clock lapse of time t
passwith the product of described adjustment coefficient C, then with phase difference p sum;
Described parameter acquiring step also comprises:
Obtain the time t of local hardware clock
localhardware time t while recovery with the last time
hard, according to (t
local-t
hard) obtain local clock hardware lapse of time t
pass;
The adjustment coefficient C being obtained by the frequency ratio of local clock and master clock is by (1+f
adj_i-1/ 10
9) or (10
9+ f
adj_i-1)/10
9obtain.
2. method according to claim 1, is characterized in that, calculates local clock and recovers also to include after the rear time:
Renewal frequency skew integer value f
adj_istep, the frequency retrieval value f that local clock is last after recovering
adj_i-1, with the poor f of this clock frequency
_ icumulative;
Upgrade the time t after recovering
adj_istep, time t after recovering by this definite local clock
nowsave as the time after recovery;
Upgrade the hardware time t while recovery
hardstep, by the local clock time t of this acquisition
localsave as the hardware time after recovery.
3. method according to claim 1, is characterized in that, the time t after described definite local clock recovers
nowstep in also comprise the cumulative step of carrying out this algorithm compensation value.
4. method according to claim 3, is characterized in that, the time t that described offset comprises the parameter acquiring step time of implementation, determine time of implementation and the cumulative phase difference p of the time that local clock should pass by and local clock is last after recovering
adj_i-1time of implementation.
5. according to the method described in claim 1 to 4 any one, it is characterized in that, carry out local clock recovery every predetermined time, calculate and recover rear time t
nowstep.
6. method according to claim 1, is characterized in that, f when first adjustment is calculated
adj_i-1and t
adj_i-1be zero.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110424455.2A CN102497244B (en) | 2011-12-16 | 2011-12-16 | Stimulant clock recovery method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110424455.2A CN102497244B (en) | 2011-12-16 | 2011-12-16 | Stimulant clock recovery method |
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| CN102497244B true CN102497244B (en) | 2014-09-17 |
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| CN105680975B (en) * | 2016-03-07 | 2018-06-15 | 浙江大学 | A kind of method for synchronizing time of host-guest architecture multinode network |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101064593A (en) * | 2006-04-29 | 2007-10-31 | 北京三星通信技术研究有限公司 | Method for improving inter-multistage equipment time synchronization frequency compensation method |
| CN101222288A (en) * | 2008-02-01 | 2008-07-16 | 华为技术有限公司 | IP network transmission method, system and equipment automatically adapting network jitter |
| CN101227246A (en) * | 2008-01-28 | 2008-07-23 | 中兴通讯股份有限公司 | Method and apparatus for master-salve clock synchronization |
-
2011
- 2011-12-16 CN CN201110424455.2A patent/CN102497244B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101064593A (en) * | 2006-04-29 | 2007-10-31 | 北京三星通信技术研究有限公司 | Method for improving inter-multistage equipment time synchronization frequency compensation method |
| CN101227246A (en) * | 2008-01-28 | 2008-07-23 | 中兴通讯股份有限公司 | Method and apparatus for master-salve clock synchronization |
| CN101222288A (en) * | 2008-02-01 | 2008-07-16 | 华为技术有限公司 | IP network transmission method, system and equipment automatically adapting network jitter |
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