CN102497244A - Stimulant clock recovery method - Google Patents
Stimulant clock recovery method Download PDFInfo
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- CN102497244A CN102497244A CN2011104244552A CN201110424455A CN102497244A CN 102497244 A CN102497244 A CN 102497244A CN 2011104244552 A CN2011104244552 A CN 2011104244552A CN 201110424455 A CN201110424455 A CN 201110424455A CN 102497244 A CN102497244 A CN 102497244A
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Abstract
The invention provides a stimulant clock recovery method. The method can simulate the recovery of clock frequency and phase according to clock frequency difference and phase difference which are calculated through the clock regulation algorithm of the IEEE1588 protocol, so as to realize clock recovery on a device incapable in hardware clock recovery; the time of the local clock is acquired through integer calculation, and the problem of low calculation precision of floating number is avoided; the recovery time of the local clock is determined, and then accumulates the time for carrying out the method, so as to improve the time precision; and further time with microsecond precision is provided, after the recovery of the local clock, the time is acquired by the integer calculation, the problem of low calculation precision of the floating number is avoided, the recovery time of the local clock is determined, and then accumulates the time for carrying out the method, so as to improve the time precision.
Description
Technical field
The present invention relates to Network Synchronization clock field, relate in particular to a kind of clock recovery method of simulation.
Background technology
The tradition clock synchronization is meant and will will keeps the clock synchronization that is distributed in various places the frequency between the clock identical with phase place in simple terms exactly.Clock synchronization all is widely used in a lot of fields, and for example the accurate industry of seeking time is wanted in Industry Control, automated production, measurement etc.At present, along with the IPization gradually of network, the clock synchronization ability of packet network obtains people's attention gradually.Mainly contain two aspects: the one, packet network can carry TDM (time division multiplexing) business, and the mechanism of TDM service clock recovery is provided, and makes the TDM business after passing through packet network, still satisfy certain performance index; The 2nd,, packet network can provide high-precision network reference clock as the TDM network, to satisfy the synchronisation requirement at network node or terminal.Several kinds of agreements that can realize clock synchronization, for example ntp agreement, IEEE1588 agreement etc. have been arranged now.Wherein the time precision of ntp agreement is a Millisecond, and the time precision of IEEE1588 agreement is a nanosecond.So the IEEE1588 agreement is owing to the superiority of its precision is used by wide model in recent years.
This has taken into full account the propagation delay time and the processing time of message the IEEE1588 agreement in design; And depend on transmission and time of reception stamp that hardware obtains message; The propagation delay time of message is minimized; Thereby calculate principal and subordinate's clock frequency difference f and phase difference p between the equipment, and then adjust local clock, be i.e. the clock adjustment algorithm.Therefore, the IEEE1588 agreement is had relatively high expectations for hardware, and it finally will recover the frequency and the phase place of local clock.Can still, be not frequency and the phase place that all hardware equipment all supports to revise local clock generally through revising frequency and phase place from clock hardware equipment local clock.Therefore, for the equipment that does not possess the hardware clock recovery capability, realize that its clock synchronization is a problem demanding prompt solution.
Summary of the invention
The invention provides a kind of clock recovery method of simulation, make the IEEE1588 agreement on the equipment that does not possess the hardware clock recovery capability, to realize, and provide a clock accuracy to reach the time of microsecond level for other application protocols on this equipment.
The technological means that the present invention adopts is following: a kind of clock recovery method of simulation comprises:
The parameter acquiring step is obtained local hardware clock lapse of time t
Pass, local clock is last after recovering time t
Adj_i-1, local clock is last after recovering frequency retrieval value f
Adj_i-1, the adjustment coefficient C that obtains by the frequency ratio of local clock and master clock and obtain clock frequency difference f through the clock adjustment algorithm
_ iWith phase difference p;
Calculate local clock and recover back time t
NowStep, the time t after the time after said local clock recovers, to be that local clock is last recovered
Adj_i-1Add local hardware clock lapse of time t
PassWith the product of said adjustment coefficient C, again with phase difference p sum.
Further, said parameter acquiring step also comprises:
Obtain the time t of local hardware clock
LocalHardware time t when recovering with the last time
Hard, according to (t
Local-t
Hard) obtain local clock hardware lapse of time t
Pass
Further, by the adjustment coefficient C that the frequency ratio of local clock and master clock obtains, be through (1+f
Adj_i-1/ 10
9) perhaps (10
9+ f
Adj_i-1)/10
9Obtain.
Further, calculating local clock recovers also to include after the time of back:
Renewal frequency skew integer value f
Adj_iStep, the frequency retrieval value f that local clock is last after recovering
Adj_i-1, with this clock frequency difference f
_ iAdd up;
Upgrade the time t after recovering
Adj_iStep, be about to this local clock of confirming and recover back time t
NowSave as the time after the recovery;
Upgrade the hardware time t when recovering
HardStep, be about to the local clock time t of this acquisition
LocalSave as the hardware time after the recovery.
Further, the time t after said definite local clock recovers
NowStep in also comprise adding up and carry out the step of this algorithm compensation value.
Further, said offset comprises the parameter acquiring step time of implementation, confirms the time of implementation of the time that local clock should be passed by and add up phase difference p and local clock are last after recovering time t
Adj_i-1Time of implementation.
Further, every separated preset time carries out local clock and recovers, and calculates and recovers back time t
NowStep.
F when further, first adjustment is calculated
Adj_i-1And t
Adj_i-1Be zero.
Based on this; The clock recovery method and the hardware clock of a kind of simulation provided by the invention are used; The clock frequency difference and the phase difference that calculate according to the clock adjustment algorithm of IEEE1588 agreement; The recovery of simulated clock simulation clock frequency and phase place is to realize clock recovery on the equipment that does not possess the hardware clock recovery capability; And obtain the time after local clock recovers through integer calculations; Avoid the not high problem of floating number computational accuracy; And the manner of execution required time that when the time of confirming after local clock recovers, adds up, further improve time precision, and then provide a clock accuracy to reach the time of microsecond level; Satisfy the application of upper-layer protocol, for example based on OAM agreement of business etc.
Description of drawings
Fig. 1 is the clock recovery method schematic flow sheet of the present invention's simulation.
Embodiment
Below in conjunction with accompanying drawing principle of the present invention and characteristic are described, institute gives an actual example and only is used to explain the present invention, is not to be used to limit scope of the present invention.
The present invention is based on that following design carries out:
In the IEEE1588 network, according to mutual message, finally can calculate master clock and from the time difference offset between the clock and path delay delay, then through existing clock adjustment algorithm, calculate present master clock and from the difference on the frequency f between the clock
_ iWith phase difference p; According to the difference on the frequency fi (ppb of unit; Part per billion) make earlier from the frequency of clock with phase difference p (unit nanosecond) and reach consistent with the frequency of master clock; To reach consistent with the time of master clock from the time of clock then, performance just the TOD time deviation of two clocks in nanosecond.
Obtainable physical quantity comprises when carrying out clock recovery:
f
_ i, expression difference on the frequency (ppb of unit) is represented i secondary frequencies recovery value;
P, expression phase difference (unit nanosecond);
t
Local, expression local hardware clock (unit nanosecond);
The physical quantity that need calculate comprises:
t
Now, the time (unit nanosecond) after the recovery of expression process software simulation adjustment;
Intermediate variable comprises:
t
Pass, expression local hardware clock lapse of time;
C, the adjustment coefficient C that the frequency ratio of expression local clock and master clock obtains;
f
Adj_i-1, represent the current frequency retrieval integer value of having adjusted;
t
Adj_i-1, the adjustment time after the last recovery of expression;
t
Hard, the hardware time when the expression last time recovers;
The fundamental formular of clock recovery is following:
t
Now=t
Adj_i-1+ t
Pass* C+p; (formula 1)
t
Pass=t
Local-t
Hard(formula 2)
C=(1+f
Adj_i-1/ 10
9) or, C=(10
9+ f
Adj_i-1)/10
9(formula 3)
f
Adj_i=f
Adj_i-1+ f
_ i(formula 4)
t
Adj-i=t
Now(formula 5)
t
Hard=t
Local(formula 6)
Since when computer carries out computing, f
Adj_i-1Integer value can cause final result to be decimal divided by 1,000,000,000, and the floating number computational accuracy of equipment is high not as the integer calculations computational accuracy, so can revise formula is:
t
Now=t
Adj_i-1+ (t
Local-t
Hard) * (10
9+ f
Adj_i-1)/10
9+ p; (formula 7)
Through the clock recovery formula, calculate present master clock and from the difference on the frequency pin phase difference p between the clock.Wherein, difference on the frequency f
_ iBe the signed integer value, unit is ppb, if f
_ iFor positive number representes that the local clock frequency is slow, per second need be than walk f in the past moreed
_ iNs; Otherwise the frequency of expression local clock is fast, and per second need lack to walk f than in the past
_ iNs.Phase difference p also is a signed number, and unit is ns, is the slow pns of time that positive number is represented local time ratio master clock as if p, need local zone time be increased pns; Otherwise the slow pns of time of the time ratio master clock that expression is local need reduce pns with local zone time.
Based on above design, the clock recovery method of a kind of simulation provided by the invention comprises:
The parameter acquiring step is obtained local hardware clock lapse of time t
Pass, local clock is last after recovering time t
Adj_i-1, local clock is last after recovering frequency retrieval value f
Adj_i-1, the adjustment coefficient C that obtains by the frequency ratio of local clock and master clock and obtain clock frequency difference f through the clock adjustment algorithm
_ iWith phase difference p;
Calculate local clock and recover back time t
NowStep, the time t after the time after said local clock recovers, to be that local clock is last recovered
Adj_i-1Add local hardware clock lapse of time t
PassWith the product of said adjustment coefficient C, again with phase difference p sum
As the embodiment of the inventive method, flow process as shown in Figure 1:
Step S301: the time t that reads local clock
Local, and obtain the time t after last the recovery
Adj-i, the hardware time t during last the recovery
Hard, according to (t
Local-t
Hard) obtain local clock hardware lapse of time t
Pass, and obtain the frequency retrieval value f after the last recovery of local clock
Adj_i-1, the adjustment coefficient C that obtains by the frequency ratio of local clock and master clock and obtain clock frequency difference f through the clock adjustment algorithm
_ iWith phase difference p; Wherein, the adjustment coefficient C that the frequency ratio of local clock and master clock obtains is through (1+f
Ddj_i-1/ 10
9) perhaps (10
9+ f
Adj_i-1)/10
9Obtain;
Step S302: calculate the time after local clock recovers according to formula 1 or 7.Obtain local clock hardware lapse of time t
PassAnd behind the adjustment coefficient C, calculate second value, i.e. (t that interior during this period of time local clock should be passed by
Local-t
Hard) * (1+f
Adj_i-1/ 10
9) or (t
Local-t
Hard) * (10
9+ f
Adj_i-1)/10
9Secondly, this section period is added the time after recovered last time, obtained the time after local clock recovers like this; Add the phase value of this adjustment at last, obtain final local zone time; As preferably, use formula 7 to calculate the time after local clocks recover, the floating number computational accuracy of having avoided equipment and the time error brought high not as the integer calculations computational accuracy.
Step S303: the renewal frequency recovery value, promptly the frequency retrieval value of accumulative total and this frequency retrieval value add up in the past, and expression is since the current time, and local clock should move according to recovered frequency, i.e. f
Adi_i=f
Adj_i-1+ f
_ i
Step S304: upgrade the time after recovered last time, this time that calculates of being about to saves as recovery time last time, t
Adj-i=t
Now
Step S305: upgrade the hardware time when recovering last time, this time that calculates of being about to saves as recovery time last time, is used for the calculating t of recovered clock next time
Hard=t
Local
In the present embodiment, consider time precision, use the method recovered clock of simulation, need to consider to carry out the time of implementation of this method.As preferably, in step S302, when calculating the time after local clock recovers, need add up comprises the parameter acquiring step time of implementation, confirms the time of implementation of the time that local clock should be passed by and the time t of add up phase difference p and local clock
LocalThe offset of time of implementation, to improve time precision, wherein, the confirming and can obtain through operating analysis of offset is according to preferred 90 microseconds of experiment offset.
As preferably, whenever carry out local clock and recover, time t after calculating recovers at a distance from preset time
NowStep.F when wherein, first adjustment is calculated
Adj_i-1And t
Adj_i-1Be zero.
When obtaining the time after local clock recovers, it is 0 that the value of difference on the frequency f and phase difference p is given, and can obtain the time by the frequency operation after replying according to the said method flow process.
With technological means of the present invention, according to experiment test, the difference on the frequency of principal and subordinate's clock finally can be adjusted to 7ppb.
The above is merely preferred embodiment of the present invention, and is in order to restriction the present invention, not all within spirit of the present invention and principle, any modification of being made, is equal to replacement, improvement etc., all should be included within the scope that the present invention protects.
Claims (8)
1. the clock recovery method of a simulation comprises:
The parameter acquiring step is obtained local hardware clock lapse of time t
Pass, local clock is last after recovering time t
Adj_i-1, local clock is last after recovering frequency retrieval value f
Adj_i-1, the adjustment coefficient C that obtains by the frequency ratio of local clock and master clock and obtain clock frequency difference f through the clock adjustment algorithm
_ iWith phase difference p;
Calculate local clock and recover back time t
NowStep, the time t after the time after said local clock recovers, to be that local clock is last recovered
Adj_i-1Add local hardware clock lapse of time t
PassWith the product of said adjustment coefficient C, again with phase difference p sum.
2. method according to claim 1 is characterized in that,
Said parameter acquiring step also comprises:
Obtain the time t of local hardware clock
LocalHardware time t when recovering with the last time
Hard, according to (t
Local-t
Hard) obtain local clock hardware lapse of time t
Pass
3. method according to claim 1 is characterized in that, by the adjustment coefficient C that the frequency ratio of local clock and master clock obtains, is through (1+f
Adj_i-1/ 10
9) perhaps (10
9+ f
Adj_i-1)/10
9Obtain.
4. method according to claim 1 is characterized in that, calculates local clock and recovers also to include after the time of back:
Renewal frequency skew integer value f
Adj_i-1Step, the frequency retrieval value f that local clock is last after recovering
Adj_i-1, with this clock frequency difference f
_ iAdd up;
Upgrade the time t after recovering
Adj_iStep, be about to this local clock of confirming and recover back time t
NowSave as the time after the recovery;
Upgrade the hardware time t when recovering
HardStep, be about to the local clock time t of this acquisition
LocalSave as the hardware time after the recovery.
5. method according to claim 1 is characterized in that, the time t after said definite local clock recovers
NowStep in also comprise adding up and carry out the step of this algorithm compensation value.
6. method according to claim 5 is characterized in that, said offset comprises the parameter acquiring step time of implementation, confirm the time of implementation of the time that local clock should be passed by and add up phase difference p and local clock is last after recovering time t
Adj_i-1Time of implementation.
7. according to each described method of claim 1 to 6, it is characterized in that every separated preset time carries out local clock and recovers, calculate and recover back time t
NowStep.
8. according to claim 1 or 3 described methods, it is characterized in that f when first adjustment is calculated
Adj_i-1And t
Adj_i-1Be zero.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110424455.2A CN102497244B (en) | 2011-12-16 | 2011-12-16 | Stimulant clock recovery method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110424455.2A CN102497244B (en) | 2011-12-16 | 2011-12-16 | Stimulant clock recovery method |
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| CN102497244B CN102497244B (en) | 2014-09-17 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105680975A (en) * | 2016-03-07 | 2016-06-15 | 浙江大学 | Time synchronization method of master-slave structure multi-node network |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101064593A (en) * | 2006-04-29 | 2007-10-31 | 北京三星通信技术研究有限公司 | Method for improving inter-multistage equipment time synchronization frequency compensation method |
| CN101222288A (en) * | 2008-02-01 | 2008-07-16 | 华为技术有限公司 | IP network transmission method, system and equipment automatically adapting network jitter |
| CN101227246A (en) * | 2008-01-28 | 2008-07-23 | 中兴通讯股份有限公司 | Method and apparatus for master-salve clock synchronization |
-
2011
- 2011-12-16 CN CN201110424455.2A patent/CN102497244B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101064593A (en) * | 2006-04-29 | 2007-10-31 | 北京三星通信技术研究有限公司 | Method for improving inter-multistage equipment time synchronization frequency compensation method |
| CN101227246A (en) * | 2008-01-28 | 2008-07-23 | 中兴通讯股份有限公司 | Method and apparatus for master-salve clock synchronization |
| CN101222288A (en) * | 2008-02-01 | 2008-07-16 | 华为技术有限公司 | IP network transmission method, system and equipment automatically adapting network jitter |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105680975A (en) * | 2016-03-07 | 2016-06-15 | 浙江大学 | Time synchronization method of master-slave structure multi-node network |
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| CN102497244B (en) | 2014-09-17 |
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