CN102449703B - 可切换的电子器件以及切换所述器件的方法 - Google Patents
可切换的电子器件以及切换所述器件的方法 Download PDFInfo
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Abstract
可切换的电子器件包含第一(1)和第二(4)电极之间的包含导电材料(3)的层以及空穴阻挡层(2),其中该器件的电导率可通过施加具有小于或等于100A cm-2的电流密度的电流而不可逆地切换至比切换之前的器件的电导率低至少100倍的电导率。该导电材料为掺杂的有机材料,例如掺杂的任选地取代的聚(亚乙基二氧噻吩)。空穴阻挡层(2)可以包含微粒层,特别是纳米颗粒的层。
Description
技术领域
本发明涉及不可逆地可切换的和电子地切换的器件,包含这些器件的存储器阵列,及其形成方法。
背景技术
一次写入多次读取(WORM)存储器器件可以用于数据或多媒体例如音乐或视频的存储。此外,对于大容量、一次性RFID应用,一次写入多次读取WORM存储器是足够的。射频识别(RFID)标签是印刷有机电路的有吸引力的应用(1),尤其是当电路可以直接印刷到与用于为电路提供动力的天线相同的基板上时(2-4)。RFID标签需要存储器功能,这可以使用取自射频场的动力来读取和编程,需要很低的电流消耗和操作电压。
Moller等人(5)公开了基于用聚苯乙烯磺酸掺杂的聚亚乙基二氧噻吩(PEDOT:PSS)的溶液处理WORM器件,其中PEDOT:PSS薄膜沉积于p-i-n硅结构上,需要电压脉冲(8-10V)和大的电流密度(每平方厘米几百安培的量级)来通过不可逆地降低PEDOT:PSS层的电导率而对该器件的存储器阵列编程。Moller等人公开了电流密度在0-2V保持可逆并且在4V的永久电导率变化是小的(低约3-5倍)。
US 2005/157535公开了包含有机聚合物层和电子阻挡层的WORM器件,以阻止电子进入有机聚合物层中并防止有机聚合物层由于反复的读访问而劣化。
Brito等人公开了图案化微孔中的低功率WORM存储器器件(4),但是光刻工艺提高成本并限制这种器件的应用性。
因此,本发明的一个目标是提供WORM存储器器件,其具有可在较低的电流密度和/或电压下编程的存储器阵列。
本发明的再一个目标是提供可以低成本制造的WORM器件。
发明内容
第一方面,本发明提供可切换的电子器件,该器件包含第一和第二电极之间的包含导电材料的层以及空穴阻挡层,其中该器件的电导率可以通过施加具有小于或等于100A cm-2的电流密度的电流而不可逆地切换至比切换之前的器件的电导率低至少100倍的电导率。
第二方面,本发明提供权利要求15中所述的方法。
任选地,该电流密度小于或等于50A cm-2。优选地,该电流密度小于或等于10A cm-2;小于或等于1A cm-2;小于或等于0.5A cm-2;或者小于或等于0.2A cm-2。
任选地,该导电材料通过施加小于或等于100A cm-2的电流密度而从第一状态切换至第二状态。任选地,该导电材料在从第一到第二状态切换时改变氧化态。任选地,该导电材料在其第一状态下为掺杂的有机材料,更优选为p掺杂的有机材料。
任选地,该掺杂的有机材料为聚合物。
任选地,该聚合物为任选地取代的聚(亚乙基二氧噻吩)。任选的取代基包括烷基或烷氧基。
任选地,该掺杂剂为p掺杂剂。任选地,该掺杂剂包含阴离子。任选地,该掺杂剂为聚阴离子。合适的聚阴离子包括脱质子化的聚酸,例如聚磺酸。
任选地,该掺杂剂在导电材料切换至其第二状态后经历化学反应。任选地,该掺杂剂是已被中和的带电物质。
任选地,该导电层包含质子源。任选地,空穴阻挡层包含氧化锌。
任选地,该空穴阻挡层的最高已占分子轨道(HOMO)能级比该导电材料的HOMO能级低至少1eV。任选地,能隙为至少1.5eV或至少2eV。
为了避免不确定性,这里使用的“低”指的是“更远离真空能级”。
任选地,在导电材料层的任一侧提供空穴阻挡层。
第三方面,本发明提供可切换的电子器件或者已切换的电子器件,其包含第一和第二电极之间的包含导电材料的层以及空穴阻挡层,其中该空穴阻挡层的最高已占分子轨道(HOMO)能级比该导电材料的HOMO能级低至少1eV。任选地,能隙为至少1.5eV或至少2eV。
第四方面,本发明提供从具有高电导率的第一状态向具有较低电导率的第二状态可切换的电子器件或者由其得到的已切换的电子器件,其包含第一电极层,在该第一电极层上方的第一空穴阻挡层,在该第一空穴阻挡层上方的包含导电材料的层;在该包含导电材料的层上方的第二空穴阻挡层;以及在该第二空穴阻挡层上方的第二电极层。
第五方面,本发明提供形成电子器件的方法,该方法包括形成第一和第二电极层之间的包含导电材料的层以及空穴阻挡层的步骤,该器件从具有高电导率的第一状态向具有较低电导率的第二状态可切换,其中该空穴阻挡层和该包含导电材料的层从溶液沉积。
导电材料的溶液和空穴阻挡材料的溶液可包含相关材料以及溶解或分散该材料的一种或多种溶剂,并且术语“溶液”和“溶剂”应当相应地理解。
任选地,该空穴阻挡层和包含掺杂的导电材料的层通过旋转涂布沉积。
任选地,电极的至少之一通过印刷形成。
第六方面,本发明提供根据第一或第五方面的方法可获得的电子地切换的器件。
第七方面,本发明提供存储器阵列,其包含以上任一方面所述的多个已切换的和未切换的器件。
将会理解,通过提供包含多个未切换的器件的阵列而形成可写入的存储器阵列,然后将多个所述器件切换以形成已写入的存储器阵列。
任选地,该阵列在多个第一电极线和多个交叉的第二电极线的交叉点上包含已切换的或未切换的器件。
第八方面,本发明提供RFID标签或数据存储器件,其包含根据本发明第七方面的阵列。
将会理解,本发明的一方面的任选特征可以是本发明的另一方面的任选特征。例如,针对本发明的第一方面所述的任选的材料同样可应用于本发明的第二、第三或第四方面的器件或者第五方面的方法。
附图说明
图1(a)示出根据本发明的存储器器件的结构。
图1(b)示出具有图1(a)的结构的器件的能级。
图2(a)示出根据本发明的器件的电流-电压曲线。
图2(b)示出根据本发明的器件的电流密度与时间的关系。
图3(a)示出根据本发明制造的器件切换前后的拉曼光谱(633nm激发)。
图3(b)示出550nm的反射比和电流密度与偏置电压的关系。
图4(a)示出喷墨印刷的存储器阵列的光学显微图。
图4(b)示出来自图4(a)的阵列的单个器件的电流-电压特性。
图5示意性地示出根据本发明的存储器阵列。
图6示意性地示出反射比测量装置。
具体实施方式
根据本发明的一种器件表示在图1(a)中,其包含第一电极层1、空穴阻挡层2、导电材料层3和第二电极层4。
电极
电极可以包含任何导电材料,例如单质金属(例如金、铝或银)或者导电化合物例如氧化铟锡(ITO)或氧化铟锌。在正偏压下具有正电压的电极优选具有低于4eV的功函数,例如铝。
空穴阻挡层
空穴阻挡层具有与导电材料的HOMO能级相比足够深的HOMO能级以阻挡空穴向导电材料层的注入。优选地,HOMO能级的该差别为至少1eV,更优选至少1.5或2eV。
测量导电材料和空穴阻挡材料的HOMO能级的方法将是本领域技术人员已知的,包括循环伏安法和UV光电子光谱法。
用于空穴阻挡层的合适的材料包括宽带隙半导体例如氧化锌和二氧化钛。作为替代或者作为补充,空穴阻挡层可以包含有机空穴阻挡材料例如2,9-二甲基-4,7-二苯基-1,10-菲咯啉(BCP)、2,2’,2”-(1,3,5-亚苯基)三(1-苯基-1H-苯并咪唑)(TBPI)和双(2-甲基-8-喹啉合-N1,O8)-(1,1’-联苯-4-合)铝(Balq)。
空穴阻挡层可以包含微粒层,特别是纳米颗粒的层。
导电层
导电层优选包含掺杂的、氧化的材料,该材料可以还原至其未掺杂状态。一类这样的材料是用聚阴离子掺杂的聚阳离子,例如任选地取代的聚噻吩例如PEDOT与聚阴离子。一类常见的聚阴离子为聚酸,例如聚丙烯酸和聚磺酸盐,例如PSS和Nafion。另一实例为聚噻吩并噻吩与聚阴离子。再一个实例为氧化的聚苯胺,例如处于其翠绿亚胺(emeraldine)氧化态的聚苯胺。再一个实例为聚吡咯。导电材料优选包含共轭有机材料,优选共轭聚合物。
导电层的厚度优选在10nm至300nm范围内,更优选在30nm至100nm范围内。
其它层
可以在电极触点之间提供一个或多个其它层,例如可以在第一电极层和导电材料层之间进一步提供多个空穴阻挡层,或者可以在第二电极层和导电材料层之间提供再一个空穴阻挡层。
然而,在一种实施方案中,该器件仅包含第一和第二接触电极之间的包含导电材料的层以及空穴阻挡层,而在另一实施方案中,该器件仅在第一和第二接触电极之间包含包含导电材料的层以及其任一侧的空穴阻挡层。
基材
基材可以是任何类型的,例如玻璃或塑料。尽管可以使用图案化的基材,根据本发明方法,这样的基材不是必需的。
溶液处理
每个接触电极、导电材料层和空穴阻挡层可以通过将形成该层所需的相关材料从一种或多种溶剂中的溶液沉积而形成。
在一种实施方案中,将空穴阻挡层和导电材料层从溶液沉积。
在另一种实施方案中,将所有上述层从溶液沉积。
空穴阻挡层可以通过宽带隙半导体例如ZnO的胶体纳米颗粒的沉积而形成。
导电材料层可以通过导电材料的溶液的沉积而形成,例如在PEDOT:PSS的情况下为含水分散体。
接触电极可以通过将包含金属纳米颗粒或金属配合物的配制剂印刷而形成。
在形成阵列时,电极线可以通过印刷技术沉积。一种优选的技术为喷墨印刷,尽管其它技术例如丝网印刷(及其它)也是本领域技术人员已知的。
导电材料层和空穴阻挡材料层可以通过涂布技术例如旋转涂布、浸涂、刮刀涂布或喷涂而沉积。或者,这些层之一或者两者可以通过诸如喷墨印刷、丝网印刷或辊印的技术而印刷。选择性地印刷这些层而不是使用无区别的涂布技术,可以用于将相邻的第一和第二电极交叉点之间的任何“串话”最小化。
低功率切换
图1(b)是图1(a)器件的实施方案的示意性能级图,其中第一电极1为氧化铟锡;第二电极4为铝;空穴阻挡层2由ZnO纳米颗粒形成;并且导电层3包含PEDOT:PSS。
空穴注入被空穴阻挡层2的大的电离势(HOMO)抑制。因此,预计电流是以电子为主的。已知电子向掺杂的材料例如掺杂的PEDOT的注入导致PEDOT+还原为中性态PEDOT0,从而降低其电导率(12,13)。不希望受限于任何理论,据信该还原主要负责根据本发明的器件中的切换。同样,不希望受限于任何理论,据信去掺杂(dedoping)的不可逆性可能是由于在导电材料中存在水,它要么是沉积材料时的残余物,要么是随后从大气吸收的水。例如,在PEDOT:PSS的情况下,在切换过程中PSS-可以与水反应以形成稳定的中性PSSH,它导致PEDOT:PSS膜的电导率的永久性降低(12,14,15)。
优选地,对器件(或者,根据情况,为阵列的一行)编程所用的时间优选地不超过50微秒。
WORM器件
WORM存储器器件可以通过提供已切换和未切换的器件的阵列而形成,特别是作为图5中所示的二维阵列。通过提供多个基本上平行的第一电极线501和多个基本上平行的第二电极线502而形成器件,所述第二电极线设置成与第一电极线交叉,特别是通过设置第一和第二电极线基本上彼此垂直。在第一和第二电极之间、第一电极-第二电极交叉点处,或者像素503处,提供未切换的器件(即相对较高的电导率)。选定的像素经受将那些像素切换至其低电导率状态所需的电流密度。已切换的像素表示二进制0或1之一,而未切换的像素表示二进制0或1中的另一个,以此方式可以将数据写入阵列。
每条线的厚度以及每条线之间的间隙可以在微米范围内,优选在1-200微米范围内,优选5-100微米。电极层的图案化可以通过本领域技术人员已知的方法形成,例如光刻法和通过荫罩(shadow mask)的沉积。电极层也可以通过如以下更详细说明的溶液处理方法沉积。
WORM存储器器件可以在小于0.1W cm-2的功率密度下编程。使用喷墨印刷的顶部和底部电极制造的80μm×120μm器件以几μA的电流在~4V下操作。
实施例1
通过从氯仿溶液将ZnO纳米颗粒旋转涂布到图案化的氧化铟锡(ITO)涂布的基材上,然后在250℃下在空气中退火,而制备具有图1(a)所示结构的器件。然后将PEDOT:PSS的含水悬浮液旋转涂布以形成导电层,然后进行顶部Al电极的热蒸发。
ZnO纳米颗粒根据先前报导的方法(6,7)合成和制备,其具有5nm的典型直径,并用正丁基胺配体进行涂布。
这种器件的典型的电流-电压特性显示在图2a中(扫描速率0.1V s-1;插图在半对数轴上显示相同的数据)。正偏压对应于Al电极上的正电压。从-2V向正电压扫描,初始的J-V特性显示出整流行为,在±1V的整流比为100。进一步向正向偏压扫描,电流密度在1.2V-2V之间达到小于1mA cm-2的峰值(确切行为取决于扫描速率)。当扫描回2V以下时,电流比之前低2-3个数量级。电导率不能恢复,表明对器件的永久性改变。图2b表示对多种电压脉冲的瞬时电流响应。它表明,在3V下,在约60ms中电导率已显著降低,在更高的偏压下衰减更快。图2(b)还表明,将存储器器件编程所需的功率密度可以小于0.1W cm-2,这比先前报导的超低功率WORM器件(4)低几个数量级。
为研究电导切换的机理,在切换之前和之后测量了拉曼光谱(633nm激发)。在切换前,光谱在约1420cm-1附近的区域表现出宽峰,而在切换后,光谱在该区域表现出尖峰,1422cm-1和1516cm-1的清晰的峰分别对应于对称和反对称的C=C拉伸模式。光谱的这种变化与从p掺杂到未掺杂PEDOT的变化一致(8,9)。PEDOT去掺杂的进一步的证据可以从器件的UV-可见光吸收获得,其通过测量通过玻璃基材入射、穿过PEDOT:PSS层并在Al电极反射的光的强度的变化而获得。导电层的变化也可以当偏压从0至3.5V扫描时在375nm和750nm之间的反射比中观察到。在导电时,掺杂状态的PEDOT是高度透明的,导致在整个光谱范围的高的反射率。随着偏压升高,反射比降低,这对应于未掺杂的PEDOT的形成,其吸收性高得多(10,11)。图3(b)示出在510nm的反射比变化以及器件中的电流流动。可以清楚地看出,反射比的变化与电流的降低相关。最大反射比变化为80%以上,考虑到结构中存在的其它反射损失,这对应于PEDOT的吸光率的很显著的变化。原位拉曼光谱和反射比测量的结合因而表明电导率的变化是由于PEDOT的去掺杂。反射比使用图6中所示的装置测量,其中601表示白光灯(white lamp);602表示第一透镜;603表示第二透镜;604表示狭缝;605表示光栅和CCD相机;D表示受测试的器件。器件是连续驱动的。积分时间为0.38秒。
实施例2
为了获得低成本的WORM存储器,有用的是在不使用光刻基材图案化或高真空处理的情况下制造器件的阵列。在PEDOT:PSS和顶部电极之间插入额外的ZnO纳米颗粒空穴阻挡层,并完全通过溶液处理来制造阵列。通过喷墨印刷金纳米墨的120μm宽的线、然后在250℃退火1小时而形成底部电极。ZnO纳米颗粒和PEDOT:PSS膜根据实施例1沉积,然后旋转涂布200nm厚的另一ZnO纳米颗粒层。然后将器件在氮气下在200℃退火30分钟。通过喷墨印刷银配合物墨的120μm宽的线(垂直于底部电极线)、然后在130℃退火5分钟而沉积顶部电极。图4a显示了阵列的光学显微图,图4b显示了单一器件的典型电流-电压曲线(金正电极)。由于电极性能的不同,再次观察到整流行为。切换发生在3-4V,并且切换后在1-3V范围内的电导降低了约500倍。该120μm×120μm尺寸的印刷WORM器件因而可以用仅为10μW的功率进行编程。由于喷墨印刷的线宽可以容易地缩减至10-50μm,可能的是,WORM器件的编程功率可以进一步降低至约1μW。对于50μm节距(pitch)的印刷线,1k比特的信息可以存储在1.6mm×1.6mm的基材面积内,编程时间为约2s,或者,如果可获得足够的功率来为多个器件同时编程,该编程时间更短。
材料制备和器件制作的实验细节
将ZnO纳米晶体以约30mg/ml溶解于氯仿溶液中,并加入正丁基胺配体。将ITO基材在超声浴中通过丙酮和IPA、然后通过氮气枪干燥和氧等离子体(250W,5分钟)彻底清洁。对于印刷的金底部电极基材,将其通过丙酮和IPA润洗和氮气枪干燥进行清洁。通过以2000RPM旋转涂布45秒将ZnO薄膜沉积到基材上,这得到约100nm的膜厚。然后,在热板上、在空气中将膜在250℃退火30分钟。将PEDOT:PSS溶液以4000RPM旋涂1分钟,得到厚度为50nm的膜。对于30nm和80nm的PEDOT:PSS薄膜,旋转速度分别为6000RPM和2000RPM。在存在的情况下,顶部ZnO层从60mg/ml的氯仿溶液旋涂,并且相同的旋涂条件用于底部ZnO层,得到约200nm的膜厚。为去除顶部ZnO层的配体,将样品在氮气手套箱中在热板上在200℃烘烤30分钟。铝顶部电极通过高真空(<2×10-6Torr)的热蒸发进行沉积。对于初始的10nm,沉积速率相对较慢
喷墨印刷的实验细节
金图案通过将HARIMA金纳米糊NPG-J喷墨印刷而限定,所述金纳米糊用二甲苯稀释1至3-4体积。对于该墨配制剂,采用内径在20至40μm范围内的Microdrop和MicroFab喷嘴这两者。在印刷步骤后,通过在热板上在250℃退火1小时,将图案烧结成高度导电的金。印刷的金的粗糙度(RMS)为3.2nm。为限定存储器网格,将第二金属层喷墨印刷在ZnO顶部层的顶部上。在这种情况下,通过内径为30μm的MicroFab喷嘴印刷基于银配合物的墨,InkTec TEC-IJ-010或者InkTec TEC-IJ-050。将银线在热板上在130℃烧结5分钟。使用定制的单喷嘴印刷系统,印刷频率在4Hz至1k Hz范围内,除非另有不同的说明,工艺在室温和环境大气压下进行。
器件表征的细节
器件的电学性能在空气中通过Keithley 236源测量单元以步进-延迟模式进行表征。延迟时间为0.2s,步长为0.02V(图2(a))。JV曲线也使用Agilent 4155B半导体参数分析仪(SPA)以脉冲模式在空气中进行测量。脉冲周期为20ms,持续时间为10ms(图6)。瞬时响应通过HP 33120A脉冲发生器和Agilent DSO60521A示波器测量(图2(b))。拉曼光谱通过用633nm HeNe激光激发的Renishaw 2000拉曼显微镜测量。激发光和拉曼信号通过ITO玻璃基材。对于器件反射率变化的测量的详细设置显示在图6中。
尽管本发明已就具体的示例性实施方案进行了说明,但是将会理解,在不偏离以下权利要求中所述的本发明的精神和范围的情况下,本文中公开的特征的多种修改、改变和/或组合对于本领域技术人员而言是显而易见的。
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Claims (22)
1.可切换的电子器件,该器件包含第一和第二电极之间的包含导电材料的层以及空穴阻挡层,其中该器件的电导率通过施加具有小于或等于100Acm-2的电流密度的电流而不可逆地切换至比切换之前的器件的电导率低至少100倍的电导率;
其中所述导电材料是掺杂剂掺杂的聚亚乙基二氧噻吩,且该掺杂剂是聚磺酸;
其中所述空穴阻挡层包含用正丁基胺配体涂布的ZnO纳米颗粒;和
其中所述空穴阻挡层和所述包含导电材料的层从溶液沉积。
2.权利要求1所述的器件,其中该导电材料可通过施加小于或等于10A cm-2的电流密度而从第一状态切换至第二状态。
3.根据权利要求2的器件,其中该掺杂剂在导电材料切换至其第二状态后经历化学反应。
4.根据权利要求1至3任意之一的器件,其中包含导电材料的层包含质子源。
5.权利要求1至3任意之一所述的器件,其中空穴阻挡层的最高已占分子轨道能级比该导电材料的最高已占分子轨道能级低至少1eV。
6.权利要求1至3任意之一所述的器件,其包含第一电极层,在该第一电极层上方的第一空穴阻挡层,在该第一空穴阻挡层上方的包含导电材料的层;在该包含导电材料的层上方的第二空穴阻挡层;以及在该第二空穴阻挡层上方的第二电极层。
7.不可逆地切换的电子器件的形成方法,其中切换之前器件的电导率为切换之后其电导率的至少100倍,该器件包含第一和第二电极之间的包含可切换导电材料的导电层以及空穴阻挡层,该方法包括向器件施加小于或等于100A cm-2的电流密度的步骤;
其中所述可切换导电材料是掺杂剂掺杂的聚亚乙基二氧噻吩,且该掺杂剂是聚磺酸;
其中所述空穴阻挡层包含用正丁基胺配体涂布的ZnO纳米颗粒;和
其中所述空穴阻挡层和所述导电层从溶液沉积。
8.根据权利要求7的方法,其中该可切换导电材料通过施加小于或等于10A cm-2的电流密度而从第一状态切换至第二状态。
9.根据权利要求7或8的方法,其中该掺杂剂在该可切换导电材料切换至其第二状态后经历化学反应。
10.根据权利要求7或8的方法,其中该导电层包含质子源。
11.根据权利要求7或8的方法,其中空穴阻挡层的最高已占分子轨道能级比该可切换导电材料的最高已占分子轨道能级低至少1eV。
12.根据权利要求7或8的方法,其中空穴阻挡层在所述导电层的任一侧提供。
13.可切换的电子器件或者已切换的电子器件,其包含第一和第二电极之间的包含导电材料的层以及空穴阻挡层,其中该空穴阻挡层的最高已占分子轨道能级比该导电材料的最高已占分子轨道能级低至少1eV;
其中所述导电材料是聚磺酸掺杂的聚亚乙基二氧噻吩;
其中所述空穴阻挡层包含用正丁基胺配体涂布的ZnO纳米颗粒;和
其中所述空穴阻挡层和所述包含导电材料的层从溶液沉积。
14.从具有高电导率的第一状态向具有较低电导率的第二状态可切换的电子器件或者由其得到的已切换的电子器件,其包含第一电极层,在该第一电极层上方的第一空穴阻挡层,在该第一空穴阻挡层上方的包含导电材料的层;在该包含导电材料的层上方的第二空穴阻挡层;以及在该第二空穴阻挡层上方的第二电极层;
其中所述导电材料是聚磺酸掺杂的聚亚乙基二氧噻吩;
其中所述空穴阻挡层包含用正丁基胺配体涂布的ZnO纳米颗粒;和
其中所述空穴阻挡层和所述包含导电材料的层从溶液沉积。
15.形成电子器件的方法,该方法包括形成第一和第二电极层之间的包含导电材料的层以及空穴阻挡层的步骤,该器件从具有高电导率的第一状态向具有较低电导率的第二状态可切换,其中该空穴阻挡层和该包含导电材料的层从溶液沉积;
其中所述导电材料是聚磺酸掺杂的聚亚乙基二氧噻吩;和
其中所述空穴阻挡层包含用正丁基胺配体涂布的ZnO纳米颗粒。
16.根据权利要求15的方法,其中该空穴阻挡层和包含导电材料的层通过旋转涂布沉积。
17.根据权利要求15或16的方法,其中电极的至少之一通过印刷形成。
18.WORM存储器,其包含多个如权利要求1至6或权利要求13-14任意之一中所述的电子器件。
19.存储器阵列,其包含多个根据权利要求1至6或权利要求13-14任意之一中所述的电子器件。
20.RFID标签,其包含根据权利要求19的存储器阵列。
21.数据存储器件,其包含根据权利要求19的存储器阵列。
22.多媒体存储器件,其包含根据权利要求19的存储器阵列。
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