CN102446716B - Method for reducing damage of semiconductor device caused during hot carrier injection - Google Patents

Method for reducing damage of semiconductor device caused during hot carrier injection Download PDF

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CN102446716B
CN102446716B CN201110265219.0A CN201110265219A CN102446716B CN 102446716 B CN102446716 B CN 102446716B CN 201110265219 A CN201110265219 A CN 201110265219A CN 102446716 B CN102446716 B CN 102446716B
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semiconductor device
hot carrier
carrier injection
drain electrode
substrate
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CN102446716A (en
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俞柳江
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Abstract

The invention relates to the field of semiconductor manufacturing, and in particular relates to a method for reducing damage of a semiconductor device caused during hot carrier injection. The method has the following beneficial effects that: in the heavy doping drain injection process, the distance between the heavily doped region at a drain terminal and a grid is enlarged by adopting a tilt angle injection method under the condition of keeping the effective channel length changeless, thus effectively reducing the effective longitudinal electric field at the drain terminal so as to reduce damage of the semiconductor device caused during hot carrier injection.

Description

A kind of method that reduces semiconductor device hot carrier injection damage
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of method that reduces semiconductor device hot carrier injection damage.
Background technology
Hot carrier's effect is an important failure mechanism of MOS device, and along with day by day dwindling of MOS device size, the hot carrier injection effect of device is more and more serious.Take PMOS device as example, and the hole in its raceway groove is the accelerated high energy carriers that forms under the effect of high transverse electric field between the drain-source utmost point, after this high energy carriers and silicon crystal lattice collision, can produce the electron hole pair of ionization; Wherein, electronics forms substrate current after being collected by substrate, and the hole that most of collision produces can flow to drain electrode, but also has fraction hole, can be under the effect of longitudinal electric field, be injected in grid and form grid current, this phenomenon is called as hot carrier and injects (Hot Carrier Injection is called for short HCI).
Because hot carrier can cause the fracture that silicon substrate and silicon dioxide gate oxygen interface place can key, so that produce interfacial state at silicon substrate and silicon dioxide gate oxygen interface place, thereby cause device performance to reduce, as degeneration of threshold voltage, mutual conductance and linear zone/saturation region electric current etc., finally cause MOS component failure.First component failure occurs in drain terminal conventionally, and this is that after arriving drain terminal, the energy of charge carrier reaches maximum because charge carrier is by the electric field acceleration of whole raceway groove, so the hot carrier of drain terminal injection phenomenon is more serious.
In traditional handicraft, as shown in Figure 1, it is perpendicular to silicon chip surface that heavy-doped source leaks injection direction, injects and leakage heavily doped region, annealing process formation source afterwards, and source-drain electrode becomes symmetrical structure.
Summary of the invention
The invention discloses a kind of method that reduces semiconductor device hot carrier injection damage, on a substrate, be provided with the semiconductor device of grid, wherein, comprise the following steps:
Semiconductor device is carried out to oblique angle heavy doping ion injection technology, in substrate, form raceway groove, source electrode and drain electrode; Wherein, Implantation direction tilts to source electrode direction, and the heavy doping ion in source electrode is than the more close raceway groove of heavy doping ion in drain electrode.
The above-mentioned method that reduces semiconductor device hot carrier injection damage, wherein, source-drain electrode is provided with shallow ditch non-intercommunicating cells away from raceway groove one end.
The above-mentioned method that reduces semiconductor device hot carrier injection damage, wherein, is provided with thin oxide layer between grid and substrate.
The above-mentioned method that reduces semiconductor device hot carrier injection damage, wherein, the sidewall of grid curb wall cover gate and contiguous part substrate thereof.
In sum, owing to having adopted technique scheme, the present invention proposes a kind of method that reduces semiconductor device hot carrier injection damage, in heavy doping drain electrode injection technology, by the method that adopts oblique angle to inject, in the situation that keeping raceway groove effective length (Effective Channel Length) constant, effectively reduce effective longitudinal electric field of drain terminal, the damage causing to reduce semiconductor device when hot carrier is injected.
Accompanying drawing explanation
Fig. 1 is the structural representation of traditional handicraft heavy doping drain electrode injection technology in background technology of the present invention;
Fig. 2 is the structural representation of oblique angle of the present invention heavy doping drain electrode injection technology.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described:
Fig. 2 is the structural representation of oblique angle of the present invention heavy doping drain electrode injection technology.As shown in Figure 2, a kind of method that reduces semiconductor device hot carrier injection damage of the present invention:
For example, in 55nm cmos device technique, prepare nmos device.First, prepare shallow ditch non-intercommunicating cells 12 and grid 17 on silicon substrate 11, thin oxide layer 16 is arranged between substrate 11 and grid 17, prepares sidewall and the contiguous part substrate thereof of grid curb wall 18 cover gate 17.
Then, adopt phosphorus to carry out heavy-doped source and leak injection technology 19, by doping injection direction, to source electrode 13 directions, tilt, angulation α is that the oblique angle of 15 degree tilts to inject; After implantation annealing technique, because injection direction is no longer perpendicular to the surface of substrate 11, so source-drain electrode is no longer symmetrical structure; By injection direction, to source electrode 13 one end, tilt, in the situation that keeping raceway groove 15 effective lengths (Effective Channel Length) constant, make to drain 14 heavily doped region and grid 17 distance zoomed out, effectively reduce effective longitudinal electric field of drain electrode 14 one end, reduce the damage that semiconductor device causes when hot carrier is injected.
In sum, owing to having adopted technique scheme, the present invention proposes a kind of method that reduces semiconductor device hot carrier injection damage, do not increasing under the prerequisite of existing MOS device fabrication step, by adopting inclination heavy doping drain electrode injection technology, make leak disconnected doping ion and the distance between raceway groove zoom out, leaking breaks reduces with grid overlapping region, thus the damage while having reduced the injection of semiconductor device hot carrier; And leaking when disconnected doping ion and channel distance zoomed out, the doping ion of source and the distance of raceway groove are furthered, thereby the length of effective channel of semiconductor device is remained unchanged, and other performances of semiconductor device are kept.
By explanation and accompanying drawing, provided the exemplary embodiments of the ad hoc structure of embodiment, based on the present invention's spirit, also can do other conversion.Although foregoing invention has proposed existing preferred embodiment, yet these contents are not as limitation.
For a person skilled in the art, read after above-mentioned explanation, various changes and modifications undoubtedly will be apparent.Therefore, appending claims should be regarded whole variations and the correction of containing true intention of the present invention and scope as.Within the scope of claims, scope and the content of any and all equivalences, all should think and still belong to the intent and scope of the invention.

Claims (4)

1. reduce a method for semiconductor device hot carrier injection damage, be applied to, in the manufacture craft of MOS device, on a substrate, be provided with the semiconductor device of grid, it is characterized in that, said method comprising the steps of:
Semiconductor device is carried out to oblique angle heavy doping ion injection technology, in substrate, form raceway groove, source electrode and drain electrode; Wherein, Implantation direction tilts to source electrode direction, and raceway groove effective length remains unchanged, and the heavy doping ion in source electrode is than the more close raceway groove of heavy doping ion in drain electrode, and source-drain electrode is no longer symmetrical structure, and the angle of inclination of described Implantation is 15 °.
2. the method that reduces semiconductor device hot carrier injection damage according to claim 1, is characterized in that, source-drain electrode is provided with shallow ditch non-intercommunicating cells away from raceway groove one end.
3. the method that reduces semiconductor device hot carrier injection damage according to claim 1, is characterized in that, between grid and substrate, is provided with thin oxide layer.
4. the method that reduces semiconductor device hot carrier injection damage according to claim 1, is characterized in that, the sidewall of grid curb wall cover gate and contiguous part substrate thereof.
CN201110265219.0A 2011-09-08 2011-09-08 Method for reducing damage of semiconductor device caused during hot carrier injection Active CN102446716B (en)

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CN102446716B true CN102446716B (en) 2014-11-19

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101661889A (en) * 2009-08-15 2010-03-03 北京大学深圳研究生院 Manufacturing method of silicon MOS transistor on partially consumed insulating layer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101661889A (en) * 2009-08-15 2010-03-03 北京大学深圳研究生院 Manufacturing method of silicon MOS transistor on partially consumed insulating layer

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