CN102437847A - Power converter and differential circuit - Google Patents
Power converter and differential circuit Download PDFInfo
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- CN102437847A CN102437847A CN201110410717XA CN201110410717A CN102437847A CN 102437847 A CN102437847 A CN 102437847A CN 201110410717X A CN201110410717X A CN 201110410717XA CN 201110410717 A CN201110410717 A CN 201110410717A CN 102437847 A CN102437847 A CN 102437847A
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Abstract
The invention provides a differential circuit, which comprises an input circuit, an output amplification circuit and an output comparison circuit. The input circuit comprises a first differential transistor and a second differential transistor, the gate electrode of the first differential transistor is used as a first input end for input of a first voltage, and the gate electrode of the second differential transistor is used as a second input end for input of a second voltage; the output amplification circuit is connected with the input circuit and is used for amplifying and outputting the difference of the first voltage and the second voltage; and the output comparison circuit is connected with the input circuit and is used for comparing whether the difference of the first voltage and the second voltage is less than a first preset value. Compared with the prior art, since an error amplifier and an undervoltage comparator are multiplexed in the input circuit, the additional relative deviation caused by the process in use of the independent input circuit can be avoided, and the undervoltage comparator can work more stably.
Description
[technical field]
The present invention relates to the power supply design field, particularly relate to a kind of power supply changeover device and interior difference channel thereof.
[background technology]
In the DC-DC power transducer, generally comprise error amplifier, under-voltage comparator and overvoltage comparator.The function of error amplifier is detect output feedback voltage and reference voltage poor, and working with whole feedback loop is adjusted to satisfied output feedback voltage and the equal state of reference voltage with output voltage.Under-voltage comparator detects output voltage and whether is in under-voltage condition, generally is set at 95% of target output voltage, and this value is under-voltage detection threshold.Overvoltage comparator detects output voltage and whether is in overvoltage condition, generally is set at 105% of target output voltage, and this value is the overvoltage detection threshold.In the prior art; For general fully independently three circuit that adopt of the error amplifier in the power supply converter, under-voltage comparator and overvoltage comparator, promptly each independent circuits all adopts independently differential input stage, because all there is input deviation at random in each differential input stage in integrated circuit fabrication process; For example; As far as error amplifier, there is certain deviation in its two difference inputs to the threshold voltage of pipe, and this deviation is at random between chip.Equally, also there is certain deviation in the input of the difference of under-voltage comparator and overvoltage comparator to pipe, and these deviations and error amplifier input deviation are inconsistent.Therefore, exist between the output feedback voltage that has just caused the error amplifier adjustment and the detection threshold of under-voltage and overvoltage comparator owing to technology causes the relative deviation that adds.Because the existence of relative deviation may cause said overvoltage comparator or under-voltage comparator the job insecurity phenomenon to occur.With the overvoltage comparator is example, and the existence of relative deviation possibly cause the overvoltage detection threshold of some chip less than normal, as becoming 101% by 105% of setting.And overvoltage comparator can reduce duty ratio by stopcock when detecting overvoltage condition, thereby reduces output voltage to avoid output overvoltage.When the overvoltage detection threshold becomes too small; In addition because factors such as some noises; Even just possibly cause when error amplifier carries out the adjustment of normal loop; The situation of overvoltage comparator wrong detection to overvoltage condition also can appear, thus the normal adjustment of the mushing error amplifier that leads to errors, and produce wild effect.
Therefore, be necessary to propose a kind of improved technical scheme and solve the problems referred to above.
[summary of the invention]
One of the object of the invention is to provide a kind of difference channel of power supply changeover device, and it can avoid error amplifier and under-voltage comparator because technology to cause the relative deviation that adds, thereby makes the under-voltage comparator more stable work.
Two of the object of the invention is to provide a kind of power supply changeover device that comprises difference channel, and said difference channel can avoid error amplifier and under-voltage comparator because technology to cause the relative deviation that adds, thereby makes the more stable work of under-voltage comparator.
To achieve these goals; According to an aspect of the present invention; The present invention proposes a kind of difference channel; It comprises: comprise the input stage circuit of first difference transistor and second difference transistor, the grid of first difference transistor is imported first voltage as first input end, and the grid of second difference transistor is imported second voltage as second input; The amplification output-stage circuit that is connected with said input stage circuit is used for the difference of first voltage and second voltage is amplified back output; Whether the comparison output-stage circuit that is connected with said input stage circuit is used for comparison first voltage and second voltage difference less than first predetermined value.
In a further embodiment, said input stage circuit also comprises first current source, and an end of first current source links to each other with the source class of the source class of first difference transistor and second difference transistor.
In a further embodiment; Said amplification output-stage circuit comprises the first transistor and the transistor seconds that is connected between power supply and the ground; Node between the first transistor and the transistor seconds is as the output of said amplification output-stage circuit; When said first voltage equaled said second voltage, the electric current on the first transistor was directly proportional with electric current on first difference transistor, and the electric current on the transistor seconds is directly proportional with electric current on second difference transistor.
In an embodiment further; Said relatively output-stage circuit comprises the 4th transistor and the 5th transistor that is connected between power supply and the ground; Second current source from the 4th transistor and the 5th transistorized intermediate node extraction electric current; The inverter that its input and the 4th transistor link to each other with the 5th transistorized intermediate node; Whether output output reflection first voltage of said inverter and the difference between second voltage be less than first predetermined value; When said first voltage equaled said second voltage, the electric current on the 4th transistor was directly proportional with electric current on first difference transistor, and the electric current on the 5th transistor is directly proportional with electric current on second difference transistor.
According to a further aspect in the invention; The present invention proposes a kind of power supply changeover device; It comprises pulse-width modulation comparator, logical circuit, output circuit, feedback circuit and difference channel; Said difference channel comprises input stage circuit, amplification output-stage circuit that is connected with said input stage circuit and the comparison output-stage circuit that is connected with said input stage circuit; Said input stage circuit comprises first difference transistor and second difference transistor; The grid of first difference transistor is imported the feedback voltage that said feedback circuit provides as first input end, and the grid of second difference transistor is as the second input input reference voltage, and said amplification output-stage circuit is exported to said pulse-width modulation comparator after said feedback voltage and said reference voltage difference are amplified; Whether the difference of said relatively more said feedback voltage of output-stage circuit and said reference voltage less than under-voltage threshold value, and comparative result is exported to said logical circuit; Said pulse-width modulation comparator generates pulse-width signal according to the signal of said amplification output-stage circuit output, and exports to said logical circuit; Said logical circuit is given said output circuit according to the comparison signal output control signal of said pulse-width signal and the output of said relatively output-stage circuit; Said output circuit generates output voltage according to the control signal of said logical circuit; Said feedback circuit produces said feedback voltage according to the output voltage of said output circuit.
Compared with prior art, in the present invention through making the multiplexing input stage circuit of error amplifier and under-voltage comparator, thereby when avoiding the use of independent input stage circuit because technology causes the relative deviation that adds, and then make the under-voltage comparator more stable work.
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.Wherein:
Fig. 1 is the error amplifier among the present invention and the difference channel circuit diagram in one embodiment of the multiplexing input stage circuit of overvoltage comparator;
Fig. 2 is the error amplifier among the present invention and the difference channel circuit diagram in another embodiment of the multiplexing input stage circuit of overvoltage comparator;
Fig. 3 is the error amplifier among the present invention and the difference channel circuit diagram in one embodiment of the multiplexing input stage circuit of under-voltage comparator;
Fig. 4 is the error amplifier among the present invention and the difference channel circuit diagram in another embodiment of the multiplexing input stage circuit of overvoltage comparator; With
Fig. 5 is the exemplary plot of the application of difference channel in voltage descending DC-DC converter of error amplifier, overvoltage comparator and the multiplexing input stage circuit of under-voltage comparator among the present invention.
[embodiment]
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, below in conjunction with accompanying drawing and embodiment the present invention done further detailed explanation." connection " among this paper, " joining ", " being connected to " etc. relate to the speech of electric connection all can represent direct or indirect electric connection.
Alleged here " embodiment " or " embodiment " are meant special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different in this manual local " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or optionally mutually exclusive with other embodiment embodiment.
The invention provides a kind of difference channel, it forms after by error amplifier and overvoltage comparator and/or the multiplexing input stage circuit of under-voltage comparator.Said difference channel comprises input stage circuit, the amplification output-stage circuit that is connected with said input stage circuit and the comparison output-stage circuit that is connected with said input stage circuit.Said input stage circuit comprises first difference transistor and second difference transistor, and the grid of first difference transistor is imported first voltage as first input end, and the grid of second difference transistor is imported second voltage as second input.Said amplification output-stage circuit is used for the difference of first voltage and second voltage is amplified back output.Whether said relatively output-stage circuit is used for the difference of comparison first voltage and second voltage greater than first predetermined value or not less than second predetermined value.
Please refer to shown in Figure 1ly, it is the error amplifier among the present invention and the difference channel circuit diagram in one embodiment of the multiplexing input stage circuit of overvoltage comparator.
In the present embodiment, the input stage circuit of said difference channel comprises the first current source I1, PMOS difference transistor MP1, MP2, nmos pass transistor MN1 and MN3.The termination power VIN of the first current source I1; The source electrode of another termination PMOS difference transistor MP1 and MP2; The drain electrode of PMOS difference transistor MP1 links to each other with the drain electrode of nmos pass transistor MN1, and the drain electrode of PMOS difference transistor MP2 links to each other with the drain electrode of nmos pass transistor MN3.The source ground of nmos pass transistor MN1 and MN3.The grid of PMOS difference transistor MP1 meets feedback voltage FB, and the grid of PMOS difference transistor MP2 meets reference voltage Ref.
The amplification output-stage circuit of said difference channel comprises PMOS transistor MP3 and the nmos pass transistor MN2 that is connected between power supply VIN and the ground, is connected in PMOS transistor MP4 and nmos pass transistor MN4 between power supply VIN and the ground.The grid of nmos pass transistor MN2 links to each other with the grid of nmos pass transistor MN1, and the grid of nmos pass transistor MN4 links to each other with the grid of nmos pass transistor MN3, and the grid of PMOS transistor MP3 links to each other with the grid of PMOS transistor MP4.Like this, nmos pass transistor MN4 and MN3 constitute current mirror, and nmos pass transistor MN2 and MN1 constitute current mirror, and PMOS transistor MP4 and MP3 constitute current mirror.The intermediate node of PMOS transistor MP4 and nmos pass transistor MN4 amplifies the output of output-stage circuit, its output error amplifying signal EAO for this.
This amplification output-stage circuit forms error amplifier with said input stage circuit; Be used to amplify the poor of feedback voltage FB and reference voltage Ref; This error amplifier can be operated in the feedback control loop in the DC-to-dc converter; Bigger gain is provided, realizes that loop equals feedback voltage FB adjustment to reference voltage Ref.When feedback voltage FB equaled reference voltage Ref, the electric current of PMOS transistor MP4 was directly proportional with the electric current of PMOS difference transistor MP1, and the electric current of the electric current of nmos pass transistor MN4 and PMOS difference transistor MP2 is directly proportional.
The comparison output-stage circuit of said difference channel comprises the second current source I2 and the nmos pass transistor MN5 that is connected between power supply VIN and the ground; And the inverter INV1 and the INV2 of series connection; The intermediate node of said second source I2 of the input termination of INV1 and nmos pass transistor MN5 wherein; The output of said inverter INV2 compares the output of output-stage circuit for this, its output comparison signal OVP.The grid of said nmos pass transistor MN5 links to each other with the grid of said nmos pass transistor MN1, and both constitute current mirror, and when feedback voltage FB equaled reference voltage Ref, the electric current of nmos pass transistor MN5 was directly proportional with the electric current of PMOS difference transistor MP1.When the electric current of nmos pass transistor MN5 equals the electric current of the said second current source I2, said comparison signal OVP upset, the difference between said feedback voltage FB and the said reference voltage Ref equals the predetermined excess pressure threshold value at this moment.
This comparison output-stage circuit forms overvoltage comparator with said input stage circuit, and it is in the difference of said feedback voltage FB and said reference voltage Ref during greater than the predetermined excess pressure threshold value, its output over-voltage protection signal (being useful signal) that overturns.
In the present embodiment; The useful signal of comparison signal OVP is a high level signal, and comparison signal OVP from the condition that low level is turned to high level is: the electric current of nmos pass transistor MN5 changes into the situation of the electric current of nmos pass transistor MN5 less than the electric current of the second current source I2 from the electrorheological greater than the second current source I2.Suppose that the width and the length that satisfy nmos pass transistor MN5 and MN1 in the design all equate, the electric current of the current replication nmos pass transistor MN1 of nmos pass transistor MN5 then, its ratio of duplicating is 1: 1.Then when the electric current of nmos pass transistor MN5 equaled the electric current of the second current source I2, the electric current of nmos pass transistor MN1 also equaled the electric current of the second current source I2.Because the electric current of nmos pass transistor MN1 equals the electric current of PMOS difference transistor MP1, so during the output signal OVP upset of said relatively output circuit, the electric current of PMOS difference transistor MP1 also equals the electric current of the second current source I2.For PMOS difference transistor MP1 and MP2, when both electric currents equated, its gate source voltage equated that because the source electrode of PMOS difference transistor MP1 and MP2 links together, promptly its source voltage equates, so feedback voltage FB equals reference voltage Ref.Equal the electric current of the first current source I1 again according to the electric current sum of the electric current of Kirchhoff's law PMOS difference transistor MP1 and PMOS difference transistor MP2; So satisfy the condition that feedback voltage FB equals reference voltage Ref be; The electric current of PMOS difference transistor MP1 should equal the electric current of PMOS difference transistor MP2, and equals I1/2.Under the situation that is operated in small-signal, difference transistor is operated in the saturation region, and its small signal electric current satisfies:
ΔI＝-|ΔVgs?|.gm (1)
Wherein Δ I is that electric current changes, and Δ Vgs is that gate source voltage changes, and gm is the mutual conductance of difference transistor.
The state that state that relatively electric current of PMOS difference transistor MP1 and MP2 is equal and the electric current of PMOS difference transistor MP1 equal the electric current of the second current source I2 can get the electric current changes delta I=I2-I1/2 (2) of PMOS difference transistor MP1
Wherein I2 is the current value of the second current source I2, and I1 is the current value of the first current source I1.
According to formula (1), (2) can get: | Δ Vgs |=-(I2-I1/2)/gm=(I1/2-I2)/gm (3)
So when the difference of feedback voltage FB and reference voltage Ref equals (I1/2-I2)/gm (being the predetermined excess pressure threshold value); The electric current of PMOS difference transistor MP1 equals the electric current of the second current source I2, causes the comparison signal OVP of said relatively output circuit output to be turned into high level from low level.I2 also can design with I1 proportional, and like I2=I1/4 (4), then formula (3) is reduced to | Δ Vgs | and=I1/ (4.gm) (5)
Further design PMOS difference transistor MP1 and MP2 can know according to subthreshold value MOS characteristic formula when sub-threshold region:
gm＝I
D(ζ.VT)(6)
I wherein
DBe the metal-oxide-semiconductor drain current, VT is a thermal voltage, and ξ is a process constant.
Here for PMOS difference transistor MP1, when the comparison signal OVP of said relatively output circuit output when low level is turned into high level, its I
D=I2
When I2=I1/4, bring formula (5) into, (6) can get:
|ΔVgs?|＝I1/(4.I2/(ξ.VT))＝ξ.VT
Design different I2 and the ratio of I1, can obtain different | Δ Vgs |, promptly obtain different predetermined excess pressure threshold values.
Therefore, the turn threshold of said overvoltage comparator is VFB=VRef+ ξ .VT, and when promptly feedback voltage V FB was above than the high ξ .VT of reference voltage V Ref, comparison signal OVP exported high level, expression feedback overvoltage FB overvoltage, i.e. output voltage overvoltage.
Please refer to shown in Figure 2ly, it is the error amplifier among the present invention and the difference channel circuit diagram in another embodiment of the multiplexing input stage circuit of overvoltage comparator.Identical among said input stage circuit among Fig. 2 and the circuit structure of said amplification output-stage circuit and Fig. 1.Inequality among the circuit structure of the comparison output-stage circuit among Fig. 2 and Fig. 1 introduced said relatively output-stage circuit below in detail.
In the present embodiment; The comparison output-stage circuit of said difference channel comprises PMOS transistor MP5 and the nmos pass transistor MN5 that is connected between power supply VIN and the ground; The second current source I2 to the intermediate node injection current of PMOS transistor MP5 and nmos pass transistor MN5; And inverter INV1; The input termination PMOS transistor MP5 of wherein said inverter INV1 and the intermediate node of nmos pass transistor MN5, the output of said inverter INV1 compares the output of output-stage circuit for this, its output comparison signal OVP.The grid of said PMOS transistor MP5 links to each other with the grid of said PMOS transistor MP3, and the grid of said nmos pass transistor MN5 links to each other with the grid of said nmos pass transistor MN3.Like this, PMOS transistor MP3 and MP5 constitute current mirror, and nmos pass transistor MN3 and MN5 constitute current mirror.When said feedback voltage FB equaled said reference voltage Ref, the electric current of PMOS transistor MP5 was directly proportional with the electric current of PMOS difference transistor MP1, and the electric current of nmos pass transistor MN5 is directly proportional with the electric current of PMOS difference transistor MP2.When the electric current of nmos pass transistor MN5 equals the electric current sum of electric current and the second current source I2 of said PMOS transistor MP5, said comparison signal OVP upset, the difference between this moment said feedback voltage FB and the said reference voltage Ref equals the predetermined excess pressure threshold value.
This comparison output-stage circuit forms overvoltage comparator with said input stage circuit, and it is in the difference of feedback voltage FB and said reference voltage Ref during greater than this predetermined excess pressure threshold value, its upset output over-voltage protection signal.
According to Fig. 1 in the overvoltage comparator principle of similitude, can know comparison signal OVP when upset, VFB-VRef=I2/gm; Wherein VFB is the voltage of feedback voltage FB; VRef is the voltage of reference voltage Ref, and I2 is the electric current of the second current source I2, and gm is the mutual conductance of difference transistor.Design different I2 values, can obtain different predetermined excess pressure threshold values.
Please refer to shown in Figure 3ly, it is the error amplifier among the present invention and the difference channel circuit diagram in one embodiment of the multiplexing input stage circuit of under-voltage comparator.Identical among said input stage circuit among Fig. 3 and the circuit structure of said amplification output-stage circuit and Fig. 2.Inequality among the circuit structure of the comparison output-stage circuit among Fig. 3 and Fig. 2 introduced said relatively output-stage circuit below in detail.
In the present embodiment; Said relatively output-stage circuit comprises PMOS transistor MP5 and the nmos pass transistor MN5 that is connected between power supply VIN and the ground; Extract the second current source I2 of electric current from the intermediate node of PMOS transistor MP5 and nmos pass transistor MN5; And the inverter INV1 and the INV2 of polyphone; Wherein the input termination PMOS transistor MP5 of INV1 and the intermediate node of nmos pass transistor MN5, the output of said inverter INV2 are this relatively output of output-stage circuit, its output comparison signal UVP.The grid of said PMOS transistor MP5 links to each other with the grid of said PMOS transistor MP3; The grid of said nmos pass transistor MN5 links to each other with the grid of said nmos pass transistor MN3; Like this, PMOS transistor MP3 and MP5 constitute current mirror, and nmos pass transistor MN3 and MN5 constitute current mirror.When feedback voltage FB equaled reference voltage Ref, the electric current of PMOS transistor MP5 was directly proportional with the electric current of PMOS difference transistor MP1, and the electric current of nmos pass transistor MN5 is directly proportional with the electric current of PMOS difference transistor MP2.When the electric current of PMOS transistor MP5 equals the electric current sum of electric current and current source I2 of nmos pass transistor MN5, said comparison signal UVP upset, this moment, said feedback voltage FB equaled to be scheduled to under-voltage threshold value with difference between the said reference voltage Ref.
This comparison output-stage circuit forms under-voltage comparator with said input stage circuit, and it is in the difference of feedback voltage FB and said reference voltage Ref during less than predetermined under-voltage threshold value, its upset output under-voltage protection signal.
According to Fig. 2 in the overvoltage comparator principle of similitude, can know comparison signal UVP when upset, VBF-VRef=-I2/gm, wherein VFB is the magnitude of voltage of feedback voltage FB, VRef is the magnitude of voltage of reference voltage Ref, I2 is the electric current of the second current source I2.Design different I2 values, can obtain different under-voltage threshold values.
Please refer to shown in Figure 4ly, it is the error amplifier among the present invention and the difference channel circuit diagram in another embodiment of the multiplexing input stage circuit of under-voltage comparator.
In the present embodiment, the input stage circuit of said difference channel comprises the first current source I1, PMOS difference transistor MP1 and MP2, resistance R 1 and R3, nmos pass transistor MNC1 and MNC3, nmos pass transistor MN1 and MN3.The termination power VIN of the first current source I1; The source electrode of another termination PMOS difference transistor MP1 and MP2; Resistance R 1, nmos pass transistor MNC1 and MN1 are connected between the drain electrode and ground of PMOS difference transistor MP1 successively; The grid of nmos pass transistor MNC1 links to each other with the drain electrode of PMOS difference transistor MP1; Resistance R 3, nmos pass transistor MNC3 and MN3 are connected between the drain electrode and ground of PMOS difference transistor MP2 successively, and the grid of nmos pass transistor MNC3 links to each other with the drain electrode of PMOS difference transistor MP2.The grid of PMOS difference transistor MP1 meets feedback voltage FB, and the grid of PMOS difference transistor MP2 meets reference voltage Ref.
The amplification output-stage circuit of said difference channel comprises PMOS transistor MP3 and the MPC3 that is connected on successively between power supply VIN and the ground, resistance R 2, nmos pass transistor MNC2 and MN2; Be connected on PMOS transistor MP4 and MPC4 between power supply VIN and the ground successively, nmos pass transistor MNC4 and MN4.The grid of PMOS transistor MP3 and MP4 links to each other with the drain electrode of PMOS transistor MPC3; The grid of PMOS transistor MPC3 and MPC4 links to each other with the drain electrode of nmos pass transistor MNC2, and the grid of nmos pass transistor MNC2, MN2, MNC4 and MN4 links to each other with the grid of nmos pass transistor MNC1, MN1, MNC3 and MN3 respectively.The intermediate node of PMOS transistor MPC4 and nmos pass transistor MNC4 amplifies the output of output-stage circuit, its output error amplifying signal EAO for this.
This amplification output-stage circuit forms error amplifier with said input stage circuit; This error amplifier is the error amplifier of band cascade export structure; This structure is very high with the design of the low-frequency gain of error amplifier; So that obtain very high gain around feedback, very high gain around feedback can be realized higher output voltage precision.But, when the multiplexing said input stage circuit of comparator and said error amplifier, can not adopt the connected mode of Fig. 1～3, otherwise the speed of comparator can be very slow, causes and can't normally use.
In the present embodiment; Said relatively output-stage circuit comprises PMOS transistor MP5 and the nmos pass transistor MN5 that is connected between power supply VIN and the ground; Be connected in PMOS transistor MP7 and nmos pass transistor MN7 between power supply VIN and the ground; Extract the second current source I2 of electric current and the inverter INV1 and the INV2 of polyphone, wherein the input termination PMOS transistor MP5 of INV1 and the intermediate node of nmos pass transistor MN5 from the intermediate node of PMOS transistor MP5 and nmos pass transistor MN5; The output of said inverter INV2 compares the output of output-stage circuit for this, its output comparison signal UVP.The grid of PMOS transistor MP5 links to each other with the grid of PMOS transistor MP7; The grid of nmos pass transistor MN7 links to each other with the drain electrode of nmos pass transistor MNC1; The grid of nmos pass transistor MN5 links to each other with the drain electrode of nmos pass transistor MNC3; Compare with the comparison output-stage circuit among Fig. 3, nmos pass transistor MN7 that increases newly and PMOS transistor MP7 be nmos pass transistor MN1 replica current from the lower end, thus the delay of having avoided the cascade structure of error amplifier to cause.
For the purpose of simplifying the description, the present invention has only described PMOS as the execution mode of input to pipe, to one skilled in the art, obviously also can adopt NMOS as the execution mode of input to pipe.
According to top description, also can design the difference channel of error amplifier, overvoltage comparator and the multiplexing input stage circuit of under-voltage comparator.This difference channel comprises relatively output-stage circuit of input stage circuit, under-voltage relatively output-stage circuit and overvoltage; Concrete structure such as can be in Fig. 1 increase a comparison output-stage circuit as shown in Figure 3 again; The concrete those of ordinary skill that connects and illustrate in the affiliated field can be learnt according to aforementioned description, repeats no more here.
Please refer to shown in Figure 5ly, it is the exemplary plot of the application of difference channel in the buck DC to dc power supply changeover device of error amplifier, overvoltage comparator and the multiplexing input stage circuit of under-voltage comparator among the present invention.
Said power supply changeover device comprises the difference channel EA_COMP that realizes error amplifier and overvoltage comparator, the multiplexing input stage circuit of under-voltage comparator; Stabiloity compensation circuit (such as comprising R6 and C6); Pwm comparator PWMC, logical circuit, output circuit is (such as comprising power switch MPX1 and MNX1; Inductance L 1 and capacitor C 1), feedback circuit (such as comprising feedback resistance R1 and R2).Said difference channel EA_COMP is according to feedback voltage FB and reference voltage Ref output error amplifying signal EAO, overvoltage comparison signal OVP, under-voltage comparison signal UVP.Said pwm comparator PWMC compares error amplification signal EAO and sawtooth waveforms Vramp, generates pulse-width signal PWMO, and exports to said logical circuit.Said logical circuit is given said output circuit according to overvoltage comparison signal OVP, under-voltage comparison signal UVP and output pulse width modulation signal PWMO output control signal.Said output circuit generates output voltage according to the control signal of said logical circuit.Said feedback circuit produces said feedback voltage FB according to the output voltage of said output circuit.In the present embodiment, said logical circuit produces power tube drive signal PDRV and NDRV power controlling switch MPX1 and MNX1.Output dc voltage VO after LX signal process inductance L 1 and capacitor C 1 filtering.Voltage VO produces feedback voltage FB through feedback circuit.Constitute feedback circuit thus.
Here be that example has been described the voltage-mode voltage descending DC-DC converter and adopted example of the present invention with Fig. 5; But the present invention obviously also is suitable for various current-mode DC-to-dc converters; Also be suitable for various booster type DC-to-dc converters, and other type DC-to-dc converters.
Principle of the present invention is through making the multiplexing input stage circuit of error amplifier and overvoltage comparator and/or under-voltage comparator, thereby avoids because technology causes the relative deviation that adds, and then makes overvoltage comparator and/or under-voltage comparator more stable work.
Above-mentioned explanation has fully disclosed embodiment of the present invention.It is pointed out that any change that technical staff's specific embodiments of the invention of being familiar with this field is done does not all break away from the scope of claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to previous embodiment.
Claims (5)
1. difference channel is characterized in that it comprises:
Comprise the input stage circuit of first difference transistor and second difference transistor, the grid of first difference transistor is imported first voltage as first input end, and the grid of second difference transistor is imported second voltage as second input;
The amplification output-stage circuit that is connected with said input stage circuit is used for the difference of first voltage and second voltage is amplified back output;
Whether the comparison output-stage circuit that is connected with said input stage circuit is used for comparison first voltage and second voltage difference less than first predetermined value.
2. difference channel according to claim 1 is characterized in that said input stage circuit also comprises first current source, and an end of first current source links to each other with the source class of the source class of first difference transistor and second difference transistor.
3. difference channel according to claim 1; It is characterized in that; Said amplification output-stage circuit comprises the first transistor and the transistor seconds that is connected between power supply and the ground; Node between the first transistor and the transistor seconds is as the output of said amplification output-stage circuit; When said first voltage equaled said second voltage, the electric current on the first transistor was directly proportional with electric current on first difference transistor, and the electric current on the transistor seconds is directly proportional with electric current on second difference transistor.
4. difference channel according to claim 3; It is characterized in that; Said relatively output-stage circuit comprises the 4th transistor and the 5th transistor that is connected between power supply and the ground; Second current source from the 4th transistor and the 5th transistorized intermediate node extraction electric current; Whether the inverter that its input and the 4th transistor link to each other with the 5th transistorized intermediate node, output output reflection first voltage of said inverter and the difference between second voltage less than first predetermined value, when said first voltage equals said second voltage; Electric current on the 4th transistor is directly proportional with electric current on first difference transistor, and the electric current on the 5th transistor is directly proportional with electric current on second difference transistor.
5. power supply changeover device, it comprises pulse-width modulation comparator, logical circuit, output circuit and feedback circuit, it is characterized in that, it also comprises difference channel,
Said difference channel comprises input stage circuit, amplification output-stage circuit that is connected with said input stage circuit and the comparison output-stage circuit that is connected with said input stage circuit; Said input stage circuit comprises first difference transistor and second difference transistor; The grid of first difference transistor is imported the feedback voltage that said feedback circuit provides as first input end; The grid of second difference transistor is as the second input input reference voltage; Said amplification output-stage circuit is exported to said pulse-width modulation comparator after said feedback voltage and said reference voltage difference are amplified; Whether the difference of said relatively more said feedback voltage of output-stage circuit and said reference voltage less than under-voltage threshold value, and comparative result is exported to said logical circuit;
Said pulse-width modulation comparator generates pulse-width signal according to the signal of said amplification output-stage circuit output, and exports to said logical circuit;
Said logical circuit is given said output circuit according to the comparison signal output control signal of said pulse-width signal and the output of said relatively output-stage circuit;
Said output circuit generates output voltage according to the control signal of said logical circuit;
Said feedback circuit produces said feedback voltage according to the output voltage of said output circuit.
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| CN201110410717.XA CN102437847B (en) | 2011-12-09 | 2011-12-09 | Power converter and differential circuit |
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| CN201110410717.XA CN102437847B (en) | 2011-12-09 | 2011-12-09 | Power converter and differential circuit |
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| CN102437847A true CN102437847A (en) | 2012-05-02 |
| CN102437847B CN102437847B (en) | 2014-06-04 |
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| CN201110410717.XA Active CN102437847B (en) | 2011-12-09 | 2011-12-09 | Power converter and differential circuit |
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| CN (1) | CN102437847B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104135149A (en) * | 2014-08-14 | 2014-11-05 | 西安电子科技大学 | Selectable error amplifier and voltage comparator multiplex circuit |
| CN112086945A (en) * | 2020-08-05 | 2020-12-15 | 广东美的白色家电技术创新中心有限公司 | Overvoltage protection circuit and electronic equipment |
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| US20040113224A1 (en) * | 2002-09-11 | 2004-06-17 | Seiko Epson Corporation | Semiconductor integrated circuit |
| CN101159432A (en) * | 2007-11-13 | 2008-04-09 | 东南大学 | CMOS type difference interface circuit |
| CN101295927A (en) * | 2008-06-19 | 2008-10-29 | 北京中星微电子有限公司 | Modified oscillator and decompression power converter |
| CN202424678U (en) * | 2011-12-09 | 2012-09-05 | 无锡中星微电子有限公司 | Power supply converter and differential circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040113224A1 (en) * | 2002-09-11 | 2004-06-17 | Seiko Epson Corporation | Semiconductor integrated circuit |
| CN101159432A (en) * | 2007-11-13 | 2008-04-09 | 东南大学 | CMOS type difference interface circuit |
| CN101295927A (en) * | 2008-06-19 | 2008-10-29 | 北京中星微电子有限公司 | Modified oscillator and decompression power converter |
| CN202424678U (en) * | 2011-12-09 | 2012-09-05 | 无锡中星微电子有限公司 | Power supply converter and differential circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104135149A (en) * | 2014-08-14 | 2014-11-05 | 西安电子科技大学 | Selectable error amplifier and voltage comparator multiplex circuit |
| CN112086945A (en) * | 2020-08-05 | 2020-12-15 | 广东美的白色家电技术创新中心有限公司 | Overvoltage protection circuit and electronic equipment |
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| Publication number | Publication date |
|---|---|
| CN102437847B (en) | 2014-06-04 |
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