CN102376872B - Metal oxide semiconductor (MOS) transistor based on hall effect - Google Patents
Metal oxide semiconductor (MOS) transistor based on hall effect Download PDFInfo
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- CN102376872B CN102376872B CN201010259644.4A CN201010259644A CN102376872B CN 102376872 B CN102376872 B CN 102376872B CN 201010259644 A CN201010259644 A CN 201010259644A CN 102376872 B CN102376872 B CN 102376872B
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Abstract
The invention discloses a metal oxide semiconductor (MOS) transistor based on a hall effect. The MOS transistor comprises a semiconductor substrate and the MOS transistor arranged on the semiconductor substrate, wherein a ferromagnetic region is formed on the semiconductor substrate; a conductive trench of the MOS transistor is positioned in a magnetic field of the ferromagnetic region; and a magnetizing direction of the ferromagnetic region is vertical to the trench current direction of the MOS transistor. When the MOS transistor based on the hall effect is switched on, the loaded magnetic field makes majority carriers moving in the conductive trench deflect towards a direction away from a grid electrode; due to the deflection of the majority current carriers, the section, close to a drain, of the conductive trench of the MOS transistor is expanded; therefore, the parasitic resistance of the drain is reduced effectively.
Description
Technical field
The present invention relates to technical field of semiconductors, more specifically, the present invention relates to a kind of MOS transistor based on Hall effect.
Background technology
Along with the continuous progress of integrated circuit technique, be integrated in semiconductor device quantity on same chip and evolved to present millions of from tens initial hundreds ofs.But when semiconductor device integration density grows with each passing day, its power consumption is corresponding increase also.How to reduce the power consumption of device, day by day become the study hotspot of industry.
For MOS transistor, the dead resistance of drain electrode is a key factor that affects device power consumption.In the time that MOS transistor is opened, source-drain current flows through the dead resistance of described drain electrode, and then has increased device power consumption.The MOS transistor of prior art adopts Implantation to increase the doping content of drain electrode conventionally, to reduce the dead resistance that drains.
But the increase of described drain electrode doping content can cause comparatively significant channel-length modulation, affect the short-channel behavior of device.In addition, in the situation that drain electrode is reverse-biased, drain electrode meeting is extended to grid below, and the parasitic capacitance between grid and drain electrode is increased, and this affects again the decline of device interchange performance.
Summary of the invention
The problem that the present invention solves is to provide a kind of MOS transistor based on Hall effect (hall effect), in the situation that not affecting short-channel behavior, has reduced the drain electrode dead resistance of MOS transistor, has effectively promoted device performance.
For addressing the above problem, the invention provides a kind of MOS transistor based on Hall effect, comprise: Semiconductor substrate, MOS transistor in described Semiconductor substrate, in described Semiconductor substrate, be also formed with ferromagnetic domain, wherein, the conducting channel of MOS transistor is arranged in the magnetic field of described ferromagnetic domain, and the direction of magnetization of described ferromagnetic domain is perpendicular to the channel current direction of MOS transistor.
Optionally, described MOS transistor is N-type MOS transistor, and the direction of magnetization of described ferromagnetic domain is turn 90 degrees along the dextrorotation of Semiconductor substrate plane by channel current direction; Described MOS transistor is P type MOS transistor, and the direction of magnetization of described ferromagnetic domain is rotated counterclockwise 90 degree by channel current direction along Semiconductor substrate plane.
Optionally, described ferromagnetic domain is positioned at the both sides of described MOS transistor along conducting channel direction.
Optionally, described ferromagnetic domain is made up of the ferromagnetic bar or the ferromagnetic domain array that are symmetrically distributed in described conducting channel.
Optionally, described ferromagnetic domain exceedes the length of conducting channel along the length of conducting channel direction.
Optionally, described ferromagnetic domain is film-form.
Optionally, described ferromagnetic domain includes iron, cobalt, nickel or gadolinium element.
Optionally, described ferromagnetic domain comprises soft magnetic bodies or permanent magnet.
Optionally, described ferromagnetic domain is positioned at the back side of Semiconductor substrate.
Optionally, described ferromagnetic domain is arranged in the field isolation structure of Semiconductor substrate.
Optionally, described ferromagnetic domain is arranged in the metal level of interconnection structure in Semiconductor substrate.
Compared with prior art, the present invention has the following advantages:
In the Semiconductor substrate that forms described MOS transistor, be provided with ferromagnetic domain, the magnetic direction that described ferromagnetic domain forms is vertical with the direction of channel current; In the time of MOS transistor conducting, described magnetic field makes the majority carrier moving in conducting channel to the direction deflection away from grid, and the deflection meeting of described majority carrier makes the conducting channel cross section expansion of MOS transistor near drain electrode, thereby effectively reduce the dead resistance of drain electrode.
Accompanying drawing explanation
Fig. 1 shows the vertical view of an embodiment of MOS transistor who the present invention is based on Hall effect;
Fig. 2 a and Fig. 2 b show the MOS transistor that the present invention is based on Hall effect along the generalized section of the AB direction of Fig. 1.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.
Set forth in the following description a lot of details so that fully understand the present invention, implemented but the present invention can also adopt other to be different from alternate manner described here, therefore the present invention is not subject to the restriction of following public specific embodiment.
Just as described in the background section, prior art adopts Implantation to increase the doping content of MOS transistor drain electrode conventionally, to reduce the dead resistance that drains.But the increase of described drain electrode doping content can cause comparatively significant channel-length modulation, has also increased the parasitic capacitance between grid and drain electrode simultaneously.These ghost effects have limited the lifting of MOS transistor device performance.
The present inventor finds, for MOS transistor, in the situation that channel length is determined substantially, the resistance value of drain electrode dead resistance is affected by drain conductivity on the one hand, also depend on the other hand the cross-sectional sizes of conducting channel, the area of section of conducting channel is larger, and drain electrode dead resistance is less.But, for MOS transistor, its conducting channel is to form after the subregion transoid of Semiconductor substrate near grid, in the conducting channel of described transoid, majority carrier concentrates on semiconductor substrate surface, slightly, away from being generally depletion region in gate semiconductor substrate, this cannot effectively expand the cross section of conducting channel, also just cannot form the conducting channel with larger cross-sectional area.
But, if alive semiconductor is placed in to the uniform magnetic field perpendicular to the sense of current, charge carrier (comprising electronics and hole) in described semiconductor can produce induction field because of magnetic fields in the direction perpendicular to the sense of current and magnetic direction, and Hall effect has occurred.And described induction field can be for changing the direction of motion of charge carrier, thereby change the sectional area of conducting channel.
Based on above-mentioned discovery, inventor provides a kind of MOS transistor based on Hall effect, in the Semiconductor substrate that forms described MOS transistor, is provided with the ferromagnetic domain being made up of ferromagnetic material, and the magnetic direction that described ferromagnetic domain forms is vertical with the direction of channel current.In the time of MOS transistor conducting, described magnetic field makes the majority carrier moving in conducting channel to the direction deflection away from grid.And the deflection meeting of described majority carrier makes the conducting channel cross section expansion of MOS transistor near drain electrode, thereby effectively reduce the dead resistance of drain electrode.Because described Hall effect can't affect the doping content of drain electrode, this makes the region (normally shallow doped region) draining near conducting channel position still can keep lower doping content, avoided the impact of channel-length modulation on MOS transistor length of effective channel, the short-channel behavior of MOS transistor is also improved.
Fig. 1 shows the schematic top plan view of the MOS transistor that the present invention is based on Hall effect.Fig. 2 a and Fig. 2 b show the MOS transistor that the present invention is based on Hall effect along the generalized section of the AB direction of Fig. 1.Wherein, Fig. 2 a shows nmos pass transistor, and Fig. 2 b shows PMOS transistor.
The described MOS transistor based on Hall effect comprises: Semiconductor substrate 101, MOS transistor 103 in described Semiconductor substrate 101, ferromagnetic domain 105 in described Semiconductor substrate on 101, wherein, the conducting channel of MOS transistor 103 is arranged in the magnetic field of described ferromagnetic domain 105, and the direction of magnetization of described ferromagnetic domain 105 is perpendicular to the channel current direction of MOS transistor 103.According to the difference of specific embodiment, described MOS transistor 103 can be nmos pass transistor, can be also PMOS transistor.For nmos pass transistor, the direction of magnetization of described ferromagnetic domain 105 is turn 90 degrees along Semiconductor substrate 101 plane dextrorotations by channel current direction; For PMOS transistor, the direction of magnetization of described ferromagnetic domain 105 is rotated counterclockwise 90 degree by channel current direction along Semiconductor substrate 101 planes.
Particularly, described MOS transistor 103 comprises the source electrode 203 and drain electrode 205 of grid 201, grid 201 both sides.When described MOS transistor 103 conducting, the direction of channel current is by the 205 sensing source electrodes 203 that drain.In specific embodiment, described ferromagnetic domain 105 is made up of the strip region or the array region that are symmetrically distributed in outside described conducting channel, and described strip region or array region lay respectively at the both sides of MOS transistor 103 along conducting channel direction, to make to be loaded with on conducting channel region the uniform magnetic field of definite direction.Preferably, described ferromagnetic domain 105 exceedes the length of conducting channel along the length of conducting channel direction, to avoid ferromagnetic domain 105 not form uniform magnetic field in the region of whole conducting channel, and cannot useful effect in channel current.
Described ferromagnetic domain 105 can adopt the ferromagnetic thin film of elements such as including iron, cobalt, nickel or gadolinium to form, and described ferromagnetic thin film can adopt sputter, plating or other metal deposition process to form.Particularly, described ferromagnetic domain 105 can adopt permanent magnet or soft magnetic bodies to form.Magnetic field can " be remembered " in the ferromagnetic domain 105 that adopts permanent magnet to form after being magnetized, and can form the magnetic field that acts on channel current without externally-applied magnetic field; And adopting the ferromagnetic domain 105 that soft magnetic bodies forms in the time of MOS transistor 103 conducting, to magnetize with maintenance by externally-applied magnetic field, described magnetized ferromagnetic domain 105 can form the magnetic field perpendicular to channel current direction in MOS transistor 103.
In specific embodiment, described ferromagnetic domain 105 can be positioned at the back side (not making a side of MOS transistor) of Semiconductor substrate 101, also can be positioned at the front of Semiconductor substrate 101, for example, on the field isolation structure of Semiconductor substrate 101, or in the metal level of interconnection structure.Preferably, described ferromagnetic domain 105 is positioned at the back side of Semiconductor substrate 101.
Next,, in conjunction with the cross-section structure of Fig. 2 a and Fig. 2 b, the operation principle of the MOS transistor that the present invention is based on Hall effect is described.Because edge-crowding effect of current (current crowding effect) only 205 has impact to draining, therefore, for fear of the impact of described edge-crowding effect of current, adding after loaded magnetic field, the conducting channel of adjacent drains 205 need to have wider area of section.
For nmos pass transistor, in the time of described nmos pass transistor conducting, the direction of channel current is by the 205 sensing source electrodes 203 that drain, corresponding, and the direction of motion of electronics 209 (majority carrier) and channel current opposite direction point to drain electrode 205 by source electrode 203.And the vertical paper of magnetic direction that ferromagnetic domain (not shown) is introduced is inside.In described magnetic field, electronics 209 is subject to the Lorentz force effect away from grid 201, thereby the area of section of channel current is increased to drain electrode 205 gradually by source electrode 203.The position joining at drain electrode 205 and conducting channel, the cross section of described channel current far exceedes the cross section of the MOS transistor while not adding loaded magnetic field.The expansion of described cross section has been equivalent to expand the cross section of conducting channel, thereby has reduced by 205 the dead resistance of draining.
In specific embodiment, described ferromagnetic domain exceedes the length of pipe conducting channel along the length of MOS transistor conducting channel direction.Therefore, described ferromagnetic domain can form uniform magnetic field in whole conducting channel, described uniform magnetic field has definite magnetic direction, can make charge carrier in conducting channel all the time by Lorentz force effect and deflect, thereby obtain comparatively broad cross section at conducting channel and source electrode or drain electrode adjacent area.
For PMOS transistor, be similar to nmos pass transistor, in the time of described PMOS transistor turns, the direction of channel current is by the 205 sensing source electrodes 203 that drain, accordingly, the direction of motion in hole 210 (majority carrier) is identical with channel current direction, points to source electrode 203 by drain electrode 205, and the magnetic direction that ferromagnetic domain (not shown) is introduced vertical paper is outside.Described magnetic field makes hole 210 be subject to the Lorentz force effect away from grid 201, thereby the area of section of channel current is increased to drain electrode 203 by source electrode 205 gradually.The cross section expansion of described channel current has reduced by 205 the dead resistance of draining equally.
Should be appreciated that, example herein and embodiment are only exemplary, and those skilled in the art can, in the case of not deviating from the spirit and scope of the present invention that the application and claims limit, make various modifications and corrigendum.
Claims (10)
1. the MOS transistor based on Hall effect, comprise: Semiconductor substrate, MOS transistor in described Semiconductor substrate, it is characterized in that, in described Semiconductor substrate, be also formed with ferromagnetic domain, wherein, the conducting channel of MOS transistor is arranged in the magnetic field of described ferromagnetic domain, and the direction of magnetization of described ferromagnetic domain is perpendicular to the channel current direction of MOS transistor; Wherein, in the time of MOS transistor conducting, described magnetic field makes the majority carrier moving in described conducting channel to the direction deflection away from grid.
2. MOS transistor as claimed in claim 1, is characterized in that, described ferromagnetic domain is positioned at the both sides of described MOS transistor along conducting channel direction.
3. MOS transistor as claimed in claim 2, is characterized in that, described ferromagnetic domain is made up of the ferromagnetic bar or the ferromagnetic domain array that are symmetrically distributed in outside described conducting channel.
4. MOS transistor as claimed in claim 1, is characterized in that, described ferromagnetic domain exceedes the length of conducting channel along the length of conducting channel direction.
5. MOS transistor as claimed in claim 1, is characterized in that, described ferromagnetic domain is film-form.
6. MOS transistor as claimed in claim 1, is characterized in that, described ferromagnetic domain includes iron, cobalt, nickel or gadolinium element.
7. MOS transistor as claimed in claim 6, is characterized in that, described ferromagnetic domain comprises soft magnetic bodies or permanent magnet.
8. MOS transistor as claimed in claim 1, is characterized in that, described ferromagnetic domain is positioned at the back side of Semiconductor substrate.
9. the MOS transistor as described in claim 1 or 3, is characterized in that, also includes an isolation structure in described Semiconductor substrate, and described ferromagnetic domain is arranged in described isolation structure.
10. MOS transistor as claimed in claim 1, is characterized in that, is also formed with interconnection structure in described Semiconductor substrate, and described ferromagnetic domain is arranged in the metal level of described interconnection structure.
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| CN102683377A (en) * | 2012-06-15 | 2012-09-19 | 湖南追日光电科技有限公司 | Double-drain type CMOS magnetic field induction transistor and fabricating method thereof |
| US9728581B2 (en) * | 2015-11-04 | 2017-08-08 | Texas Instruments Incorporated | Construction of a hall-effect sensor in a buried isolation region |
| CN105932153B (en) * | 2016-06-13 | 2018-06-12 | 中国科学院半导体研究所 | A kind of magnetism unusual hall transistors of room temperature lower piezoelectric regulation and control |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5652445A (en) * | 1995-04-21 | 1997-07-29 | Johnson; Mark B. | Hybrid hall effect device and method of operation |
| CN1279765A (en) * | 1997-10-18 | 2001-01-10 | 西门子公司 | Method for detecting current of spin polarized electrons in solid body |
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| JPS62269405A (en) * | 1986-05-16 | 1987-11-21 | Nec Corp | Mos-fet magnetic modulation circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5652445A (en) * | 1995-04-21 | 1997-07-29 | Johnson; Mark B. | Hybrid hall effect device and method of operation |
| CN1279765A (en) * | 1997-10-18 | 2001-01-10 | 西门子公司 | Method for detecting current of spin polarized electrons in solid body |
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| JP昭62-269405A 1987.11.21 |
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