Summary of the invention
In the summary of the invention part, introduced the notion of a series of reduced forms, this will further explain in the embodiment part.Summary of the invention part of the present invention does not also mean that key feature and the essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range of attempting to confirm technical scheme required for protection.
In order to solve ultraviolet photon entering gate oxide and semiconductor device to be had a negative impact, the present invention proposes a kind of semiconductor device structure, and said semiconductor device structure comprises:
Front end device layer structure;
The ultravioletlight screening layer, said ultravioletlight screening layer is formed on the surface of said front end device layer structure; And
Stressor layers, said stressor layers is formed on the top of said ultravioletlight screening layer.
Further, said stressor layers is through the stressor layers after the ultraviolet irradiation.
Further, said stressor layers is as etching stop layer.
Further, said ultravioletlight screening layer is a silicon oxynitride layer.
Further, the thickness of said silicon oxynitride layer is 100~150 dusts.
Further, the reflectivity of said silicon oxynitride layer is 1.9~2.1, and absorptivity is 0.4~0.7.
Further, said stressor layers is at least 2 layers.
Further, said stressor layers is a silicon nitride layer.
The present invention also provides a kind of method of making aforesaid semiconductor device structure, and said method comprises:
A) front end device layer structure is provided;
B) form the ultravioletlight screening layer on the surface of said front end device layer structure; And
C) above said ultravioletlight screening layer, form stressor layers.
Further, said method also comprises:
D) with the said stressor layers of ultraviolet irradiation.
Further, repeat said step c) and d successively) at least 2 times.
Further, said stressor layers is as etching stop layer.
Further, said ultravioletlight screening layer is a silicon oxynitride layer.
Further, using plasma strengthens chemical gaseous phase depositing process and forms said silicon oxynitride layer.
Further, the reacting gas that generates said silicon oxynitride layer comprises silane and nitrogen oxide.
Further, the flow velocity of said silane is 300~400sccm, and the flow velocity of said nitrogen oxide is 600~800sccm, and the frequency of radio-frequency power supply is 150~300Hz, and temperature is 400~480 ℃.
Further, the thickness of said silicon oxynitride layer is 100~150 dusts.
Further, the reflectivity of said silicon oxynitride layer is 1.9~2.1, and absorptivity is 0.4~0.7.
Further, said stressor layers is a silicon nitride layer.
Further, the power of said ultraviolet irradiation is 2000~4000W.
Further, the temperature of said ultraviolet irradiation is 350~480 ℃.
Further, the time of said ultraviolet irradiation is 2~3min.
In sum, the photon that semiconductor device structure of the present invention can avoid ultraviolet irradiation to produce gets into gate oxide, thereby has avoided producing the electron hole in the gate oxide, thereby has improved quality of semiconductor devices; Secondly, simple, the easy row of the method for making semiconductor device structure of the present invention can be avoided the infringement of ultraviolet photon to gate oxide effectively, thereby guarantee the quality of device.
Embodiment
In the description hereinafter, a large amount of concrete details have been provided so that more thorough understanding of the invention is provided.Yet, it will be apparent to one skilled in the art that the present invention can need not one or more these details and be able to enforcement.In other example,, describe for technical characterictics more well known in the art for fear of obscuring with the present invention.
In order thoroughly to understand the present invention, will in following description, detailed steps be proposed, so that explanation the present invention is semiconductor device structure and the method for making this semiconductor device structure.Obviously, execution of the present invention is not limited to the specific details that the technical staff had the knack of of semiconductor applications.Preferred embodiment of the present invention is described in detail as follows, yet except these were described in detail, the present invention can also have other execution modes.
It should be noted that employed term only is in order to describe specific embodiment here, but not the intention restriction is according to exemplary embodiment of the present invention.As used herein, only if context spells out in addition, otherwise singulative also is intended to comprise plural form.In addition; It is to be further understood that; When using a technical term " comprising " and/or " comprising " in this manual; It indicates and has said characteristic, integral body, step, operation, element and/or assembly, does not exist or additional one or more other characteristics, integral body, step, operation, element, assembly and/or their combination but do not get rid of.
For the ease of describing; Here can the usage space relative terms; As " ... under ", " ... on ", " following ", " in ... top ", " top " etc., be used for describing spatial relation like an element shown in the figure or characteristic and other elements or characteristic.Should be understood that the space relative terms is intended to comprise the different azimuth in using or operating the orientation of being described in the drawings except device.For example, if the device in the accompanying drawing is squeezed, then be described as to be positioned as " above other elements or characteristic " or " on other elements or characteristic " after the element of " in other elements or beneath " or " under other elements or characteristic ".Thereby exemplary term " in ... below " can comprise " in ... top " and " in ... below " two kinds of orientation.This device also can other different modes location (revolve turn 90 degrees or be in other orientation), and employed space relative descriptors is here made respective explanations.
Now, will describe in more detail according to exemplary embodiment of the present invention with reference to accompanying drawing.Yet these exemplary embodiments can multiple different form be implemented, and should not be interpreted as the embodiment that is only limited to here to be set forth.Should be understood that, provide these embodiment of the present inventionly to disclose thoroughly and complete, and the design of these exemplary embodiments fully conveyed to those of ordinary skills in order to make.In the accompanying drawings, for the sake of clarity, exaggerated the thickness in layer and zone, and used the identical Reference numeral to represent components identical, thereby will omit description of them.
[first embodiment]
At first, with reference to figure 2, show the sketch map of semiconductor device structure according to an embodiment of the invention.As shown in the figure, semiconductor device structure of the present invention comprises front end device layer structure 210, ultravioletlight screening layer 220 and stressor layers 230.
Under normal conditions, front end device layer structure 210 comprises formed device architecture layer in the preorder technology.
As an example; Front end device layer structure 210 comprises substrate 201; Be formed on the gate oxide 202 and polysilicon gate 203 on substrate 201 surfaces from bottom to top successively; And around the sidewall structure 204 of said polysilicon gate 203, and the source/drain region 205/206 in the substrate 201 in the outside that is formed on sidewall structure 204 of mixing.Can have the p type impurity or the N type impurity that mix and form through modes such as ion injections in said source/drain region 205/206.
Further, the material that constitutes substrate 201 can be unadulterated monocrystalline silicon, be doped with the monocrystalline silicon or the silicon-on-insulator (SOI) of impurity, can also comprise other materials, for example indium antimonide, lead telluride, indium arsenide, GaAs or gallium antimonide etc.
In addition, should be noted that front end device layer structure 210 as herein described is not to be restrictive, but can also have other structures.For example, the surface of substrate 201 can also have the groove (not shown) that is formed with germanium silicon stressor layers; Source/drain region 205/206 can also be formed has lightly doped drain (LDD) structure; The zone that the needs of front end device layer structure 210 connect outward possibly also be formed with metal silicide; Deng.
As an example, the surface of front end device layer structure 210 is formed with ultravioletlight screening layer 220.
Further; Because silicon oxynitride (SiON) is obtained than being easier to; And it has preferably the screening ability (comprise and absorbing and reflection) to ultraviolet photon; And the less stress of its upper stress layer reduced, so under preferred condition, select the material of silicon oxynitride as the ultravioletlight screening layer.But, it will be appreciated by those skilled in the art that and can also select the material that other can the shielding ultraviolet rays photon.
Further, for shielding ultraviolet rays photon preferably, the reflectivity of generally adjusting the SiON layer is 1.9~2.1, and absorptivity is 0.4~0.7.Generally, said reflectivity and absorptivity are meant the reflectivity and the absorptivity of visible light.Like this, most of ultraviolet photon is absorbed by the SiON layer, and can not can be reflected by the photon that the SiON layer absorbs.
Further, for fear of of the stress generation bigger reduction of SiON layer, need the thickness of control SiON layer to its upper stress layer.Yet, if the thickness of SiON layer is too big, can have a strong impact on the tensile stress of stressor layers, and if the thickness of SiON layer is too little, can not have good protective action again.Therefore, the thickness of setting the SiON layer is 100~150 dusts, 120 dusts for example, 130 dusts, 140 dusts etc.
Should be noted that; It is obvious that to those skilled in the art; Because it is different to make the production line of semiconductor device; The specification of required semiconductor device and quality etc. require also different, therefore, possibly cause the material of said ultravioletlight screening layer, the thickness that forms position, ultravioletlight screening layer and parameters such as reflectivity, absorptivity difference to some extent.Those skilled in the art can rationally confirm the parameters of ultravioletlight screening layer according to actual conditions, so that the ultraviolet photon conductively-closed, thereby make the semiconductor device structure that obtains having superperformance.
As an example, the top of ultravioletlight screening layer 220 is formed with stressor layers 230.
Further, select the material of silicon nitride (SiN) as stressor layers 230.
Further, said stressor layers 230 can be undressed common stressor layers, also can be the stressor layers 230 that after ultraviolet irradiation, has the stress that has strengthened.Further, in order to strengthen the stress of stressor layers 230, form n ply stress layer on the surface of ultravioletlight screening layer 220 usually, and each ply stress layer is carried out ultraviolet irradiation.Under preferred situation, n is more than or equal to 2.
Further, stressor layers 230 can be used as etching stop layer or other layers structure.And,, can also use ultraviolet irradiation stressor layers 230 in order to strengthen the stress of stressor layers 230.
Should be noted in the discussion above that difference, also possibly be formed with other layers structure between ultravioletlight screening layer 220 and the stressor layers 230 according to production technology.But under preferred situation; For the effect that makes the shielding photon reaches optimum; The influence that also produces for the stress that makes counter stress layer 230 is as far as possible little; And avoid because newly-increased ultravioletlight screening layer 220 and other structures and the performance of device exerted an influence, stressor layers 230 is formed directly into the surface of ultravioletlight screening layer 220. as far as possible
In sum, the photon that semiconductor device structure of the present invention can avoid ultraviolet irradiation to produce gets into gate oxide, thereby has avoided producing the electron hole in the gate oxide, thereby has improved quality of semiconductor devices.
[second embodiment]
Specify manufacture method below with reference to Fig. 3 A to 3C and Fig. 4 according to the semiconductor device structure of one embodiment of the present invention.
At first, shown in Fig. 3 A, front end device layer structure 310 is provided.
Under normal conditions, front end device layer structure 310 comprises formed device architecture layer in the preorder technology.
As an example; Front end device layer structure 310 comprises substrate 301; Be formed on the gate oxide 302 and polysilicon gate 303 on substrate 301 surfaces from bottom to top successively; And around the sidewall structure 304 of said polysilicon gate 303, and the source/drain region 305/306 in the substrate 301 in the outside that is formed on sidewall structure 304 of mixing.Can have the p type impurity or the N type impurity that mix and form through modes such as ion injections in said source/drain region 305/306.
Further, the material that constitutes substrate 301 can be unadulterated monocrystalline silicon, be doped with the monocrystalline silicon or the silicon-on-insulator (SOI) of impurity, can also comprise other material, for example indium antimonide, lead telluride, indium arsenide, GaAs or gallium antimonide etc.
In addition, should be noted that front end device layer structure 310 as herein described is not to be restrictive, but can also have other structures.For example, the surface of substrate 301 can also have the groove (not shown) that is formed with germanium silicon stressor layers; Source/drain region 305/306 can also be formed has lightly doped drain (LDD) structure; The zone that the needs of front end device layer structure 310 connect outward possibly also can be formed with metal silicide; Deng.
Then, shown in Fig. 3 B, form ultravioletlight screening layer 320 on the surface of front end device layer structure 310.
Further; Because silicon oxynitride (SiON) is obtained than being easier to; And it has preferably the screening ability (comprise and absorbing and reflection) to ultraviolet photon; And the less stress of its upper stress layer reduced, so under preferred condition, select the material of silicon oxynitride as the ultravioletlight screening layer.But, it will be appreciated by those skilled in the art that and can also select the material that other can the shielding ultraviolet rays photon.
Further, for shielding ultraviolet rays photon preferably, the reflectivity of generally adjusting the SiON layer is 1.9~2.1, and absorptivity is 0.4~0.7.Generally, said reflectivity and absorptivity are meant the reflectivity and the absorptivity of visible light.Like this, most of ultraviolet photon is absorbed by the SiON layer, and can not can be reflected by the photon that the SiON layer absorbs.
Further, for fear of of the stress generation bigger reduction of SiON layer, need the thickness of control SiON layer to its upper stress layer.Yet, if the thickness of SiON layer is too big, can have a strong impact on the tensile stress of stressor layers, and if the thickness of SiON layer is too little, can not have good protective action again.Therefore, the thickness of setting the SiON layer is 100~150 dusts, 120 dusts for example, 130 dusts, 140 dusts etc.
Therefore; As an example; Can select methods such as CVD (chemical vapour deposition (CVD)), sputter to form ultravioletlight screening layer 320, but under preferred situation, using plasma strengthen chemical vapour deposition (CVD) (PECVD) method and form ultravioletlight screening layer 320 on the surface of front end device layer structure 310.
Further, in order to obtain to have the SiON layer of aforesaid parameter, select silane and nitrogen oxide, and the flow velocity of setting silane is 300~400sccm as the reacting gas that generates SiON, for example, 350sccm, 380sccm etc.; The flow velocity of nitrogen oxide is 600~800sccm, for example, and 650sccm, 700sccm, 750sccm etc.; The frequency range of radio-frequency power supply is 150~300Hz, for example, and 200Hz, 260Hz etc.; Temperature is 400~480 degrees centigrade, for example, 420 degrees centigrade, 460 degrees centigrade.Wherein, sccm is under the standard state, just the flow of 1 atmospheric pressure, 25 degrees centigrade of following per minutes 1 cubic centimetre (1ml/min).And, in order to reduce manufacturing cost, save manufacturing time, usually growth SiON layer in the growth chamber that forms front end device layer structure 310.
Should be noted in the discussion above that and it will be appreciated by those skilled in the art that and to select the material that other can the shielding ultraviolet rays photon.Further; It is obvious that to those skilled in the art; Because it is different to make the production line of semiconductor device; The specification of required semiconductor device and quality etc. require also different, therefore, possibly cause the material of said ultravioletlight screening layer, the thickness that forms position, ultravioletlight screening layer and parameters such as reflectivity, absorptivity difference to some extent.Those skilled in the art can rationally confirm the parameters of ultravioletlight screening layer according to actual conditions, so that the ultraviolet photon conductively-closed, thereby make the semiconductor device structure that obtains having superperformance.
Then, shown in Fig. 3 C, above ultravioletlight screening layer 320, form stressor layers 330, then, with ultraviolet irradiation stressor layers 330.
As an example, select the material of silicon nitride (SiN) as stressor layers.
As an example, can select methods such as CVD (chemical vapour deposition (CVD)), sputter to form stressor layers 330.
Further, in order to strengthen the stress of stressor layers 330, adopt ultraviolet irradiation counter stress layer 330 to handle usually, general irradiation power is 2000~4000W, and temperature is 350~480 ℃, prolonged exposure 2~3min.
In addition, said stressor layers 330 can be undressed common stressor layers, also can be the stressor layers 330 that after ultraviolet irradiation, has the stress that has strengthened.Under preferred situation; For proof stress layer 330 has stress effect preferably; Usually form n ply stress layer from bottom to top successively on the surface of ultravioletlight screening layer, and after having formed each ply stress layer, this each ply stress layer is shone with ultraviolet ray.Under preferred situation, n is more than or equal to 2.
Further, stressor layers 330 can be used as etching stop layer or other layers structure.And,, can also use ultraviolet irradiation stressor layers 330 in order to strengthen the stress of stressor layers 330.
Should be noted in the discussion above that difference, also possibly be formed with other layers structure between ultravioletlight screening layer 320 and the stressor layers 330 according to production technology.But under preferred situation; For the effect that makes the shielding photon reaches optimum; The influence that also produces for the stress that makes counter stress layer 330 is as far as possible little; And avoid because newly-increased ultravioletlight screening layer 320 and other structures and the performance of device exerted an influence, stressor layers 330 is formed directly into the surface of ultravioletlight screening layer 320. as far as possible
Below with reference to Fig. 4, the manufacture method of semiconductor device structure of the present invention is described in detail.
At first, in step S401, front end device layer structure is provided, this front end device layer structure comprises formed device architecture layer in the preorder technology.
Then, in step S402, form the ultravioletlight screening layer on the surface of front end device layer structure.
At last, in step S403, above the ultravioletlight screening layer, form stressor layers to obtain semiconductor device structure.
Further, S404 in steps, with the said stressor layers of ultraviolet irradiation to strengthen the stress of stressor layers.
Under preferred situation, execution in step S403 and S404 repeatedly above the ultravioletlight screening layer, forming n ply stress layer from bottom to top successively, and after having formed each ply stress layer, shine this each ply stress layer with ultraviolet.Under preferable case, n is more than or equal to 2.
In sum, simple, the easy row of the method for making semiconductor device structure of the present invention can be avoided the infringement of ultraviolet photon to gate oxide effectively, thereby guarantee the quality of device.
The present invention is illustrated through the foregoing description, but should be understood that, the foregoing description just is used for for example and illustrative purposes, but not is intended to the present invention is limited in the described scope of embodiments.It will be appreciated by persons skilled in the art that in addition the present invention is not limited to the foregoing description, can also make more kinds of variants and modifications according to instruction of the present invention, these variants and modifications all drop in the present invention's scope required for protection.Protection scope of the present invention is defined by appended claims book and equivalent scope thereof.