CN102354963B - Fast triggering system of resonant current limiter thyristor valve and working method of fast triggering system - Google Patents
Fast triggering system of resonant current limiter thyristor valve and working method of fast triggering system Download PDFInfo
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- CN102354963B CN102354963B CN201110252086.3A CN201110252086A CN102354963B CN 102354963 B CN102354963 B CN 102354963B CN 201110252086 A CN201110252086 A CN 201110252086A CN 102354963 B CN102354963 B CN 102354963B
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Abstract
The invention relates to a fast triggering system of a resonant current limiter thyristor valve and a working method of the fast triggering system. The system mainly comprises a sampling module, a controller, a clock circuit, a triggering unit and an alarm circuit, wherein the sampling module is used for sampling line current and resonance voltage difference signal at high speed; the clock circuit is used for providing an overall clock signal and providing a reference time for the system; and the controller is used for realizing a fault recognition logic matching scheme by adopting a field programmable technology and converting a criteria signal into a thyristor valve triggering signal. A model experiment indicates that the resonance voltage difference recognition method can provide a criteria output signal within 1ms. The fast triggering system disclosed by the invention has the advantages of fast recognizing short-circuit fault and avoiding faults, such as switch reclosing, system disconnection, and the like.
Description
Technical field
The present invention relates to field of power, particularly a kind of resonant current limiter thyristor valve rapid triggering system and method for work.
Background technology
Large load center short circuit current exceeds standard becomes the key factor of restriction power network development.Series resonance-type flow restricter, because principle is simple, safe and reliable, economical rationality, becomes the practical flow restricter that is applied to 500kV supergrid.Series resonance-type flow restricter principle is as follows: the current-limiting reactor capacitor of industrial frequency resonance with it of connecting; During short trouble, capacitor, by bypass fast, is equivalent to current-limiting reactor and drops into.The key that realizes flow restricter active current-limiting function is the quick bypass of capacitor.Bypass circuit responsiveness has determined that flow restricter drops into speed, and the reduction of the insulation coordination of bypass circuit high speed closed pair device, overvoltage protection, the through-flow level of circuit is all very favourable in addition.
Rapid triggering system is the key link of flow restricter bypass circuit.The protection criterion of triggering system depends on amplitude of short circuit and current differential value.This protection criterion has high reliability in engineering, but the triggered time reaches 5 milliseconds, still has difficulties, former because following aspect:
1, short trouble recognition methods speed is fast not enough.Current amplitude and rate of change can directly embody fault message fast, but current amplitude is subject to the impact of fault phase and distance, and current changing rate is easily subject to the interference of high-frequency noise.In order to prevent erroneous judgement, criterion Threshold is higher, and will repeatedly relatively confirm, has affected the protection criterion outlet time.
2, signal transmission link is too much, causes certain time delay.Patent " a kind of thyristor valve trigger of fault current limiter and monitoring system " has proposed thyristor valve trigger and monitoring coded system.Host computer sends triggering signal to valve base electronic device (VBE), and VBE is transmitted to trigger board again, and trigger board is sent trigger impulse to thyristor valve.Signals transmission is through links such as detection, communication, analog-to-digital conversion, short circuit current identification, pulse codes.Because signal will transmit at high electronegative potential platform, time of implementation flower is too much in communication link.
Summary of the invention
The present invention be directed to the flow restricter speed of devoting oneself to work and can not meet the problem of system, proposed a kind of resonant current limiter thyristor valve rapid triggering system and method for work, there is good quick-action and reliability.
Technical scheme of the present invention is: a kind of resonant current limiter thyristor valve rapid triggering system, comprise sampling module, controller, clock circuit, trigger element and warning circuit, sampling module adopts high-speed parallel analog to digital converter, sampling module sampling circuit electric current and resonance voltage differential signal carry out after analog-to-digital conversion, signal is sent into and in controller, carried out logical process, output a control signal to trigger element, trigger element outputs to controlled thyristor, output signal is to warning circuit simultaneously, clock circuit provides clock signal for controller, controller outputs a control signal to sampling module and starts sampling.
It is high-speed parallel AD conversion chip that described sampling module is selected sampling A/D chip, and controller is selected FPGA programmable gate array chip.
A kind of resonant current limiter thyristor valve rapid triggering system works method, it is characterized in that, while having electric current to flow through in resonant element, if the poor threshold value that reaches action of resonance potential, resonance potential is poor forms short trouble signal with short circuit current criterion after logical AND gate, and this signal is through converting the conducting of thyristor valve trigger signal rapid triggering flow restricter thyristor to; When resonance potential is poor, reach action threshold value but while not having electric current to flow through in current element, electric current criterion after an inverter and resonance voltage difference judged result through a logical AND gate, form disconnection fault outlet again, the output of open circuit fault signal sends warning signal; In reclosing process, by the poor criterion locking of resonance potential, wait when flow restricter resonating device both end voltage is poor to be decayed under judgement operating value, open the poor criterion of resonance potential.
Beneficial effect of the present invention is: resonant current limiter thyristor valve rapid triggering system of the present invention and method of work, there is good quick-action and sensitivity, and guarantee the safety of system simultaneously, to further developing of electrical network, provide technical assurance.
Accompanying drawing explanation
Fig. 1 is resonant current limiter thyristor valve rapid triggering systematic schematic diagram of the present invention;
Fig. 2 is resonant current limiter thyristor valve rapid triggering system circuit diagram of the present invention;
Fig. 3 is resonant current limiter thyristor valve rapid triggering system logic system block diagram of the present invention;
Fig. 4 is resonant current limiter thyristor valve rapid triggering system experimentation main circuit diagram of the present invention;
Fig. 5 is resonant current limiter thyristor valve rapid triggering system hardware circuit diagram of the present invention;
Fig. 6 is resonant current limiter thyristor valve rapid triggering software flow figure of the present invention;
Fig. 7 is resonant current limiter thyristor valve rapid triggering system resonance voltage difference oscillogram of the present invention;
Fig. 8 is resonant current limiter thyristor valve rapid triggering system criterion outlet time statistical chart of the present invention.
Embodiment
Flow restricter body fault-signal refers to short circuit current signal, resonant capacitance voltage signal and current-limiting reactor voltage signal.Body fault-signal enters recognition unit module after transducer adopts.What identification module adopted is the poor method for quickly identifying of resonance potential.Recognition methods is judged after short trouble, sends criterion signal and triggers and monitoring means to photoelectricity, and trigger element sends triggering signal to thyristor electronic board TE, and TE plate sends triggering signal again to thyristor, makes thyristor action, as shown in Figure 1 systematic schematic diagram.
During stable state, due to current limiting element industrial frequency resonance, current-limiting reactor voltage equates with resonant capacitance voltage magnitude, opposite direction, so the difference of both scalars is 0.During short circuit, because aperiodic component exists, inductance both end voltage value is undergone mutation, and electric capacity both end voltage is almost constant, thereby causes that larger saltus step occurs resonant element voltage difference, because saltus step amplitude is relatively large, this signal can be used as the reliable basis of fault judgement.The poor method of resonance potential has two large advantages: the size that 1, the poor method of resonance potential is affected by other factors the poor method of minimum resonance potential exists this feature of aperiodic component to cause by short circuit current, is not substantially subject to the interference of other factors.2, the poor method setting value of resonance potential is less.After short trouble occurs, poor being close to of resonance potential is the process of growing out of nothing, thereby this criterion has good quick-action and sensitivity.
Rapid triggering system is utilized the characteristic of programmable hardware technology (FPGA programmable gate array) processing logic function, signal is processed to concentrate in trigger board completing, and can effectively save the expense that signal transmits, and has improved rapidity and the reliability of triggering system.System is mainly by sampling module, timer, logic judgment module, and the composition such as signal conversion module.Sampling module high-speed sampling line current, resonance potential difference signal; Timer provides global clock signal, for system provides a fiducial time; Logic judgment module realizes Fault Identification logic coordinated scheme, and this module belongs to the software engineering in Programmable Technology; Signal conversion module converts criterion signal to thyristor valve trigger signal.Model experiment shows that the poor recognition methods of resonance potential can provide criterion outlet signal in 1ms.
Triggering system core component is logic judgment module.When system breaks, resonating device two ends there will be resonance potential poor equally, and therefore, this criterion cannot be avoided the impact of broken string on fault judgement, and resonance potential is poor need to be coordinated with short circuit current criterion.Circuit breaker is in reclosing process, and because capacitor port voltage does not discharge completely, the poor criterion of resonance potential also can be judged by accident, therefore need to match with breaker closing signal.
This module implementation is as follows: while 1, having electric current to flow through in current element, if the poor threshold value that reaches action of resonance potential is judged to be short trouble, now, this device sends short trouble signal; When resonance potential is poor, reaches action threshold value but while not having electric current to flow through in current element, be now judged to be disconnection fault.2, in reclosing process by the poor criterion locking of resonance potential.After reclosing completes, circuit enters stable state when waiting until that flow restricter resonating device both end voltage is poor and decaying under criterion action threshold value, more open this device, to guarantee that current limiter controller can be in the moment misoperation of closing a floodgate by current limiting reactor input coefficient.
Triggering system is circuit diagram as shown in Figure 2.System is mainly comprised of sampling module, timer, logic judging circuit, controller and signal conversion module etc.
Logic unit is divided as described in Figure 3, and sampling A/D chip adopts high-speed parallel analog to digital converter, sampling circuit electric current, resonance potential difference signal, and carry out analog-to-digital conversion; Timer provides global clock signal, and for system provides a fiducial time, counter can be with crystal oscillator or FPGA internal clock signal; Controller adopts field-programmable device, and this controller is controlled the enabling signal of analog to digital converter, carries out logic module processing etc., after logic judgement provides failure criterion signal, trigger element to receive signal, triggers at once thyristor.
Fig. 3 is logic system block diagram, normal operation period, and resonance potential is poor forms the outlet of open circuit fault with electric current judged result after a logical AND gate, when device is judged as system and is short-circuited fault, this signal rapid triggering flow restricter thyristor conducting,
judged result forms disconnection fault outlet with resonance voltage difference judged result through a logical AND gate after an inverter, when device is judged as disconnection fault, can send out a warning signal.In the judgement of combined floodgate logic, introduce circuit-breaker status the poor criterion of resonance potential is gone out to atretostomia.Adopt Real-Time Monitoring resonance potential difference to control, the poor criterion operating value that decays to of resonance potential by the time being caused by combined floodgate
under, escape the poor impact on device of the resonance potential producing by closing a floodgate.
under the various operational factors of desirable system of adjusting of value, resonance potential is poor decays to below operating value and leaves certain safety allowance.
Experiment main circuit as shown in Figure 4.Performance time response of this experiment purpose checking rapid triggering system, so experiment condition is small voltage electric current.Main circuit parameter is as follows: power supply is the adjustable alternating-current voltage source of 50V,
l=600mH, required resonant capacitance
c=16.9uF,
r=100 Ω,
s 1 ,
s 2 for short dot.The electric capacity that meets experiment condition is 4.7uF, and needing the number of shunt capacitance is 4, and resonance impedance presents capacitive.Experiment shows, electric current 200mA while normally working, and when joint switch S 1 closure,
can saltus step to 2 times more than of normal value.And the size of this value varies in size with experimental voltage and difference.
According to rapid triggering system design philosophies, hardware circuit is realized as shown in Figure 5.Sampling A/D chip is selected 12 chips of AD1674 high-speed parallel, 128 points of each periodic sampling of sampling, and sampling rate is 12.8k/s.FPGA adopts the ProASIC3 A3P060 VQG100FPGA chip of Actel company, and chip has 60K system door scale, 18kSRAM, 71 I/O.Timer is realized by FPGA internal clocking.FPGA realizes logic judgement, and AD control signal is provided.Fault provides alarm signal after occurring.
According to logic matching relationship, software realization flow as shown in Figure 6.The 6.4kHz pulse of frequency divider output is controlled AD1674 chip information source is carried out to cycle 128 point samplings.After AD EOC, result is sent into comparator and setting threshold compares.If send failure criterion signal when sampled value is greater than setting threshold.
Experimental threshold values is chosen, and current threshold is 150mA, and current changing rate threshold value is 34A/s, and resonance potential difference limen value is 6.8V.Typical fault record waveform as shown in Figure 7.The level signal of jumping in figure is the poor criterion outlet of resonance potential signal, and curve is resonance potential difference signal.Short trouble has been done to 20 groups at random, and the Statistical Criterion outlet time as shown in Figure 8.Timing statistics result shows, the poor average response time of resonance potential is at 0.6ms, and current changing rate average response time is at 2ms, and short circuit current average response time is at 6ms.
Claims (1)
1. a resonant current limiter thyristor valve rapid triggering system works method, application resonant current limiter thyristor valve rapid triggering system, it comprises sampling module, controller, logic judging circuit, clock circuit, trigger element and warning circuit, sampling module adopts high-speed parallel analog to digital converter, sampling module sampling circuit electric current and resonance voltage differential signal carry out after analog-to-digital conversion, signal is sent into and in logic judging circuit, carried out logical process, logic judging circuit outputs a control signal to trigger element, trigger element output triggering signal is to controlled thyristor, logic judging circuit simultaneously output signal arrives warning circuit, clock circuit provides clock signal for controller, controller outputs a control signal to sampling module and starts sampling, described sampling module is selected high-speed parallel AD conversion chip, and controller is selected FPGA programmable gate array chip, it is characterized in that, while having electric current to flow through in current element, if the poor action threshold value that reaches of resonance potential, resonance potential is poor forms short trouble signal with short circuit current criterion after logical AND gate, and this signal becomes the conducting of thyristor valve trigger signal rapid triggering flow restricter thyristor through conversion, when resonance potential is poor, reach action threshold value but while not having electric current to flow through in current element, be that short circuit current criterion forms disconnection fault outlet through a logical AND gate again with resonance voltage difference judged result after an inverter, the output of open circuit fault signal sends warning signal, in reclosing process, by the poor criterion locking of resonance potential, wait when flow restricter resonating device both end voltage is poor to be decayed under judgement action threshold value, open the poor criterion of resonance potential.
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| CN201110252086.3A CN102354963B (en) | 2011-08-30 | 2011-08-30 | Fast triggering system of resonant current limiter thyristor valve and working method of fast triggering system |
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| US9525423B1 (en) * | 2015-09-23 | 2016-12-20 | Xilinx, Inc. | Power distribution network IP block |
| CN105571617B (en) * | 2016-01-01 | 2018-03-16 | 三峡大学 | A kind of high accuracy number integrator based on Gauss algorithm |
| CN106067791B (en) * | 2016-06-06 | 2018-11-23 | 南京南瑞继保电气有限公司 | A kind of photoelectric conversion circuit for realizing pulse encoding and decoding |
| CN108233347B (en) * | 2016-12-14 | 2019-06-07 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of brushless motor controller Over Current Protection System and over-current protection method |
| CN108572034B (en) * | 2018-04-24 | 2020-11-13 | 电子科技大学 | Temperature sensor circuit with built-in clock |
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| US4158864A (en) * | 1977-07-05 | 1979-06-19 | Electric Power Research Institute, Inc. | Fault current limiter |
| CN1599183A (en) * | 2004-08-11 | 2005-03-23 | 天津理工大学 | Bridge superconducting current limitter control system based on DSP |
| CN101483340A (en) * | 2008-12-31 | 2009-07-15 | 中国电力科学研究院 | Thyristor electronic board for failure current limiter |
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Patent Citations (3)
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|---|---|---|---|---|
| US4158864A (en) * | 1977-07-05 | 1979-06-19 | Electric Power Research Institute, Inc. | Fault current limiter |
| CN1599183A (en) * | 2004-08-11 | 2005-03-23 | 天津理工大学 | Bridge superconducting current limitter control system based on DSP |
| CN101483340A (en) * | 2008-12-31 | 2009-07-15 | 中国电力科学研究院 | Thyristor electronic board for failure current limiter |
Non-Patent Citations (2)
| Title |
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| 华东500kV电网串联谐振型故障电流限制器的保护配置;喻劲松等;《电网技术》;20091031;第33卷(第18期);第191-197页 * |
| 喻劲松等.华东500kV电网串联谐振型故障电流限制器的保护配置.《电网技术》.2009,第33卷(第18期),第191-197页. |
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