CN102346074B - Readout circuit biasing structure - Google Patents
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- H—ELECTRICITY
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
- H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
- H04N25/673—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction by using reference sources
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/20—Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from infrared radiation only
- H04N23/23—Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from infrared radiation only from thermal infrared radiation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
- H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
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Abstract
The invention discloses a readout circuit biasing structure, which comprises a first MOS (Metal Oxide Semiconductor) pipe, a second MOS pipe, a reference resistance, a thermistor, an operational amplifier, a temperature compensating resistance, a first current source, a second current source, a third MOS pipe and a fourth MOS pipe, wherein one end of the temperature compensating resistance is connected between the first MOS pipe and the second MOS pipe, the other end of the temperature compensating resistance is connected with the output end of the first current source, the output end of the first current source is connected with the third MOS pipe, the output end of the second current source is connected with the fourth MOS pipe, a drain electrode of the fourth MOS pipe is connected with a grid electrode of the fourth MOS pipe and is connected with a drain electrode of the third MOS pipe, the non-inverting input end of the operational amplifier is connected between the first MOS pipe and the second MOS pipe, the inverting input end of the operational amplifier is connected to the output end of the second current source through a resistance, and a first integral reuse capacitance and a second integral reuse capacitance are connected in parallel between the inverting input end of the operational amplifier and the inverting output end of the operational amplifier.
Description
Technical Field
The invention relates to the technical field of infrared focal plane reading circuits, in particular to a reading circuit biasing structure without a TEC (semiconductor cooler).
Background
All objects emit thermal radiation related to their temperature and material properties, and the thermal radiation of objects near ambient temperature is mostly located in the infrared band, with wavelengths around 1 to 24 μm. Infrared radiation provides a wealth of information in the objective world, converting invisible infrared radiation into measurable signals, and making full use of this information is a goal sought by people. The infrared focal plane array is an important photoelectric device for acquiring infrared light radiation information of an object. The infrared focal plane detector has been rapidly developed since 1973, the united states department of the roman air force development, first proposed a silicide schottky barrier detector array for infrared thermal imaging. Infrared technology, like many high technologies, is rapidly evolving due to the strong demanding draw of the military. The infrared imager can be equipped with various strategic and tactical weapons, is commonly used for infrared reconnaissance, early warning, tracking and accurate guidance, and is one of the main technologies for acquiring information in electronic warfare and information warfare. Besides being applied to traditional military imaging, the system is also widely applied to the fields of industrial automatic control, medical diagnosis, chemical process monitoring, infrared astronomy and the like.
Microbolometer detectors are the most widely used infrared focal plane array, which is a thermally sensitive resistive detector. The working principle is that the temperature change generated by incident infrared radiation is converted into resistance change by the thermosensitive material, and the magnitude of an infrared radiation signal is detected by measuring the resistance change. The microbolometer focal plane array is a monolithic structure realized by manufacturing a heat insulation structure on a silicon read-out circuit by utilizing a micromachining technology and forming a microbolometer serving as a detector unit on the heat insulation structure. The microbolometer focal plane array is superior to a second-generation uncooled focal plane technology, and an uncooled infrared imaging system manufactured by taking the microbolometer focal plane array as a core has the advantages of small volume and low power consumption compared with a refrigerated infrared imaging system, so that the cost performance of the system is greatly improved, and the application of the infrared imaging system in many fields is greatly promoted.
The read-out circuit is a special digital-analog mixed signal integrated processing circuit, and before the read-out integrated circuit (ROIC) appeared, the mixed circuit of the preamplifier is composed of a discrete resistor, a capacitor and a transistor. High impedance detectors such as photovoltaic, extrinsic silicon, platinum silicon and many photoconductive types are very sensitive to electromagnetic interference (EMI), requiring that the placement be very close to the preamplifier to reduce the effects of EMI. The use of discrete components requires a large amount of area and places severe constraints on the number of channels implemented in a given optical field of view. ROIC helps reduce EMI issues. The read-out integrated circuit (ROIC) approach also provides the detector thermal/mechanical interface, signal processing, and functions including such things as charge conversion and gain, band limiting, and multiplexing and output driving. With the development of integrated circuit technology and technology, especially the mature technology and technology of MOS integrated manufacturing, ROIC has been developed rapidly.
The function of the read-out circuit is to extract the resistance change of the thermosensitive material of the detector, convert the resistance change into an electric signal and perform preprocessing (such as integration, amplification, filtering, sampling/holding and the like) and parallel/serial conversion of the signal. At present, there are mainly CCD type readout circuits and CMOS type readout circuits. With the continuous maturity, perfection and development of CMOS technology, CMOS readout circuits are the main development direction of present-day readout circuits due to their numerous advantages.
With the development of the thermal imaging market, detectors with small volume and low power consumption are more and more favored by the market, and the traditional detectors need the substrate temperature of a fixed focal plane when in work. An uncooled infrared detector system with TEC, only the power consumption of TEC is 500-2000 mW, and the volume is increased by 3-10 cm3. Uncooled infrared detector systems without TEC are a natural trend in development.
In the case of TEC, TCR (temperature coefficient of resistance) varies with the substrate temperature due to the influence of heat capacity, thermal conductance and spontaneous emission of the cell, and the resistance of the pixel also varies. Finally, the signal output changes along with the temperature of the substrate, and the imaging effect is seriously influenced. Therefore, the research on the readout circuit bias structure without the TEC is particularly significant.
Disclosure of Invention
In view of the foregoing prior art, the present invention provides a bias structure of a readout circuit without a TEC, in which signal output is not affected when the temperature of a substrate changes.
In order to solve the technical problems, the invention adopts the following technical scheme: a readout circuit bias structure comprises a first MOS tube, a second MOS tube, a reference resistor, a thermistor, an operational amplifier, a temperature compensation resistor, a first current source and a second current source with low temperature drift, a third MOS tube and a fourth MOS tube, wherein one end of the temperature compensation resistor is connected between the first MOS tube and the second MOS tube, the other end is connected with the output end of the first current source, the output end of the first current source is connected with the third MOS tube, the output end of the second current source is connected with the fourth MOS tube, the drain electrode of the fourth MOS tube is connected with the grid electrode and the drain electrode of the third MOS tube, the non-inverting input end of the operational amplifier is connected between the first MOS tube and the second MOS tube, the inverting input end of the operational amplifier is connected with the output end of the second current source through a resistor, and a first integral multiplexing capacitor and a second integral multiplexing capacitor are connected in parallel between the inverting input end and the output end of the operational amplifier.
Furthermore, the reference resistor and the temperature compensation resistor are both resistance type bolometers which are in thermal short circuit with the adjacent MOS tube substrates, and the thermistor is a resistance type bolometer which is thermally isolated from the adjacent MOS tube substrates.
Furthermore, the first MOS transistor is an NMOS transistor, the second MOS transistor and the third MOS transistor are PMOS transistors, wherein the gate of the first MOS transistor is connected to an operational amplifier, the non-inverting input terminal of the operational amplifier is connected to the first integrated DAC, the inverting input terminal of the operational amplifier is connected to the source of the first MOS transistor, the second integrated DAC is connected between the source of the second MOS transistor and the reference resistor, the gate of the second MOS transistor is connected to another integrated operational amplifier, the non-inverting input terminal of the integrated operational amplifier is connected to the third integrated DAC, the inverting input terminal of the integrated operational amplifier is connected to the source of the second MOS transistor, and the gate of the third MOS transistor is connected to the fourth integrated DAC.
Compared with the bias structure of the existing reading circuit, the invention has the advantages that:
(1) by adopting the readout circuit biasing structure, a non-refrigeration infrared detector system with low power consumption and small volume can be realized without using a TEC.
(2) The readout circuit bias structure is provided with a temperature compensation resistor RtsAnd the temperature compensation correction of the output signal is not needed to be carried out outside the chip, so that the complexity of the system is reduced.
(3) By adopting the readout circuit bias structure, the positive terminal voltage of the operational amplifier of the integrator BVThe change along with the substrate temperature is very small, and the output dynamic range is not influenced by the substrate temperature.
(4) The readout circuit biasing structure is suitable for infrared focal planes of various arrays and has strong universality.
Drawings
FIG. 1 is a graph of the resistance and TCR versus temperature characteristics of a resistive bolometer;
FIG. 2 is a schematic diagram of a conventional sensing circuit biasing structure;
fig. 3 is a schematic diagram of a biasing structure of the sensing circuit of the present invention.
Detailed Description
The invention will be further described with reference to the following figures and examples:
as shown in fig. 1, the resistance and TCR of the resistive bolometer change with the substrate temperature, wherein curve a represents the resistance and curve b represents the TCR, both of which change with the substrate temperature due to the effects of heat capacity, thermal conduction, and spontaneous cell radiation.
For the bias structure of the conventional readout circuit, as shown in fig. 2, when the substrate temperature changes, the reference resistor Rs and the thermistor RbThe resistance value of (2) is changed, when infrared radiation exists, the generated signal current is also changed at different substrate temperatures, as shown in formula (8):
wherein bVIs a reference resistance RbThe bias voltage of (a) is, sVis a thermistor RsAn upper bias voltage.
The readout circuit bias structure without the TEC is shown in fig. 3: aiming at the traditional bias circuit structure, the bias structure of the invention is additionally provided with a temperature compensation resistor RtsThe resistance and the reference resistance are both resistance type bolometers. First current source I for simultaneously increasing low temperature driftsink1And a second current source Isink2And completing the conversion of the integrated current. As shown in formula (1).
Wherein INTTIn order to be the time of the integration, INTCin order to be an integrating capacitance, INT_SH1Cfor the integration, a multiplexing capacitor is used, BVis the positive terminal voltage of the operational amplifier of the integrator, AVis the voltage at the node a and is, ARis a conventional semiconductor resistor. After the sampling is carried out, BVis removed to obtain the final signal voltage. Voltage value V in formula (1)AA second current source I which is fixed and whose voltage value is floated by a low temperaturesink2And the characteristics of the P-type fourth MOS transistor M4. The second current source I is generally setsink2Has a current value of flowing through RAIs a multiple of the current of, so VAIs a fixed value.
After the sampling is carried out, BVis removed to obtain the final signal voltage. The final output voltage is therefore:
from the formula (2) AV、 AR、 INTT、 INTCAnd INT_SH1Care independent of substrate temperature, so output voltageVoutThe relationship with temperature is mainly embodied in BVThe temperature characteristics of the spot.
BVThe dot voltage can be expressed by the following equation:
wherein, SKV、 fidVand ebVthe voltage may be provided off-chip for the corresponding bias voltage, or may be provided by an on-chip integrated DAC. bRIs a reference resistance, i.e. a resistive bolometer thermally short-circuited to the substrate. tsRCompensating for temperatureA resistance, also a resistive bolometer that is thermally shorted to the substrate.RsA resistive bolometer, which is a thermistor, thermally isolated from the substrate.
When there is external radiation and the substrate temperature changes, BVthe voltage at a point can be represented by:
(4)
wherein α 1(Tsub) is the reference resistance Rb and the second DAC RDACThe effective TCR in combination, α 2(Tsub) is the TCR for thermistor Rs and α 3(Tsub) is the TCR for temperature compensation resistor Rts. All three of which are related to the substrate temperature. T1 is the initial temperature of the substrate, T2 is the thermistor RsΔ Tsub is the temperature rise of the substrate. Delta T is thermistor R caused by external radiationsTemperature rise of (2).
By regulating SKV、 fidVAnd ebVcan be such that the following holds:
therefore, the temperature of the molten metal is controlled, BVthe voltage at the point can be converted to equation (6):
the thermistor R being due to the self-heating effectsHas a temperature rise compared with the substrate temperature when the thermistor RsThe resistance value of is 60K Ω, Vfid1.2V, bias time 20 μ s per frame, thermal conductance G =1 × 10-7W/K, heat capacity C =1 × 10-8J/K time, thermistor RsThe temperature rise above is 0.3K. α 2(Tsub) varies by 0.2% from α 3(Tsub), i.e., α 3(Tsub) ≈ α 2 (Tsub). So as to finally BVThe voltages at the points are:
(7)
a typical value of α 2(Tsub) is-0.02 when the substrate temperature is 300K, and α 2(Tsub) varies by 0.002 when the substrate temperature varies by 20K. Therefore, it is not only easy to use BVThe voltage at the spot varies little with the substrate temperature.
In addition, the voltage value Vr1 in equation (7) is fixed, and the voltage value is floated by the low temperature of the first current source Isink1Characteristics of the P-type third MOS transistor M3 and the fourth integrated DAC VDAC3Is determined. The first current source I is generally setsink1Since the current value of (2) is several times the current flowing through the temperature compensation resistor Rts, Vr1 is a fixed value.
The invention can be used for infrared focal plane arrays with different array sizes, such as: 160 x 120, 320 x 240, 384 x 288, etc.
The reading circuit bias structure without the TEC is adopted to remove the use of the TEC, realize the uncooled infrared detector system with low power consumption and small volume, simultaneously ensure that the output dynamic range is not influenced by the substrate temperature, and do not need to carry out temperature compensation correction on output signals outside a chip, thereby reducing the complexity of the system.
Claims (1)
1. A readout circuit biasing structure comprises a first MOS tube (M1), a second MOS tube (M2), and a reference resistor (R2)b) Thermistor (R)s) The first operational amplifier is characterized in that: further comprises a temperature compensation resistor (R)ts) First current source (I) with low temperature driftsink1) And a second current source (I)sink2) A third MOS transistor (M3) and a fourth MOS transistor (M4), wherein the temperature compensation resistor (R)ts) One end of the first MOS transistor (M1) is connected between the first MOS transistor (M1) and the second MOS transistor (M2), and the drain electrode of the first MOS transistor (M3978) is connectedDrain electrode of the second MOS transistor (M2), temperature compensation resistor (R)ts) Is connected to a first current source (I)sink1) An output terminal of (1), a first current source (I)sink1) The output end of the first MOS transistor (M3) is connected with the source electrode of the third MOS transistor (M3), and the second current source (I)sink2) The output end of the first operational amplifier is connected with the source electrode of a fourth MOS tube (M4), the drain electrode and the grid electrode of the fourth MOS tube (M4) are connected and are connected with the drain electrode of a third MOS tube (M3), the non-inverting input end of the first operational amplifier is connected between the first MOS tube (M1) and the second MOS tube (M2), and the inverting input end of the first operational amplifier is connected with the source electrode of the fourth MOS tube (M4) through a resistor (R)A) Connected to a second current source (I)sink2) The first integrating and multiplexing capacitor is connected in parallel between the inverting input terminal and the output terminal of the first operational amplifier INT_SH1C) And a second integrating multiplexing capacitor ( INT_SH2C) (ii) a The reference resistance (R)b) And a temperature compensation resistor (R)ts) All resistive bolometers, thermistors (R) thermally short-circuited to an adjacent MOS tube substrates) A resistive bolometer thermally isolated from its adjacent MOS tube substrate; the first MOS transistor (M1) is an NMOS transistor, the second MOS transistor (M2), the third MOS transistor (M3) and the fourth MOS transistor (M3) are PMOS transistors, wherein the grid electrode of the first MOS transistor (M1) is connected with the two operational amplifiers, and the non-inverting input end of the second operational amplifier is connected with the first integrated DAC (V3)DAC1) The inverting input end of the second operational amplifier is connected with the source electrode of the first MOS tube (M1) and the thermistor (R)s) The source electrode of the second MOS tube (M2) and the reference resistor (R) are connected between the source electrode of the first MOS tube (M1) and the drain electrode of the third MOS tube (M3)b) Is connected with a second integrated DAC (R)DAC2) The grid electrode of the second MOS tube (M2) is connected with an integrated operational amplifier, and the non-inverting input end of the integrated operational amplifier is connected with a third integrated DAC (V)DAC) The inverting input end of the integrated operational amplifier is connected with the source electrode of a second MOS (M2), and the gate electrode of the third MOS (M3) is connected with a fourth integrated DAC (V)DAC3）。
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| CN102735344B (en) * | 2012-07-10 | 2014-04-30 | 电子科技大学 | Reading circuit of infrared focal plane array detector |
| CN103234642B (en) * | 2013-04-15 | 2015-07-22 | 电子科技大学 | Integrating pre-circuit of reading circuit in infrared focal plane array detector |
| CN104251741B (en) * | 2014-09-18 | 2017-07-18 | 电子科技大学 | A kind of self adaptation infrared focal plane array reading circuit |
| CN104819779B (en) * | 2015-04-03 | 2018-05-22 | 无锡艾立德智能科技有限公司 | A kind of micro-metering bolometer type infrared reading circuit with biasing thermal compensation function |
| CN105181754B (en) * | 2015-06-29 | 2019-02-12 | 电子科技大学 | Offset-type resistance-type integrated gas sensors array and preparation method thereof |
| KR102657954B1 (en) * | 2020-12-08 | 2024-04-18 | (주)유우일렉트로닉스 | Apparatus, method and computer readable medium for measuring temperature of object using compensation of board terperature |
| WO2024124478A1 (en) * | 2022-12-15 | 2024-06-20 | 深圳华大生命科学研究院 | Analog front-end circuit and working method therefor, and gene sequencing chip |
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| US6953932B2 (en) * | 1999-10-07 | 2005-10-11 | Infrared Solutions, Inc. | Microbolometer focal plane array with temperature compensated bias |
| CN101943606A (en) * | 2010-08-20 | 2011-01-12 | 电子科技大学 | Infrared focal plane reading circuit and method thereof |
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