CN102324837A - PWM/PFM (Pulse Width Modulation/ Pulse Frequency Modulation) control circuit - Google Patents
PWM/PFM (Pulse Width Modulation/ Pulse Frequency Modulation) control circuit Download PDFInfo
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- CN102324837A CN102324837A CN201110288078A CN201110288078A CN102324837A CN 102324837 A CN102324837 A CN 102324837A CN 201110288078 A CN201110288078 A CN 201110288078A CN 201110288078 A CN201110288078 A CN 201110288078A CN 102324837 A CN102324837 A CN 102324837A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention provides a PWM/PFM (Pulse Width Modulation/ Pulse Frequency Modulation) control circuit. In a PWM control mode, a PWM control signal with the adjustable pulse width is generated on the basis of a reference signal for controlling; and in a PFM control mode, a PWM control signal with the adjustable frequency is generated on the basis of the reference signal for controlling. The PWM/PFM control circuit comprises a time difference generation unit and a time difference amplification unit, wherein the time difference generation unit is used for generating a time difference signal for reflecting the difference of the pulse width of the PFM control signal and the pulse width of the PWM control signal when the pulse width of the PFM control signal is more than the pulse width of the PWM control signal; the time difference amplification unit is used for amplifying the time difference signal and obtaining a time difference amplification signal; each period of the reference signal is prolonged to the effective duration of the time difference amplification signal so as to regulate the frequency of the reference signal to regulate the frequency of the PFM control signal; and thus, PFM and PWM can be seamlessly and continuously switched and transited. In addition, because the time difference signal is amplified, a lower PFM frequency lower limit can be realized, and thus the lower standby power consumption can be realized.
Description
[technical field]
The present invention relates to a kind of electric power management circuit, particularly relate to the PWM/PFM control circuit in a kind of switch power converter circuit.
[background technology]
Present many switch power converters (such as voltage descending DC-DC converter) all comprise two kinds of mode of operation: PWM (Pulse Width Modulation) pattern and PFM (Pulse Frequency Modulation) pattern.When general load was heavier, switch power converter was operated under the PWM pattern, thereby it is operated under the fixing upper frequency, keeps lower output voltage ripple.But because the switching loss of control circuit is generally bigger under the PWM pattern; Therefore common when load is light, switch power converter switches under the PFM pattern and works, along with load lightens; Its operating frequency step-down, the mean value of the switching loss of control circuit is along with frequency reduces and step-down.Because traditional compatible PWM pattern is mutation process with the control circuit of PFM pattern when two kinds of mode switch, like this when load current be near the switching point time, system is instability easily, causes near the output voltage ripple of switching point to enlarge markedly.
Therefore, be necessary to propose a kind of improved technical scheme and solve the problems referred to above.
[summary of the invention]
The object of the present invention is to provide a kind of PWM/PFM control circuit, it can realize the seamless connection of PFM pattern and PWM pattern, and can realize frequency minimum lower under the PFM pattern.
To achieve these goals; The present invention proposes a kind of PWM/PFM control circuit; It has pwm pattern and PFM control model; When pwm pattern, generating the adjustable pwm control signal of pulsewidth based on a reference signal controls; When the PFM control model, control based on the adjustable PFM control signal of said reference signal generated frequency, it comprises: time difference generation unit is used for producing during greater than the pulsewidth of pwm control signal in the pulsewidth of PFM control signal the time difference signal of difference of pulsewidth of pulsewidth and the pwm control signal of reflection PFM control signal; With time difference amplifying unit, be used to amplify said time difference signal and get the arrival time difference amplifying signal; Wherein with effective duration of the said time difference amplifying signal of each cycle stretch-out of said reference signal adjusting the frequency of said reference signal, and then adjust the frequency of said PFM control signal.
In a further embodiment; Said PWM/PFM control circuit also comprises feedback circuit, error amplifier, PWM comparator, PFM generator, logic control element and oscillator; Said feedback circuit sample a power-switching circuit output voltage and form the feedback voltage of the said output voltage of reflection, said power-switching circuit converts an input voltage to said output voltage; The error that said error amplifier amplifies a reference voltage and feedback voltage obtains the error amplifying voltage; Said oscillator produces said reference signal; Said PWM comparator is used for more said reference signal and said error amplifying voltage to export the pwm control signal of corresponding pulsewidth; Said PFM generator is used for generating based on said pwm control signal the PFM control signal of fixed pulse width; Said logic control element be used for the pulsewidth of pwm control signal during greater than the pulsewidth of PFM control signal the output pwm control signal control said power-switching circuit, the pulsewidth of pwm control signal during less than the PFM control signal output PFM control signal control said power-switching circuit.
In a further embodiment; Said time difference amplifying unit comprises charging current source, charging control switch, discharging current source, discharge control switch, electric capacity and comparator; Whether said charging control switch is controlled said charging current source and electric capacity is charged; The control end of said charging control switch receives the control of time difference signal, connects said charging control switch at the effectual time of said time difference signal and makes said charging current source charge to said electric capacity; Whether said discharge control switch controls said discharging current source to said capacitor discharge; The control end of said discharge control switch receives the control of time difference amplifying signal, turn-offs said discharge control switch in the invalid period of said time difference amplifying signal and makes said discharging current source stop said electric capacity is discharged; Said comparator is used for the voltage of said electric capacity and reference voltage are compared, and exports effective time difference amplifying signal during greater than said reference voltage at the voltage of said electric capacity.
In a further embodiment; Said time difference amplifying unit comprises charging current source, charging control switch, discharging current source, discharge control switch, discharge control logic, electric capacity and comparator; Whether said charging control switch is controlled said charging current source and electric capacity is charged; The control end of said charging control switch receives the control of time difference signal, connects said charging control switch at the effectual time of said time difference signal and makes said charging current source charge to said electric capacity; Whether said discharge control switch controls said discharging current source to said capacitor discharge; The control end of said discharge control switch is controlled by said discharge control logic; Control said discharge control switch shutoff at the effectual time of said time difference signal and the invalid period of said time difference amplifying signal, control said discharge control switch conducting in the invalid period of said time difference signal and the effectual time of said time difference amplifying signal; Said comparator is used for the voltage of said electric capacity and reference voltage are compared, and exports effective time difference amplifying signal during greater than said reference voltage at the voltage of said electric capacity.
In a further embodiment, said discharging current source is a resistance.
In a further embodiment, said comparator is the comparator of reference voltage.In an embodiment further; Said oscillator comprises electric capacity, charging circuit, discharge circuit, charging control switch, comparison circuit; Said charging circuit charges to said electric capacity via charging control switch; Said comparison circuit is the voltage of a reference voltage and said electric capacity relatively, and control said discharge circuit at the voltage of said electric capacity during greater than said reference voltage said electric capacity is carried out repid discharge, and the voltage signal of said electric capacity has just formed the triangular wave oscillation signal; Said triangular wave oscillation signal is exactly said reference signal, controls said charging control switch at the effectual time of said time difference amplifying signal and turn-offs.
Compared with prior art; In the PWM/PFM control circuit that the present invention proposes; The mode in cycle that prolongs the triangular wave oscillation signal of oscillator OSC through the time difference according to pwm control signal and PFM control signal realizes the pulse duration frequency modulation; Can realize PFM like this to the seamless continuous switching transition of PWM, so output is more stable when switching, the ripple of output voltage is littler.In addition, because said time difference signal is amplified, thereby can realize lower PFM lower-frequency limit, therefore can realize lower stand-by power consumption.
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.Wherein:
Fig. 1 is the PWM/PFM control circuit system circuit diagram in one embodiment among the present invention;
Fig. 2 is the sequential sketch map of each signal in the PWM/PFM control circuit system among the present invention;
Fig. 3 is the circuit diagram of first embodiment of the time difference amplifying unit among the present invention;
Fig. 4 is the circuit diagram of second embodiment of the time difference amplifying unit among the present invention;
Fig. 5 is the circuit diagram of the 3rd embodiment of the time difference amplifying unit among the present invention;
Fig. 6 is the circuit diagram of the 4th embodiment of the time difference amplifying unit among the present invention;
Fig. 7 is the circuit diagram of the 5th embodiment of the time difference amplifying unit among the present invention;
Fig. 8 is the circuit diagram of first embodiment of the oscillator among the present invention; With
Fig. 9 is the circuit diagram of second embodiment of the oscillator among the present invention.
[embodiment]
Detailed description of the present invention is mainly come the running of direct or indirect simulation technical scheme of the present invention through program, step, logical block, process or other symbolistic descriptions.Be the thorough the present invention that understands, in ensuing description, stated a lot of specific detail.And when not having these specific detail, the present invention then possibly still can realize.Affiliated those of skill in the art use these descriptions here and state that the others skilled in the art in affiliated field effectively introduce their work essence.In other words, be the object of the invention of avoiding confusion, because the understanding easily of method of knowing and program, so they are not described in detail.
Alleged here " embodiment " or " embodiment " are meant special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different in this manual local " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or optionally mutually exclusive with other embodiment embodiment.
Fig. 1 is PWM/PFM control circuit system 100 circuit diagram in one embodiment among the present invention.Said PWM/PFM control circuit system comprises power-switching circuit 110, feedback circuit 120, error amplifier EA, PWM comparator com, PFM generator PFM, logic control element Control Logic, drive circuit Driver, time difference generation unit 130, time difference amplifying unit TA and oscillator OSC.
Said power-switching circuit 110 converts an input voltage VIN to an output voltage VO.In this embodiment; It is the buck DC-DC voltage conversion circuit; It comprises output transistor MPX and the MNX that is connected between input voltage VIN and the ground; Their grid links to each other with said drive circuit, and the intermediate node of output transistor MPX and MNX is through inductance L 1 and capacitor C 0 ground connection, and the voltage of the intermediate node of inductance L 1 and capacitor C 0 is as output voltage VO.
The said feedback circuit 120 said output voltage VO of sampling also form to reflect the feedback voltage of said output voltage, and it is made up of with R2 the resistance R 1 that is connected between output voltage VO and the ground.Said oscillator OSC generates and output triangular wave oscillation signal Ramp.The error that said error amplifier EA amplifies a reference voltage V REF and feedback voltage obtains the error amplifying voltage.Said PWM comparator is used for more said triangular wave oscillation signal and said error amplifying voltage to export the pwm control signal of corresponding pulsewidth.Said PFM generator is used for generating based on said pwm control signal the PFM control signal T_min of fixed pulse width, and the pulsewidth of said PFM control signal is minimum conducting width.Output pwm control signal and control said power-switching circuit 110 via said drive circuit when said logic control element is used for pulsewidth at pwm control signal greater than the PFM control signal is in the pulsewidth of pwm control signal output PFM control signal and control said power-switching circuit 110 via said drive circuit during less than the PFM control signal.
Said time difference generation unit 130 is used for producing during greater than the pulsewidth of pwm control signal in the pulsewidth of PFM control signal the time difference signal T_dif of difference of pulsewidth of pulsewidth and the pwm control signal of reflection PFM control signal.In this embodiment; Said time difference generation unit 130 comprises inverter INV0 and NOR gate NOR2; Said PFM control signal inserts the input of said NOR gate NOR2 through said inverter IVN0; Said pwm control signal inserts another input of said NOR gate NOR2, and said NOR gate NOR2 exports said time difference signal.
Said time difference amplifying unit TA is used to amplify said time difference signal T_dif and gets arrival time difference amplifying signal T_stop.In the effectual time of time difference amplifying signal T_stop, oscillator OSC is suspended charging, like this can be with effective duration of the said time difference amplifying signal of each cycle stretch-out of said triangular wave oscillation signal, and then adjusted the frequency of said PFM control signal.
Fig. 2 is the sequential sketch map of each signal in the PWM/PFM control circuit system among the present invention; Wherein T_min is the PFM control signal; PWMO is that pwm control signal, T_dif are the time difference of pwm control signal and PFM control signal; T_stop is the amplifying signal of T_dif, Ramp has been the cycle stretch-out triangular wave oscillator signal behind the T_stop.
In sum; The mode in cycle that prolongs the triangular wave oscillation signal of oscillator OSC through the time difference according to pwm control signal and PFM control signal realizes the frequency modulation(FM) of PFM; Can realize that like this PFM is to the seamless continuous switching transition of PWM; So output is more stable when switching, the ripple of output voltage is littler.Yet the time difference length of the maximum of pwm control signal and PFM control signal equals the high level time of PFM control signal, promptly minimum ON time, and this time is the longest generally to be no more than the half the of cycle oscillator time under the PWM pattern.So; If the time difference is not amplified, under the PFM pattern, frequency reducing be 1.5 times of cycle oscillators under the PWM pattern to greatest extent; Promptly be downconverted to 2/3 times of frequency of oscillation under the PWM pattern, will cause mean value still bigger like this than switching loss under the underload.
Since said time difference signal is amplified, the no longer confined maximum time difference of said time difference amplifying signal less than pwm control signal and PFM control signal, can realize lower PFM lower-frequency limit like this, therefore can realize lower stand-by power consumption.Obviously, the PWM/PFM control circuit among the present invention also can also be applicable to the control of the DC-DC transducer of other types, like booster type, and negative-pressure type and AC-DC transducer, it is just passable only need to change said power conversion unit into other types.
Fig. 3 is the circuit diagram of first embodiment of said time difference amplifying unit.Said time difference amplifying unit comprises charging current source I1, charging control switch S1, discharging current source I2, discharge control switch S2, capacitor C 1 and comparator com1, discharge control logic.
Said charging current source I1 charges to capacitor C 1 via said charging control switch S1; The control end of said charging control switch S1 receives the control of time difference signal T_dif; Connecting said charging control switch S1 at the effectual time (the high level period among Fig. 2) of said time difference signal T_dif makes said charging current source I1 charge to said capacitor C 1; The invalid period (the low level period among Fig. 2) at said time difference signal T_dif turn-offs, and stops the charging to capacitor C 1.
Said discharging current source I2 discharges to said capacitor C 1 via said discharge control switch S2; The control end of said discharge control switch S2 is by the control of discharge control logic; Said discharge control logic output time expand signal T_amp; As shown in Figure 2, it is the time that time difference amplifying signal T_stop prolongs with respect to time difference signal T_dif, and said discharge control logic is when said time difference signal T_dif amplifying signal T_stop of the invalid and said time difference effective (high level among Fig. 2); Control said discharge control switch S2 and connect, turn-off otherwise control said discharge control switch S2.
Said comparator com1 is used for the voltage VC1 of said capacitor C 1 and reference voltage V R1 are compared; Export effective time difference amplifying signal T_stop at the voltage VC1 of said capacitor C 1 during greater than said reference voltage V R1, otherwise export invalid time difference amplifying signal T_stop.
Said reference voltage V R1 is provided by voltage source V 1; Said discharge control logic comprise inverter INV1 and with door and1; Said time difference signal T_dif links to each other with the input of door and1 with said via said inverter INV1; Said time difference amplifying signal T_stop links to each other with another input of door and1 with said, the control end of the said discharge control switch S2 of output termination of said and door and1.
In the present embodiment, the detailed process that the time of time difference signal T_dif is amplified is following.When the T_dif signal is high level (high level is for effective), charging control switch S1 conducting, current source I1 is to capacitor C 1 charging; The control signal T_amp of simultaneously said discharge control logic output is a low level, and discharge control unit S2 turn-offs, and the voltage VC1 of capacitor C 1 increases gradually; When if the voltage VC1 of capacitor C 1 is not charged to greater than said reference voltage V R1; During ensuing next cycle, T_dif can continue the charging to C1 during for high level, up to VC1 greater than VR1.Then, when T_dif is low level since this moment capacitor C 1 the voltage of voltage VC1 greater than reference voltage V R1; So T_stop is a high level, T_amp also becomes high level, discharge control switch S2 conducting; Capacitor C 1 is by discharging current source I2 discharge, and it is lower slightly when some than reference voltage V R1 to be discharged up to the voltage VC1 of capacitor C 1, and T_stop becomes low level; T_amp also becomes low level, and discharge control switch S2 turn-offs.When ensuing T_dif is high level once more, charging control switch S1 conducting, capacitor C 1 begins charging from the voltage of VR1 no better than; When T_dif became low level, charging finished, and C1 begins discharge then; When C1 voltage was discharged to VR1, discharge finished.So working as T_dif is in the time period of high level, charging current source I1 charges to capacitor C 1, when the T_dif step-down, is carved into the T_stop step-down in the time period between the moment, and discharging current source I2 discharges to capacitor C 1.The change in voltage amplitude of electric capacity charging equals the capacitor discharge voltage amplitude, equals VP-VR1, and wherein VP is the crest voltage that capacitor C 1 charging reaches, and VR1 is the valley point voltage of discharge, as among Fig. 2 about the mark of voltage VC1.
According to the capacitor charge and discharge characteristic, discharging and recharging charge conservation can know: I1.Ta=(VP-VR1) .C1=I2.Tb.Like this through setting the ratio of I1 and I2, set charging interval Ta and discharge time Tb ratio.Design I 1/I2=8 for example, Tb=8.Ta then, and Tc=Ta+Tb=9.Ta, Tc is effective duration of time difference amplifying signal T_stop.Therefore can obtain the time of an amplification.
Fig. 4 is the circuit diagram of second embodiment of said time difference amplifying unit.The said time difference amplifying unit among Fig. 4 and the difference of the time difference amplifying unit among Fig. 3 are: the comparator of the reference voltage of in Fig. 4, forming with transistor MN2, current source I3, inverter INV2 and INV3 has substituted the comparator com1 among Fig. 3, and the threshold voltage of transistor NM2 is its reference voltage.Identical among all the other other charge and discharge process and time amplification principle and Fig. 3.
Fig. 5 is the circuit diagram of the 3rd embodiment of said time difference amplifying unit.Compare with the time amplifying unit shown in Fig. 4, it has substituted the discharging current source I2 among Fig. 4 with resistance R3, and when the R3 value is big more, the velocity of discharge of capacitor C 1 is slow more, can obtain bigger time magnification, but the time is enlarged into non-linear amplification.At this moment, resistance R 3 also can be considered to a kind of non-linear discharging current source.
Fig. 6 is the circuit diagram of the 3rd embodiment of said time difference amplifying unit.Compare with the time amplifying unit shown in Fig. 4, it has removed the discharge control logic, and the control end of said discharge control switch S2 is controlled by said time difference amplifying signal T_stop.That is to say that what said discharging current source I2 continued always discharges to said capacitor C 1, in the invalid period of said time difference amplifying signal T_stop, stops said capacitor C 1 is discharged in the effectual time of said time difference amplifying signal T_stop.T_stop is made as Tc at time of high level like this, and T_dif is made as Ta the time of high level, I1.Ta=I2.Tc then, and time magnification is I1/I2, and the time magnification of Fig. 4 is (1+I1/I2).
Fig. 7 is the circuit diagram of the 3rd embodiment of said time difference amplifying unit.Compare with the time amplifying unit shown in Fig. 6, substituted the comparator of reference voltage with amplifier com1, the reference voltage V 1 of said comparator com1 is provided by voltage source V 1.
Fig. 8 is the circuit diagram of first embodiment of the oscillator among the present invention.Please refer to shown in Figure 8ly, said oscillator comprises the comparison circuit of capacitor C 2, charging circuit, discharge circuit, charging control switch S3, reference voltage.
Said comparison circuit comprises current source I4, transistor MN3 and MN4, resistance R 4, inverter INV5 and INV6, and its reference voltage is the voltage on the resistance R 4.Said discharge circuit is the transistor MN5 parallelly connected with capacitor C 2, and said charging circuit is current source I5.
Said charging circuit was to the charging of said electric capacity when said charging control switch S3 connected, and said charging circuit stopped the charging to said electric capacity when said charging control switch S3 turn-offed.The voltage of more said reference voltage of said comparison circuit and said capacitor C 2; And control said discharge circuit MN5 at the voltage of said capacitor C 2 during greater than said reference voltage said capacitor C 2 is carried out repid discharge, the voltage signal Ramp of said electric capacity has just formed the triangular wave oscillation signal.Control said charging control switch S3 at the effectual time of said time difference amplifying signal T_stop and turn-off, prolonged the cycle of Ramp signal like this, as shown in Figure 2.In this example, said time difference amplifying signal T_stop links to each other with the control end of said charging control switch S3 via an inverter INV4.The waveform of the output signal Dsich of inverter INV6 is as shown in Figure 2.
Fig. 9 is the circuit diagram of second embodiment of the oscillator among the present invention.Compare with oscillator shown in Figure 8, said charging control switch S3 is substituted by transistor MP2, and said time difference amplifying signal T_stop directly connects the grid of said transistor MP2.When the T_stop signal was high level, PMOS switch MP2 closed, and has so just stopped charging current, and this moment, Ramp signal sustaining voltage was constant.
Above-mentioned explanation has fully disclosed embodiment of the present invention.It is pointed out that any change that technical staff's specific embodiments of the invention of being familiar with this field is done does not all break away from the scope of claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to previous embodiment.
Claims (7)
1. PWM/PFM control circuit; It has pwm pattern and PFM control model; When pwm pattern, generating the adjustable pwm control signal of pulsewidth based on a reference signal controls; When the PFM control model, control, it is characterized in that it comprises based on the adjustable PFM control signal of said reference signal generated frequency:
Time difference generation unit is used for producing during greater than the pulsewidth of pwm control signal in the pulsewidth of PFM control signal the time difference signal of difference of pulsewidth of pulsewidth and the pwm control signal of reflection PFM control signal; With
Time difference amplifying unit is used to amplify said time difference signal and gets the arrival time difference amplifying signal;
Wherein with effective duration of the said time difference amplifying signal of each cycle stretch-out of said reference signal adjusting the frequency of said reference signal, and then adjust the frequency of said PFM control signal.
2. control circuit according to claim 1 is characterized in that it also includes: feedback circuit, error amplifier, PWM comparator, PFM generator, logic control element and oscillator,
Said feedback circuit sample a power-switching circuit output voltage and form the feedback voltage of the said output voltage of reflection, said power-switching circuit converts an input voltage to said output voltage;
The error that said error amplifier amplifies a reference voltage and feedback voltage obtains the error amplifying voltage;
Said oscillator produces said reference signal;
Said PWM comparator is used for more said reference signal and said error amplifying voltage to export the pwm control signal of corresponding pulsewidth;
Said PFM generator is used for generating based on said pwm control signal the PFM control signal of fixed pulse width;
Said logic control element be used for the pulsewidth of pwm control signal during greater than the pulsewidth of PFM control signal the output pwm control signal control said power-switching circuit, the pulsewidth of pwm control signal during less than the PFM control signal output PFM control signal control said power-switching circuit.
3. control circuit according to claim 1 is characterized in that, said time difference amplifying unit comprises charging current source, charging control switch, discharging current source, discharge control switch, electric capacity and comparator,
Whether said charging control switch is controlled said charging current source and electric capacity is charged; The control end of said charging control switch receives the control of time difference signal, connects said charging control switch at the effectual time of said time difference signal and makes said charging current source charge to said electric capacity;
Whether said discharge control switch controls said discharging current source to said capacitor discharge; The control end of said discharge control switch receives the control of time difference amplifying signal, turn-offs said discharge control switch in the invalid period of said time difference amplifying signal and makes said discharging current source stop said electric capacity is discharged;
Said comparator is used for the voltage of said electric capacity and reference voltage are compared, and exports effective time difference amplifying signal during greater than said reference voltage at the voltage of said electric capacity.
4. control circuit according to claim 1 is characterized in that, said time difference amplifying unit comprises charging current source, charging control switch, discharging current source, discharge control switch, discharge control logic, electric capacity and comparator,
Whether said charging control switch is controlled said charging current source and electric capacity is charged; The control end of said charging control switch receives the control of time difference signal, connects said charging control switch at the effectual time of said time difference signal and makes said charging current source charge to said electric capacity;
Whether said discharge control switch controls said discharging current source to said capacitor discharge; The control end of said discharge control switch is controlled by said discharge control logic; Control said discharge control switch shutoff at the effectual time of said time difference signal and the invalid period of said time difference amplifying signal; Control said discharge control switch conducting in the invalid period of said time difference signal and the effectual time of said time difference amplifying signal
Said comparator is used for the voltage of said electric capacity and reference voltage are compared, and exports effective time difference amplifying signal during greater than said reference voltage at the voltage of said electric capacity.
5. according to claim 2 or 3 described control circuit system, it is characterized in that said discharging current source is a resistance.
6. according to claim 2 or 3 described control circuits, it is characterized in that said comparator is the comparator of reference voltage.
7. control circuit according to claim 2 is characterized in that said oscillator comprises electric capacity, charging circuit, discharge circuit, charging control switch, comparison circuit,
Said charging circuit charges to said electric capacity via charging control switch; Said comparison circuit compares the voltage of a reference voltage and said electric capacity; And control said discharge circuit at the voltage of said electric capacity during greater than said reference voltage said electric capacity is carried out repid discharge; The voltage signal of said electric capacity has just formed the triangular wave oscillation signal, and said triangular wave oscillation signal is exactly said reference signal
Controlling said charging control switch at the effectual time of said time difference amplifying signal turn-offs.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104377944A (en) * | 2013-08-14 | 2015-02-25 | 南宁市跃龙科技有限公司 | Triangular wave generation circuit based on frequency modulation |
| CN104426362A (en) * | 2013-09-05 | 2015-03-18 | 英特希尔美国公司 | Smooth transition of power-supply controller from first mode (pulse-frequency-modulation mode) to second mode (pulse-width-modulation mode) |
| CN104993701A (en) * | 2015-07-22 | 2015-10-21 | 无锡中星微电子有限公司 | PWM/PFM control circuit |
| CN105099172A (en) * | 2014-04-17 | 2015-11-25 | 展讯通信（上海）有限公司 | Novel pulse frequency modulation switching power supply |
| CN105162325A (en) * | 2014-05-29 | 2015-12-16 | 展讯通信（上海）有限公司 | Pulse frequency modulation circuit based on reference voltage comparison oscillator |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005261091A (en) * | 2004-03-12 | 2005-09-22 | New Japan Radio Co Ltd | Dead time generation circuit |
| JP2008092712A (en) * | 2006-10-03 | 2008-04-17 | Torex Semiconductor Ltd | Pwm/pfm control circuit and switching power-supply circuit |
| CN101394166A (en) * | 2008-10-28 | 2009-03-25 | 深圳市矽普特科技有限公司 | Triangle wave generating circuit, pulse width modulation circuit and audio power amplifying circuit |
| CN202334306U (en) * | 2011-09-26 | 2012-07-11 | 无锡中星微电子有限公司 | PWM/PFM (Pulse Width Modulation/Pulse Frequency Modulation) control circuit |
-
2011
- 2011-09-26 CN CN201110288078A patent/CN102324837A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005261091A (en) * | 2004-03-12 | 2005-09-22 | New Japan Radio Co Ltd | Dead time generation circuit |
| JP2008092712A (en) * | 2006-10-03 | 2008-04-17 | Torex Semiconductor Ltd | Pwm/pfm control circuit and switching power-supply circuit |
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| CN202334306U (en) * | 2011-09-26 | 2012-07-11 | 无锡中星微电子有限公司 | PWM/PFM (Pulse Width Modulation/Pulse Frequency Modulation) control circuit |
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| CN104377944A (en) * | 2013-08-14 | 2015-02-25 | 南宁市跃龙科技有限公司 | Triangular wave generation circuit based on frequency modulation |
| CN104377944B (en) * | 2013-08-14 | 2017-03-22 | 南宁市跃龙科技有限公司 | Triangular wave generation circuit based on frequency modulation |
| CN104426362A (en) * | 2013-09-05 | 2015-03-18 | 英特希尔美国公司 | Smooth transition of power-supply controller from first mode (pulse-frequency-modulation mode) to second mode (pulse-width-modulation mode) |
| CN104426362B (en) * | 2013-09-05 | 2018-07-06 | 英特希尔美国公司 | Smooth transition of the power supply unit from first mode (such as pattern of pulse wave frequency modulating) to second mode (such as pulse wave width modulation pattern) |
| CN105099172A (en) * | 2014-04-17 | 2015-11-25 | 展讯通信（上海）有限公司 | Novel pulse frequency modulation switching power supply |
| CN105099172B (en) * | 2014-04-17 | 2019-03-12 | 展讯通信（上海）有限公司 | A kind of Switching Power Supply of novel pulse frequency modulated |
| CN105162325A (en) * | 2014-05-29 | 2015-12-16 | 展讯通信（上海）有限公司 | Pulse frequency modulation circuit based on reference voltage comparison oscillator |
| CN105162325B (en) * | 2014-05-29 | 2019-03-12 | 展讯通信（上海）有限公司 | Pulse frequency modulation circuit based on reference voltage comparison oscillator |
| CN104993701A (en) * | 2015-07-22 | 2015-10-21 | 无锡中星微电子有限公司 | PWM/PFM control circuit |
| CN104993701B (en) * | 2015-07-22 | 2017-05-24 | 无锡中感微电子股份有限公司 | PWM/PFM control circuit |
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Application publication date: 20120118 |