CN102280908B - Heterodyne slope frequency generation mode for light and heavy load switching of power supply - Google Patents
Heterodyne slope frequency generation mode for light and heavy load switching of power supply Download PDFInfo
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- CN102280908B CN102280908B CN 201010203110 CN201010203110A CN102280908B CN 102280908 B CN102280908 B CN 102280908B CN 201010203110 CN201010203110 CN 201010203110 CN 201010203110 A CN201010203110 A CN 201010203110A CN 102280908 B CN102280908 B CN 102280908B
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Abstract
The invention relates to a heterodyne slope frequency generation mode for the light and heavy load switching of a power supply. A power supply converter, a feedback control circuit and a double-slope charge and discharge circuit determine the output power of output current, feedback voltage is generated by the feedback control circuit and input into the power supply converter according to different external load devices and different external voltage rise rates, different charge current is generated by the double-slope charge and discharge circuit, and different operation modes are formed; and when an external load changes, the feedback control circuit can detect error voltage and perform feedback control on the power supply converter to change the supply magnitude of the current, so thatdriving current and output power are automatically adjusted.
Description
Technical field
The invention relates to a kind of power supply unit of adjusting the power supply translation function that has, particularly feedback control relevant for a kind of Auto-Sensing external loading step of going forward side by side, provide different output currents and the diclinic rate power supply unit of charge cycle to reach the different size loads situation of foundation.
Background technology
In the prior art relevant with diclinic rate power-supply controller of electric, disclose a kind of can be at different load circuits, detect its outside output voltage, with its outside output voltage, feedback to inner circuit for detecting, and with itself and the internal reference voltage generation error voltage of making comparisons, the error voltage that utilization generates, be input to power supply changeover device, and produce different current drives slope and cycle, produce pulse wave width modulation (Pulse Width Modulation; PWM) control signal reaches the effect of controlling the external drive electric current at last.
As shown in Figure 1, be a kind of existing power supply control circuit, formed by power supply changeover device 4, feedback control circuit 8 and outside load device 6; Wherein power supply changeover device 4 is accepted its input voltage vin, and provide output voltage V o to load device 6, feedback control circuit 8 is according to the accurate position size of output voltage V o, and out gate lock pulse wave (Gate Pulse) provides different accurate position sizes by power supply changeover device.When the load device 6 of outside was heavy load, feedback control circuit 8 can provide bigger door lock pulse wave, allowed power supply changeover device 4 that bigger power output is provided; When the load device 6 of outside was less load, feedback control circuit 8 can provide less door lock pulse wave, allows power supply changeover device 4 that less power output is provided, and reduces the consumption of power.For power supply changeover device 4, generally speaking, it can adopt buck-converter (Buck Converter) according to different needs, voltage-boosting converter (Boost Converter), or the different voltage transitions controller of flyback converter (Flyback Converter) etc., in the design as for feedback control circuit 8, then mainly take pulse wave width modulation (PWM) to adjust the control mode of power supply changeover device 4, therefore in the design of feedback control circuit 8, how the load condition according to external loading device 6 decides its out gate lock pulse wave, and and then allows power supply changeover device 4 provide suitable power output to outside load device 6 phase fractal key.
Refer again to Fig. 2, it is the control circuit of out gate lock pulse wave of the feedback control circuit 8 of prior art.As shown in Figure 2, utilize error voltage Ve input voltage switching circuit to control the size of storage capacitor 25 charging and discharging currents, and and then the size of control capacitance voltage Vramp heave period, to reach the purpose of control gate lock pulse wave.This control circuit comprises four groups of current sources (first charging current source 21, the first discharging current source 22, second charging current source 23 and the second discharging current source 24) and four groups of current-controlled switches (first diverter switch 211, second diverter switch 221, the 3rd diverter switch 231 and the 4th diverter switch 241), storage capacitor 25, controller circuitry 26, charge-discharge circuit 27 and change-over circuit 28; Wherein, storage capacitor 25 discharges and recharges in order to provide.In addition, first charging current source 21 couples first diverter switch 211 to storage capacitors 25, the first discharging current source 22 couples second diverter switch 221 to storage capacitor 25, second charging current source 23 couples the 3rd diverter switch 231 to storage capacitors 25, the second discharging current sources 24 and couples the 4th diverter switch 241 to storage capacitor 25; Change-over circuit 28, in order to foundation one error voltage Ve, through after the voltage transitions, produce an output changeover control signal and control second charging current source 23, adjusting the power supply that draws of second charging current source, and export a reset signal (Reset) to corresponding diverter switch SW1～SW4 according to the voltage of switching current CS.Controller circuitry 26, in order to input capacitance voltage (Vramp), one high reference voltage position standard (VH) and a low reference voltage position standard (VL), and export a control signal (first and second control signal), reach an output pulse wave (CLKOUT), and pass through this control signal at first charging current source 21, the first discharging current source 22, second charging current source 23, the second discharging current source 24, control one charges and discharge electric capacity 25, decides the size of charging and discharging currents, by this control signal at first charging current source 21,22, the second charging current sources, 23, the second discharging current sources 24, the first discharging current source, control a storage capacitor 25, decide the size of charging and discharging currents, control the cycle size of this capacitance voltage (Vramp), and and then the frequency of control gate lock pulse wave.
From above prior art as can be known, it utilizes feedback control circuit 8, feedbacks at outside output voltage V o and controls, and produce error voltage Ve, and then control second charging current source (Ic2) 23, by different charging current sizes, determine the charge cycle size of capacitance voltage Vramp, so can be at different external loadings, different charging length is provided, therefore different power output effects can be reached, therefore when external loading is underload, the effect that power is saved can be reached.Yet this circuit control mode exists the latent defect of process drift, causes the accuracy of circuit unit can be subjected to technogenic influence, and causes the unsteadiness of system.At aforesaid relation, the present invention proposes another design architecture, it provides the heterodyne diclinic rate charge construction of a kind of pair of charging capacitor, by two components from electric capacity, and provide two groups of different charging current sources, the different formed heterodyne diclinic of charge rate rates is provided, and change the charging slope at different loads and utilize the heterodyne of this heterodyne diclinic rate to intersect the fixed point mode, different discharging and recharging the cycle is provided automatically, and determine last out gate lock pulse wave to control wavelength, and and then reach at different external loadings, different power outputs is provided, reach energy-conservation effect, and can cause the assembly mismatch of electric capacity and current source to reduce stability and the accuracy that reaches the preferable electric current of entire system and voltage process drift.
Summary of the invention
According to above-mentioned explanation, the present invention at first provides a kind of drive circuit that discharges and recharges of heterodyne diclinic rate, its main purpose is by one group of two capacitor charge and discharge circuit, charging rate by different charging current sources, produce different voltage charge frequency, provide different pwm control signals by different voltage charge frequency, again by different pwm control signals, produce different drive currents, therefore can be according to different external loadings, in time provide different power outputs, to reach energy-conservation function.
Another main purpose of the present invention is by a feedback control circuit, output voltage at external loading, feedback control, the reference voltage of output voltage and feedback control circuit inside is made comparisons, produce error voltage, then can produce different door lock pulse waves by the size of error voltage, pass through power supply changeover device, can determine to export the driving power size, and reach energy-conservation effect.
According to above-mentioned purpose, the present invention at first provides a kind of heterodyne diclinic rate feedback control circuit, comprising: a back coupling error amplifier, and its first input end and one first reference voltage couple, and its second input and a back coupling error voltage Vfb couple; One first charging current source couples first end of one first diverter switch to, first charging capacitor; One first discharging current source couples first end of one second diverter switch to the first charging capacitor; One type variable charging current source couples first end of one the 3rd diverter switch to, second charging capacitor; The accurate position of one reference voltage (threshold) circuit, its first input end and one second reference voltage couple, and its output couples one the 4th diverter switch to this first end of this second charging capacitor, and its output back coupling is linked to its second input; One heterodyne diclinic rate voltage comparator, first end of its first input end and first charging capacitor couples, and first end of its second input and second charging capacitor couples, and an output is to produce an output signal; And a signal controller, this output signal of its input and heterodyne diclinic rate voltage comparator couples, and exports four signals and control first diverter switch, second diverter switch, the 3rd diverter switch and the 4th diverter switch respectively; Wherein adjust the type variable charging current source by back coupling error voltage (Vfb) value, make the type variable charging current source charge to second charging capacitor with the electric currents of different sizes.
The present invention then provides a kind of heterodyne diclinic rate feedback control circuit, comprise: first input end and one first reference voltage (Vref1) of feedbacking error amplifier couples, and its second input and a back coupling error voltage (Vfb) couple, one first charging current source couples first end of one first diverter switch to, first charging capacitor, one first discharging current source couples first end of one second diverter switch to the first charging capacitor, one second charging current source couples first end of one the 3rd diverter switch to, second charging capacitor, first input end and one second reference voltage (Vref2) of the accurate position of one reference voltage circuit couple, and its output couples first end of one the 4th diverter switch to the second charging capacitor, and its output is feedback and is linked to its second input, the first input end of one heterodyne diclinic rate voltage comparator and first end of first charging capacitor couple, and first end of its second input and second charging capacitor couples and an output to produce an output signal, the output signal of the input of one signal controller and heterodyne diclinic rate voltage comparator couples, and export four signals and control first diverter switch respectively, second diverter switch, the 3rd diverter switch and the 4th diverter switch, wherein heterodyne diclinic rate feedback control circuit is characterised in that: first charging current source is a fixed current source and second charging current source is a type variable charging current source, and the first charging slope that first charging capacitor is charged by first charging current source and type variable charging current source carry out charging and the discharge of first charging capacitor and second charging capacitor with the electric current of different sizes to the second intersection voltage that charges slope that second charging capacitor charges.
The present invention then provides a kind of power system again, comprise a power supply changeover device, one input end and an input supply coupling, the one output is coupled to a load device, the output of one heterodyne diclinic rate its input of feedback control circuit and power supply changeover device couples and exports another input that controls signal to power supply changeover device, wherein power system is characterised in that: heterodyne diclinic rate feedback control circuit, further comprise: a back coupling error amplifier, its first input end and one first reference voltage couple, and its second input and a back coupling error voltage (Vfb) couple; One first charging current source couples first end of first diverter switch to, first charging capacitor; One first discharging current source couples this first end of one second diverter switch to the first charging capacitor; One second charging current source couples first end of one the 3rd diverter switch to, second charging capacitor; The accurate position of one reference voltage circuit, its first input end and one second reference voltage (Vref2) couple, and its output couples first end of one the 4th diverter switch to the second charging capacitor, and its output back coupling is linked to its second input; One heterodyne diclinic rate voltage comparator, first end of its first input end and first charging capacitor couples, and first end of its second input and second charging capacitor couples, and an output is to produce an output signal; And a signal controller, the output signal of its input and heterodyne diclinic rate voltage comparator couples, and exports four signals and control first diverter switch, second diverter switch, the 3rd diverter switch and the 4th diverter switch respectively; Wherein first charging current source is a fixed current source and second charging current source is a type variable charging current source, and the first charging slope that first charging capacitor is charged by first charging current source and type variable charging current source carry out charging and the discharge of first charging capacitor and second charging capacitor with the electric current of different sizes to the second intersection voltage that charges slope that second charging capacitor charges.
Description of drawings
Fig. 1 is the Organization Chart of a power supply unit;
Fig. 2 is the Organization Chart of a heterodyne diclinic rate charge-discharge circuit;
Fig. 3 is the Organization Chart of heterodyne diclinic rate charge-discharge circuit of the present invention;
Fig. 4 is variable current source circuit framework schematic diagram of the present invention;
Fig. 5 is the oscillogram that capacitor charge and discharge of the present invention and switch switch;
Fig. 6 is capacitor charge and discharge of the present invention and a corresponding diagram of lock pulse wave.
Fig. 7 is heterodyne diclinic rate charge-discharge circuit operational flowchart of the present invention.
[main element symbol description]
Power supply changeover device 4
Feedback control circuit 8
Load device 6
Heterodyne diclinic rate feedback control circuit 30
The 3rd diverter switch 3021
The 4th diverter switch 3022
Heterodyne diclinic rate voltage comparator 303
The accurate position of reference voltage circuit 305
First charging current source 308
Second charging current source 309
The first discharging current source 313
Back coupling error amplifier 314
First variable current source 4011
Second variable current source 4012
First variable resistor 4013
The second adjustable resistance 4014
Embodiment
Because the present invention mainly discloses a kind of power supply unit of heterodyne diclinic rate, particularly the slope that discharges and recharges by two charging capacitors comes the switchable current source switching signal, and the control signal cycle size in order to determine to feedback its output of controller PWM, and pass through change-over circuit, export different voltage cycles, reach different output voltage power.
At first, please refer to Fig. 3, it is the circuit diagram of heterodyne diclinic rate feedback control circuit 30 of the present invention.As shown in Figure 3, heterodyne diclinic rate control circuit 30 comprises first diverter switch (SW1) 3011, second diverter switch (SW2) 3012, the 3rd diverter switch (SW3) 3021 and the 4th diverter switch (SW4) 3022, a heterodyne diclinic rate voltage comparator 303, a signal controller 304, the accurate position of a reference voltage circuit 305, first charging capacitor (C1) 306, second charging capacitor (C2) 307, first charging current source (I1) 308, second charging current source (I2) 309, a discharging current source 313, back coupling error amplifier 314, first reference voltage Vref 1, second reference voltage Vref 2 and a back coupling error voltage Vfb; Wherein, first charging current source 308 is a fixed current source, and second charging current source 309 is a type variable current source, and it can change size of current according to the output signal of back coupling error amplifier 314.
Moreover, back coupling error amplifier 314 in the heterodyne diclinic rate feedback control circuit 30 has two inputs, its first end (being anode) couples with first reference voltage Vref 1, its second end (being negative terminal) then is couple to back coupling error voltage Vfb, and its output is output two groups of control signal OutA, OutB, and is connected to the inside diverter switch of second charging current source 309 (that is variable current source) respectively.Then, second charging current source 309 couples the 3rd diverter switch (SW1) 3021 to second charging capacitors (C2) 307; First charging current 308 couples first diverter switch, 3011 to first charging capacitors 306; Discharging current source 313 couples second diverter switch, 3012 to first charging capacitors 306; Output voltage on first charging capacitor 306 is connected to the first input end (being anode) of heterodyne diclinic rate voltage comparator 303, and the output voltage on second charging capacitor 307 then is connected to second input (being negative terminal) of heterodyne diclinic rate voltage comparator 303.In addition, the output of heterodyne diclinic rate voltage comparator 303 is connected to the input of signal controller 304, and the output of signal controller 304 is connected to first diverter switch 3011, second diverter switch 3012, the 3rd diverter switch 3021 and the 4th diverter switch 3022, wherein signal controller 304 is by AND GATE, ORGATE and inverter gate are formed, after the control signal of its input is handled through the internal logic door, can produce different delay and non-crossover signal inversion signal, and in order to the conducting (ON) of controlling above-mentioned each diverter switch and open (OFF) time.Second reference voltage Vref 2 is connected to the first input end (being anode) of the accurate position of reference voltage circuit 305, the accurate position of reference voltage circuit 305 can be feedback its output and is linked to its second input (being negative terminal) simultaneously, couples the 4th diverter switch 3022 to second charging capacitors 307 again.
The second above-mentioned charging current source 309, its actual circuit structure as shown in Figure 4.Second charging current source 309 comprises first variable current source 4011 and second variable current source 4012, and wherein the output of first variable current source 4011 and the 3rd diverter switch 3021 couple; In addition, the output of second variable current source 4012 is coupled to the 3rd diverter switch 3021; Wherein, feedbacking two groups of control signal OutA, OutB that the output of error amplifier 314 exports couples with first variable current source 4011 and second variable current source 4012 respectively.When external loading changes, back coupling error voltage Vfb also changes, so can control first variable current source 4011 and second variable current source 4012 by two groups of control signal OutA, OutB of output, and make win variable current source 4011 and second variable current source 4012 follow the size of feedbacking error voltage Vfb, present corresponding to feedbacking the linear voltage of error voltage Vfb and change, and and then control the internal resistance value of first variable current source 4011 and second variable current source 4012.Internal resistance value by first variable current source 4011 and second variable current source 4012 changes, can determine the size of first variable current source 4011 and second variable current source, 4012 output currents, therefore, make variable current source 309 can export linear variable current.
Please continue with reference to figure 3, when first diverter switch (SW1) 3011 is switched on (ON), first charging current source 308 begins first charging capacitor (C1) 306 is carried out the charging of fixed current, first charging capacitor (C1) 306 be charged to first charging voltage (Vrp1) during, signal controller 304 can continue first diverter switch (SW1) 3011 conductings (ON), second diverter switch (SW2) 3012 is formed open circuit (OFF), the 3rd diverter switch (SW3) 3021 is continued conductings (ON) and the 4th diverter switch (SW4) 3022 is formed open circuit (OFF); Second charging voltage (Vrp2) on second charging capacitor this moment (C2) 307 can be from second reference voltage Vref 2 (i.e. a DC value)
Continue to rise, wherein second reference voltage Vref 2 of the first input end (being anode) of the accurate position of reference voltage circuit 305 ordinary telegram that is as the criterion is pressed (Clamp Voltage), in order to a fixing direct current reference potential to be provided, and in order to as the initial voltage Vref2 on second charging capacitor 307, so can reach the effect of voltage stabilizing by the design of the accurate position of this reference voltage circuit 305.In addition, in an embodiment of the present invention, the magnitude of current of first charging current source 308 is designed to the integral multiple (n) of second charging current source 309, so can make the charging current source 308 of winning first charging capacitor 306 be charged to first charging voltage (Vrp1) with charge rate faster, wherein this first charge rate namely has first slope; In addition, a because existing DC value on second charging capacitor (C2) 307, second reference voltage Vref 2 just, so second charging current source 309 can charge to second charging voltage (Vrp2) with second charging capacitor by a voltage DC value Vref2 with second charge rate, wherein this second charge rate namely has second slope.Therefore, when first charging capacitor (C1) 306 and second charging capacitor (C2) 307 all are in charged state, be to be charged to first charging voltage (Vrp1) with bigger electric current (i.e. first charging current source 308) at the charge condition of first charging capacitor (C1) 306; And can begin to charge to second charging voltage (Vrp2) by a less current (i.e. second charging current source 309) and by a starting voltage (being the DC value) at the charge condition of second charging capacitor (C2) 307.Clearly, when first charging capacitor (C1) 306 and second charging capacitor (C2) 307 all are in charged state, via circuit design of the present invention, making the charging capacitor of winning (C1) 306 be charged to first charging voltage (Vrp1) can be with charging rate (i.e. first slope) faster, and little by little catch up with the charging rate (i.e. second slope) that second charging capacitor (C2) 307 is charged to second charging voltage (Vrp2); When first charging voltage (Vrp1) caught up with second charging voltage (Vrp2), signal controller 304 was done the anti-phase control of control signal according to the output of heterodyne diclinic rate voltage comparator 303.Clearly, in one embodiment of this invention, the capacitance of first charging capacitor 306 and second charging capacitor 307 can be identical or become equal proportion; For example, when first charging capacitor 306 and the change of second charging capacitor, 307 ratios, the time that first charging capacitor 306 and second charging capacitor 307 discharge and recharge can be along with change, and therefore the cycle that discharges and recharges of first charging capacitor 306 and second charging capacitor 307 also can follow equal proportion to change.
When first charging voltage (Vrp1) catch up with second charging voltage when (Vrp2), the output state of heterodyne diclinic rate voltage comparator 303 can change, make signal controller 304 can export the control signal of anti-phase control, first diverter switch (SW1) 3011 is formed open circuit (OFF), with second diverter switch (SW2), 3012 conductings (ON), with the 3rd diverter switch (SW3) 3021 formation open circuits (OFF) and with the 4th diverter switch (SW4) 3022 conductings (ON), this moment is according to the circuit diagram of Fig. 3 of the present invention, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 are in discharge condition simultaneously, when the low-voltage state of first charging voltage (Vrp1) continuous discharge to a setting of first charging capacitor (C1) 306, then the output state of heterodyne diclinic rate voltage comparator 303 can change again, make signal controller 304 can export the signal of anti-phase control again, and again first diverter switch (SW1) 3011 is changed into conducting, second diverter switch (SW2) 3012 is changed into open circuit (OFF), the 3rd diverter switch (SW3) 3021 is changed into conducting and the 4th diverter switch (SW4) 3022 is changed into open circuit (OFF); At this moment, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 enter the state that continues charging again.Wherein first charging capacitor 306 discharges by the first discharging current source 313, and second charging capacitor 307 provides the path of discharge by the equivalent resistance of circuit 305 inside, the accurate position of reference voltage.Therefore, the design of the circuit diagram by Fig. 3 of the present invention, the state that makes heterodyne diclinic rate feedback control circuit 30 to change according to charging process and the discharge voltage of first charging capacitor (C1) 306 and second charging capacitor (C2) 307 decides first charging capacitor (C1) 306 and second charging capacitor (C2) the 307th, enters charge cycle or enters discharge cycle, and can carry out circularly.
Owing to feedback second end (being negative terminal) and of error amplifier 314 and feedback error voltage Vfb and couple, and this feedbacks the feedback signal of the load state that error voltage Vfb connects by power supply unit.In addition, couple because feedbacking output and the variable current source (i.e. second charging current source 309) of error amplifier 314, so can control the size of current of second charging current source 309.For example, when the load that is connected with power supply unit is a underload during situation, feedback error voltage Vfb can diminish, make the output current of second charging current source (Ic2) 309 become big; And when the load that is connected with power supply unit is a heavy duty during situation, feedback error voltage Vfb can become greatly, make the output current of second charging current source (Ic2) 309 diminish.
When the external loading that connects when heterodyne diclinic rate feedback control circuit 30 of the present invention is light-load state, the back coupling error voltage Vfb of second end (being negative terminal) of its back coupling error amplifier 314 increases little, through feedbacking error amplifier 314 controls, it is big that the drive current of second charging current source (Ic2) 309 becomes, cause second charging voltage (Vrp2) on second charging capacitor (C2) 307 to rise with faster speed, because first charging current source (Ic1) the 308th rises with fixed rate, when second charging capacitor (C2) 307 rose with fast speed, first charging current source (Ic1) 308 must 306 chargings just can forereach second charging voltage (Vrp2) on second charging capacitor (C2) 307 to first charging capacitor with the long time.Clearly, the time of first charging capacitor (C1) 306 and the 307 whole chargings of second charging capacitor (C2) this moment can be elongated, magnitude of voltage when making the charging voltage of winning (Vrp1) forereach second charging voltage (Vrp2) can be higher, and then make the charging capacitor of winning (C1) 306 need the times more of a specified duration be discharged to one set low voltage value, first charging capacitor 306 and second charging capacitor 307 discharges and recharges the cycle simultaneously, after the feedback control circuit detecting and handling, also determined last pwm control signal output, make last pwm control signal output be in long low-voltage state, cause the frequency of voltage-regulation to diminish, power output diminishes, and reaches energy-conservation effect.
Please refer to Fig. 5, be the output of heterodyne diclinic rate voltage comparator of the present invention and the signal graph of signal controller output.As shown in Figure 5, when the first charging voltage Vrp1 catch up with the second charging voltage Vrp2, the output OutC of heterodyne diclinic rate voltage comparator 303 namely can change low-voltage into from high voltage, after signal controller 304 processing, the first diverter switch SW1 can present the state synchronous with the output OutC of heterodyne diclinic rate voltage comparator 303, this moment, the signal value of the second diverter switch SW2 can present anti-phase state with SW1, and when representing charging circuit conducting (ON), discharge circuit can form open circuit (OFF); Vice versa.Because first charging capacitor 306 is consistent with the action of second charging capacitor 307, so the action meeting of the 3rd diverter switch SW3 and the 4th diverter switch SW4 is synchronous with the first control switch SW1 and the second control switch SW2.And when the first charging voltage Vrp1 drops to an initial voltage of setting via discharge process, the output outC of heterodyne diclinic rate voltage comparator 303 namely can transition, become high voltage from low-voltage, the output of signal controller 304 also can with transition and the output outC of heterodyne diclinic rate voltage comparator 303 synchronous, charging circuit conducting (ON) this moment, discharge circuit can form open circuit (OFF), and the periodicity that reaches first charging capacitor 306 and second charging capacitor 307 discharges and recharges.
When the external loading that connects when heterodyne diclinic rate feedback control circuit 30 of the present invention is heavy duty, the back coupling error voltage Vfb of second end (being negative terminal) of its back coupling error amplifier 314 becomes big, through feedbacking error amplifier 314 controls, the drive current of second charging current source (Ic2) 309 diminishes, cause second charging voltage (Vrp2) on second charging capacitor (C2) 307 to rise with slower speed, because first charging current source (Ic1) the 308th rises with fixed rate, when second charging capacitor (C2) 307 when rising than jogging speed, first charging current source (Ic1) 308 is as long as 306 chargings can forereach second charging voltage (Vrp2) on second charging capacitor (C2) 307 to first charging capacitor (C1) with the short time.Clearly, the time of first charging capacitor (C1) 306 and the 307 whole chargings of second charging capacitor (C2) this moment can shorten, magnitude of voltage when making the charging voltage of winning (Vrp1) forereach second charging voltage (Vrp2) can be lower, and then make the charging capacitor of winning (C1) 306 use the short time just can be discharged to set low voltage value, make last output control pwm control signal be in short low-voltage state, cause the frequency of voltage-regulation to become big, it is big that power output becomes, and reaches the effect of real-time load.
In order to further specify the operation of heterodyne diclinic rate feedback control circuit of the present invention, please refer to Fig. 6 (a) and Fig. 6 (b), be the present invention in heavy duty during with underloading, the corresponding diagram of capacitor charge and discharge and door lock pulse wave.At first, shown in Fig. 6 (a), when the outside is heavy duty, because it is big that the back coupling error voltage Vfb of second end (being negative terminal) of the back coupling error amplifier 314 in the heterodyne diclinic rate feedback control circuit 30 becomes, control through back coupling error amplifier 314, drive the little electric current of second charging current source (Ic2), 309 outputs, second reference voltage Vref 2 of adding the first input end (being anode) of the accurate position of reference voltage circuit 305 provides a fixing accurate ordinary telegram and presses, and then the voltage of the heterodyne intersection of the charging capacitor of winning (C1) 306 and 307 chargings of second charging capacitor (C2) also can be changed.Under this situation, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection and then shortens, that is to say, the voltage of first charging voltage (Vrp1) and second charging voltage (Vrp2) intersection can be lower, so discharging and recharging frequency, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 can accelerate, therefore the last pwm control signal cycle of feedbacking controller output shortens, and enough power outputs are provided; Then, when external loading is underloading, because the back coupling error voltage Vfb of second end (being negative terminal) of the back coupling error amplifier 314 in the heterodyne diclinic rate feedback control circuit 30 diminishes, control through back coupling error amplifier 314, drive the big electric current of second charging current source (Ic2), 309 outputs, second reference voltage Vref 2 of adding the first input end (being anode) of the accurate position of reference voltage circuit 305 provides an identical and fixing accurate ordinary telegram to press, make second charging current source (Ic2), 309 charge rates thus accurate ordinary telegram press off beginning charging, cause second charging current source (Ic2), 309 charging slopes to change, and then the voltage of the heterodyne intersection of the charging capacitor of winning (C1) 306 and 307 chargings of second charging capacitor (C2) also can be changed.Under this situation, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection is and then elongated, that is to say, first charging voltage (Vrp1) can be than higher with the voltage of second charging voltage (Vrp2) intersection, and the cycle that causes first charging capacitor (C1) 306 and second charging capacitor (C2) 307 to discharge and recharge can be and then elongated.So first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge frequency and can slow down, therefore the last pwm control signal cycle of feedbacking control lengthens, and reduces the consumption of power.
Further specify, when the outside was underload, the second charging capacitor voltage (Vrp2) was kept higher DC position standard (level) again; For example: second reference voltage Vref 2 provides the DC position standard of a 2V; Therefore, second charging current source 309 can begin charging from the 2V of DC position standard, and with very fast speed second charging capacitor (C2) 307 is charged; On the other hand, 308 of first charging current sources (Ic1) by low DC position standard to first charging capacitor (C1), 306 chargings; For example: DC position standard is 0.7V; Because first charging current source (Ic1) 308 is the proportionate relationship that presents of second charging current source (Ic2) 309; For example: the current value that first charging current source (Ic1) 308 provides is the integral multiple of the current value that provides of second charging current source (Ic2) 309; Therefore, in the present invention, first charging current source (Ic1) 308 is that the electric current that can provide bigger charges to first charging capacitor (C1) 306 all the time, so first charging voltage (Vrp1) can catch up with second charging voltage (Vrp2).Under this situation, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection is and then elongated, that is to say, first charging voltage (Vrp1) can be than higher, so the cycle that first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge can be and then elongated with the voltage of second charging voltage (Vrp2) intersection.When the first charging capacitor voltage (Vrp1) surpasses the second charging capacitor voltage (Vrp2), the output signal of heterodyne diclinic rate voltage comparator 303 is reversed at once and is input in the signal controller 304, the switch controlling signal that signal controller 304 produces namely can all current source control switchs of anti-phase control, because this back coupling control switch path, be a logic control circuit, so current source control switch signal is also in the interior counter-rotating of extremely short time and be input to all current source control switchs.At this moment, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 begin discharge, and its capacitance voltage can be got back to its initial condition at last; For example: initial condition is set at 0.7V; And repeat next time sampling action.
Follow, when the outside was heavy duty, second charging voltage (Vrp2) was still kept higher DC position standard again; For example: second reference voltage Vref 2 provides the DC position standard of a 2V; Therefore, second charging current source 309 can begin charging from the 2V of DC position standard, and than slow rate second charging capacitor (C2) 307 is charged; It is identical when on the other hand, the charging modes of 308 pairs of first charging capacitors of first charging current source (Ic1) (C1) 306 is with underloading; Therefore, underloading is that with the difference of heavy duty compared to Fig. 6 (a) second charging current source 309 can begin charging from the 2V of DC position standard for second charging capacitor (C2) 307, and is to charge than slow rate.Under this situation, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection and then shortens, that is to say, the voltage meeting step-down of first charging voltage (Vrp1) and second charging voltage (Vrp2) intersection is so first charging voltage (Vrp1) shortens naturally with second charging voltage (Vrp2) charge cycle.
Show that in Fig. 6 (b) its lock pulse wave (pwm control signal) is the output of the cycle that the discharges and recharges process heterodyne diclinic rate voltage comparator of heterodyne diclinic rate electric capacity, and handle the square wave of exporting later through signal controller and feedback control circuit.When heterodyne diclinic rate electric capacity is in charging, the voltage pulse of its heterodyne diclinic rate voltage comparator output is in high level state, when heterodyne diclinic rate electric capacity is in discharge, the voltage pulse of its heterodyne diclinic rate voltage comparator output is in low level state, by discharging and recharging the cycle of electric capacity, the output voltage pulse wave of heterodyne diclinic rate voltage comparator, after the process signal controller is done the fine tune of signal, form door lock pulse wave control cycle, behind the input power supply unit, can adjust the watt level of power supply unit output.When load transfers underloading to by heavy duty, its cycle that discharges and recharges of the first charging capacitor voltage (Vrp1) and the second charging capacitor voltage (Vrp2) becomes big, after heterodyne diclinic rate voltage comparator and signal controller processing, its corresponding door lock pulse wave cycle with change big, therefore power output diminishes the consumption of the minimizing power that reaches.
Then, please refer to Fig. 7, is the control method of heterodyne diclinic rate control circuit of the present invention.As shown in Figure 7, at first, shown in step 710, after a power system starts, can enter step 720 immediately, make (namely fixing) charging current source (Ic1) 308 of winning carry out the charging of fixed current by low DC position standard to first charging capacitor (C1) 306; For example: DC position standard is 0.7V, therefore produces first a fixing slope; Then, enter step 730, the system drive load is also judged the load state that it connects; When power system judges that the external loading connect is underload, then enter the program of step 741, namely the back coupling error voltage Vfb that provides of second end (being negative terminal) of the back coupling error amplifier 314 in the heterodyne diclinic rate feedback control circuit 30 diminishes; Then, enter the program of step 743, through the control of back coupling error amplifier 314, make to drive the big electric current of second (namely variable) charging current source (Ic2), 309 outputs; Follow again, carry out the program of step 745, make the second charging capacitor voltage (Vrp2) keep the charging of carrying out big electric current under the standard of higher DC position; For example: second reference voltage Vref 2 provides the DC position standard of a 2V; Therefore, second (namely variable) charging current source 309 can begin charging from the 2V of DC position standard, and with very fast speed second charging capacitor (C2) 307 is charged, and therefore can produce second a bigger slope; Then, enter the program of step 747, carry out the heterodyne control of heterodyne diclinic rate, because the integral multiple of the current value that the current value that first (namely fixing) charging current source (Ic1) 308 provides is second (namely variable) charging current source (Ic2) 309 to be provided; Therefore, first (namely fixing) charging current source (Ic1) 308 is that the electric current that can provide bigger charges to first charging capacitor (C1) 306 all the time, so first charging voltage (Vrp1) can catch up with second charging voltage (Vrp2), at this moment, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection is and then elongated; Follow again, enter the program of step 749, because first charging voltage (Vrp1) can be than higher with the voltage of second charging voltage (Vrp2) intersection, so the cycle that first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge can be and then elongated, under this situation, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge frequency and can slow down, and therefore the last pwm control signal cycle of feedbacking control lengthens, and reduces the consumption of power.Then, repeat next time sampling action.
When step 730 judges that the external loading connect is changed into heavy duty, then enter the program of step 751, namely the back coupling error voltage Vfb that provides of second end (being negative terminal) of the back coupling error amplifier 314 in the heterodyne diclinic rate feedback control circuit 30 becomes big; Then, enter the program of step 753, through the control of back coupling error amplifier 314, make to drive the little electric current of second (namely variable) charging current source (Ic2), 309 outputs; Follow again, carry out the program of step 755, little electric current with 309 outputs of second (namely variable) charging current source (Ic2) charges under the standard of higher DC position to the second charging capacitor voltage (Vrp2), so can produce second a less slope (for second slope when referring to respect to underloading); Then, enter the program of step 757, carry out the heterodyne control of heterodyne diclinic rate, because the integral multiple of the current value that the current value that first (namely fixing) charging current source (Ic1) 308 provides is second (namely variable) charging current source (Ic2) 309 to be provided; Therefore, first charging voltage (Vrp1) can be very fast just catch up with second charging voltage (Vrp2), and at this moment, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection and then shortens; Follow again, enter the program of step 759, because the voltage of first charging voltage (Vrp1) and second charging voltage (Vrp2) intersection can be lower, so the cycle that first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge can and then shorten, under this situation, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge frequency can be accelerated, and therefore the last pwm control signal cycle of feedbacking control shortens, and increases the supply of power.Then, repeat next time sampling action.
When control circuit of the present invention uses in the power system at Fig. 1, power supply changeover device 4 is accepted its input voltage vin, and provide output voltage V o to load device 6, feedback control circuit 30 is according to the accurate position size of power supply changeover device output voltage V o, out gate lock pulse wave provides different accurate position sizes to power supply changeover device 4.Because, power supply changeover device output voltage V o can input to second end (namely feedback error voltage Vfb) of the back coupling error amplifier 314 in the feedback control circuit 30 of the present invention, therefore, when load device 6 is heavy duty, it is big that the output voltage V o of power supply changeover device (namely feedback error voltage Vfb) becomes, control through back coupling error amplifier 314, drive the little electric current of second charging current source (Ic2), 309 outputs, second reference voltage Vref 2 of adding the first input end (being anode) of the accurate position of reference voltage circuit 305 provides a fixing accurate ordinary telegram and presses, and then the voltage of the heterodyne intersection of the charging capacitor of winning (C1) 306 and 307 chargings of second charging capacitor (C2) also can be changed.Under this situation, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection and then shortens, that is to say, the voltage of first charging voltage (Vrp1) and second charging voltage (Vrp2) intersection can be lower, so discharging and recharging frequency, first charging capacitor (C1) 306 and second charging capacitor (C2) 307 can accelerate, therefore the last pwm control signal cycle of feedbacking controller output shortens, and enough power outputs are provided; Then, when external loading is underloading, the output voltage V o of power supply changeover device (namely feedback error voltage Vfb) can diminish, control through back coupling error amplifier 314, drive the big electric current of second charging current source (Ic2), 309 outputs, second reference voltage Vref 2 of adding the first input end (being anode) of the accurate position of reference voltage circuit 305 provides an identical and fixing accurate ordinary telegram and presses, make second charging current source (Ic2), 309 charge rates thus accurate ordinary telegram press off beginning charging, cause second charging current source (Ic2), 309 charging slopes to change, and then the voltage of the heterodyne intersection of the charging capacitor of winning (C1) 306 and 307 chargings of second charging capacitor (C2) also can be changed.Under this situation, the time that first charging voltage (Vrp1) is consistent with second charging voltage (Vrp2) intersection is and then elongated, that is to say, first charging voltage (Vrp1) can be than higher with the voltage of second charging voltage (Vrp2) intersection, and the cycle that causes first charging capacitor (C1) 306 and second charging capacitor (C2) 307 to discharge and recharge can be and then elongated.So first charging capacitor (C1) 306 and second charging capacitor (C2) 307 discharge and recharge frequency and can slow down, therefore the last pwm control signal cycle of feedbacking control lengthens, and reduces the consumption of power.
It more than is the explanation at preferred embodiment of the present invention, for illustrating purpose of the present invention, and be not intended to limit accurate application form of the present invention, therefore do not violate the illustrated spirit of the present invention and scope in, all contained by the above or by embodiments of the invention.Therefore, technological thought of the present invention will be decided by following claim and equalization thereof.
Claims (13)
1. heterodyne diclinic rate feedback control circuit comprises:
One back coupling error amplifier, its first input end and one first reference voltage couple, and its second input and a back coupling error voltage couple;
One first charging current source couples first end of one first diverter switch to, first charging capacitor;
One first discharging current source couples one second diverter switch to this first end of this first charging capacitor;
One type variable charging current source couples first end of one the 3rd diverter switch to, second charging capacitor;
The accurate position of one reference voltage circuit, its first input end and one second reference voltage couple, and its output couples one the 4th diverter switch to this first end of this second charging capacitor, and its output back coupling is linked to its second input;
One heterodyne diclinic rate voltage comparator, this first end of its first input end and this first charging capacitor couples, and this first end of its second input and this second charging capacitor couples, and an output is to produce an output signal;
One signal controller, this output signal of its input and this heterodyne diclinic rate voltage comparator couples, and exports four signals and control this first diverter switch, this second diverter switch, the 3rd diverter switch and the 4th diverter switch respectively;
It is characterized in that:
Adjust the output current of one second charging current source by this back coupling error voltage value, make this second charging current source charge to this second charging capacitor with the electric currents of different sizes.
2. heterodyne diclinic rate feedback control circuit as claimed in claim 1 is characterized in that this second reference voltage ordinary telegram that is as the criterion presses.
3. heterodyne diclinic rate feedback control circuit as claimed in claim 1 is characterized in that this second charging current source comprises:
One first variable current source;
One second variable current source;
The other end of the 3rd diverter switch and this first variable current source and this second variable current source couples.
4. heterodyne diclinic rate feedback control circuit as claimed in claim 1 is characterized in that the capacitance of this first charging capacitor and this second charging capacitor is identical or becomes the equal proportion relation.
5. heterodyne diclinic rate feedback control circuit, comprise: first input end and one first reference voltage of feedbacking error amplifier couples, and its second input and a back coupling error voltage couple, one first charging current source couples first end of one first diverter switch to, first charging capacitor, one first discharging current source couples one second diverter switch to this first end of this first charging capacitor, one second charging current source couples first end of one the 3rd diverter switch to, second charging capacitor, first input end and one second reference voltage of the accurate position of one reference voltage circuit couple, and its output couples one the 4th diverter switch to this first end of this second charging capacitor, and its output is feedback and is linked to its second input, the first input end of one heterodyne diclinic rate voltage comparator and this first end of this first charging capacitor couple, and this first end of its second input and this second charging capacitor couples and an output to produce an output signal, this output signal of the input of one signal controller and this heterodyne diclinic rate voltage comparator couples, and export four signals and control this first diverter switch respectively, this second diverter switch, the 3rd diverter switch and the 4th diverter switch, wherein this heterodyne diclinic rate feedback control circuit is characterised in that:
This first charging current source is a fixed current source and this second charging current source is a type variable charging current source, the second intersection voltage that charges slope that first charging slope and this type variable charging current source that this first charging capacitor is charged by this first charging current source charges to this second charging capacitor with the magnitude of current of different sizes is as the discharge control signal of this first charging capacitor and this second charging capacitor.
6. heterodyne diclinic rate feedback control circuit as claimed in claim 5 is characterized in that this second reference voltage ordinary telegram that is as the criterion presses.
7. heterodyne diclinic rate feedback control circuit as claimed in claim 5 is characterized in that this second charging current source comprises:
One first variable current source;
One second variable current source;
The other end of the 3rd diverter switch and this first variable current source and this second variable current source couples.
8. heterodyne diclinic rate feedback control circuit as claimed in claim 5 is characterized in that the capacitance of this first charging capacitor and this second charging capacitor is identical or becomes the equal proportion relation.
9. power system, comprise a power supply changeover device, one input end and an input supply coupling, the one output is coupled to a load device, the output of one heterodyne diclinic rate its input of feedback control circuit and this power supply changeover device couples and exports another input that controls signal to this power supply changeover device, and wherein this power system is characterised in that:
This heterodyne diclinic rate feedback control circuit further comprises:
One back coupling error amplifier, its first input end and one first reference voltage couple, and its second input and a back coupling error voltage couple;
One first charging current source couples first end of one first diverter switch to, first charging capacitor;
One first discharging current source couples one second diverter switch to this first end of this first charging capacitor;
One second charging current source couples first end of one the 3rd diverter switch to, second charging capacitor;
The accurate position of one reference voltage circuit, its first input end and one second reference voltage couple, and its output couples one the 4th diverter switch to this first end of this second charging capacitor, and its output back coupling is linked to its second input;
One heterodyne diclinic rate voltage comparator, this first end of its first input end and this first charging capacitor couples, and this first end of its second input and this second charging capacitor couples, and an output is to produce an output signal; And
One signal controller, this output signal of its input and this heterodyne diclinic rate voltage comparator couples, and exports four signals and control this first diverter switch, this second diverter switch, the 3rd diverter switch and the 4th diverter switch respectively;
It is characterized in that:
This first charging current source is a fixed current source and this second charging current source is a type variable charging current source, the second intersection voltage that charges slope that first charging slope and this type variable charging current source that this first charging capacitor is charged by this first charging current source charges to this second charging capacitor with the magnitude of current of different sizes is as the discharge control signal of this first charging capacitor and this second charging capacitor.
10. power system as claimed in claim 9 is characterized in that this second reference voltage ordinary telegram that is as the criterion presses.
11. power system as claimed in claim 9 is characterized in that this second charging current source comprises:
One first variable current source;
One second variable current source;
The other end of the 3rd diverter switch and this first variable current source and this second variable current source couples.
12. power system as claimed in claim 9 is characterized in that the capacitance of this first charging capacitor and this second charging capacitor is identical or becomes the equal proportion relation.
13. the control method of a heterodyne diclinic rate feedback circuit comprises:
Start a power system;
Provide one fixedly charging current source one first charging capacitor is carried out the charging of fixed current, with produce one first the charging slope; And
Judge the external loading that connects;
It is characterized in that:
When the external loading that connects when this is judged as underload, carry out the following step:
Provide one to feedback error voltage to feedbacking second end of error amplifier;
One first electric current is exported in the variable charge current source that drives, and its control via this back coupling error amplifier drives the variable charge current source and exports this first electric current;
One second charging capacitor is charged, and it is charged to this second charging capacitor by this first electric current under a higher DC position standard, to produce one second charging slope;
Comparing this first charging slope and this second charging slope, is the time of judging this first charging slope and this second charging slope intersection unanimity in the heterodyne mode, and when this first charging slope and this second charging slope intersection are consistent, discharges; And
Exporting one first pwm control signal, is to produce this first pwm control signal according to this first charging slope and this second charging and discharge frequency of charging slope;
When the external loading that connects when this is judged as heavy duty, carry out the following step:
Provide one to feedback error voltage to feedbacking second end of error amplifier;
One second electric current is exported in the variable charge current source that drives, and its control via this back coupling error amplifier drives the variable charge current source and exports this second electric current;
One second charging capacitor is charged, and it is charged to this second charging capacitor by this first electric current under a higher DC position standard, to produce one the 3rd charging slope;
Comparing this first charging slope and the 3rd charging slope, is the time of judging this first charging slope and the 3rd charging slope intersection unanimity in the heterodyne mode, and when this first charging slope and the 3rd charging slope intersection are consistent, discharges; And
Exporting one second pwm control signal, is to produce this second pwm control signal according to this first charging slope and the 3rd charging and the discharge frequency of charging slope, and wherein this second pwm frequency signal is greater than this first pwm frequency signal.
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| CN103746437B (en) * | 2013-12-30 | 2016-11-09 | 深圳市明朗微科技有限公司 | The fast charge method of a kind of portable power source and device |
| CN108306348B (en) * | 2017-01-13 | 2021-07-27 | 华邦电子股份有限公司 | Lithium battery control circuit and lithium battery charger |
| JP6458891B1 (en) * | 2018-02-19 | 2019-01-30 | サンケン電気株式会社 | Power storage system and power storage device |
| US10658856B1 (en) * | 2018-11-02 | 2020-05-19 | Monolithic Power Systems, Inc. | Battery pack and discharge method for limiting an excessive discharge current |
| CN112114206B (en) * | 2019-06-21 | 2023-08-18 | 台达电子工业股份有限公司 | Charging load detection circuit |
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| CN1553619A (en) * | 2003-12-18 | 2004-12-08 | 威盛电子股份有限公司 | Circuit driving circuit with precision relay rate control |
| US7075346B1 (en) * | 2004-11-12 | 2006-07-11 | National Semiconductor Corporation | Synchronized frequency multiplier for multiple phase PWM control switching regulator without using a phase locked loop |
| CN1838515A (en) * | 2005-03-24 | 2006-09-27 | 通嘉科技股份有限公司 | Dual-slope adaptive frequency controller for adjusting power supply conversion |
| CN1950994A (en) * | 2004-05-11 | 2007-04-18 | 罗姆股份有限公司 | PWM driver circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1553619A (en) * | 2003-12-18 | 2004-12-08 | 威盛电子股份有限公司 | Circuit driving circuit with precision relay rate control |
| CN1950994A (en) * | 2004-05-11 | 2007-04-18 | 罗姆股份有限公司 | PWM driver circuit |
| US7075346B1 (en) * | 2004-11-12 | 2006-07-11 | National Semiconductor Corporation | Synchronized frequency multiplier for multiple phase PWM control switching regulator without using a phase locked loop |
| CN1838515A (en) * | 2005-03-24 | 2006-09-27 | 通嘉科技股份有限公司 | Dual-slope adaptive frequency controller for adjusting power supply conversion |
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